Enableddr access #19
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Enableddr access #19
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the PCI-E link and driver up. The changes involved are 1. Update kernel to 6.6.22 2. Port bittware FPGA supported code to 6.6.22 from 5.15.90-lts
Co-authored-by: Ashish Trivedi <atrivedi@fpga2.tsavoritesi.net>
* @FIR-151: Enable /dev/mem to facilitate troubleshooting * @FIR-165: Making changes to Linux to have a TXE reserved memory The changes consist of 1. Reserved memory area from 0x7F00_0000 to 0x7F1F_FFFF for TXE 2. Enabling the flag to turn on HUGETLB --------- Co-authored-by: Ashish Trivedi <atrivedi@fpga2.tsavoritesi.net>
* @FIR-151: Enable /dev/mem to facilitate troubleshooting * @FIR-165: Making changes to Linux to have a TXE reserved memory The changes consist of 1. Reserved memory area from 0x7F00_0000 to 0x7F1F_FFFF for TXE 2. Enabling the flag to turn on HUGETLB * @FIR-165: Fixing the typo in DTS 1. fixed the typo in DTS file 2. disabled the DTS structure --------- Co-authored-by: Ashish Trivedi <atrivedi@fpga2.tsavoritesi.net>
1. These changes move the memory reservation to DTSI file 2. Remove the commented out memroy reservation from DTS file Co-authored-by: Ashish Trivedi <atrivedi@fpga2.tsavoritesi.net>
* @FIR-204: Fix NVME changes and pushed into a repo
These changes are based off of what works in Meera's repo
* @FIR-204: Remove print debug statements before main branch push
This change picks up Meera's working image and is ready for main branch
The change consistent of validating Meera's SSD changes work and we are
forcing the IO Queues to 4 and are applying these boot params
; bridge enable 7; md 0xffd11028 1 ; mw 0xffd11028 0x00021ffe ; mw 0xffc03204 0x000c0000;
; mw 0xffc03200 0x00000000; mw 0xffc03304 0x00000013; mw 0xffc03300 0x00000010;
; setenv bootargs " ${bootargs} nvme_core.default_ps_max_latency_us=0 pcie_aspm=off nvme_core.io_timeout=60 nvme.poll_queues=4 pci=nomsi "
; run nandfitload; run nandfitboot;
* @FIR-204: Added changes to remove drivers/pci/controller/pcie-altera.c
---------
Co-authored-by: Ashish Trivedi <atrivedi@fpga1.tsavoritesi.net>
Removed following changes from patch 1. Enable PCI-E root port in DTS 2. Remove forcing of Gen 2 in DTS 3. Remove forcing of 4 io queues 4. Remove increased timeouts in nvme code
Removed config flags which are not needed The NVME Multipath and the NVME Debug Errors are not needed
@FIR-204: Revised and sanitized changes from SSD
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Linux-socfpga 6.6.22-lts sources baselining at 'Revised & Sanitized Baseline SSD release_tsv007_10_13_2024 ' but without PCIE support. This non-PCIE support release is designated as release_tsv008_10_13_2024