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simulate microprocessor and accelerator communication in a bus context in SystemC language

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micro-acc-systemc

simulate microprocessor and accelerator communication in a bus context in SystemC language

Source Code

This project is created by our team in BRILACASCK Organization

And you could get it beside of documentation in brilacasck/micro-acc-systemc github.

Authors

Alireza Kavian
Soheil Changizi

License

under MIT License

Documentaion

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simulate microprocessor and accelerator communication in a bus context in SystemC language

system communication hardware simulation memory accelerator bus waveform project micro microprocessor simulate systemc acc co-design hardware-software-design system-c accellera brilacasck

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