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Pull requests: alexforencich/verilog-ethernet

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Pull requests list

Idelay integration
#258 by kavitha-etl was closed Jul 10, 2025 Draft
Debug rgmii
#256 by kavitha-etl was closed Jun 25, 2025 Draft
Update README.md
#255 by Sreeram-Ramesh was closed Apr 21, 2025 Loading…
Gmii to rgmii converter
#246 by kavitha-etl was closed Jan 31, 2025 Draft
Allow ci to be manually run
#242 by ollie-etl was closed Jan 3, 2025 Loading…
Fix padding on the 32-bit axis xgmii converter
#183 by victorrjimenezz was closed Jan 15, 2024 Loading…
Add KR260 reference design example
#150 by vmayoral was closed Aug 25, 2023 Loading…
Add fixes to be compatible with Vivado 2022
#149 by DavidMonk00 was closed Mar 3, 2023 Loading…
Add LAST_ENABLE parameter to axis-arb-mux
#78 by jeehoonkang was closed May 3, 2024 Loading…
Script to run all the test cases in tb folder
#21 by LeChuck42 was closed Feb 29, 2020 Loading…
Fixed the size of data_reg nets
#8 by pdabholkar was closed Mar 14, 2019 Loading…
ProTip! What’s not been updated in a month: updated:<2025-07-04.