diff --git a/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp b/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
index 16d09b5b316844..0b48b818e5236b 100644
--- a/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
@@ -24,7 +24,6 @@
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/IntrinsicInst.h"
-#include "llvm/IR/IntrinsicsBPF.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Endian.h"
 #include "llvm/Support/ErrorHandling.h"
@@ -77,7 +76,6 @@ class SBFDAGToDAGISel : public SelectionDAGISel {
 
   // Node preprocessing cases
   void PreprocessLoad(SDNode *Node, SelectionDAG::allnodes_iterator &I);
-  void PreprocessTrunc(SDNode *Node, SelectionDAG::allnodes_iterator &I);
 
   // Find constants from a constant structure
   typedef std::vector<unsigned char> val_vec_type;
@@ -206,26 +204,6 @@ void SBFDAGToDAGISel::Select(SDNode *Node) {
     }
     break;
   }
-  case ISD::INTRINSIC_W_CHAIN: {
-    unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
-    switch (IntNo) {
-    case Intrinsic::bpf_load_byte:
-    case Intrinsic::bpf_load_half:
-    case Intrinsic::bpf_load_word: {
-      SDLoc DL(Node);
-      SDValue Chain = Node->getOperand(0);
-      SDValue N1 = Node->getOperand(1);
-      SDValue Skb = Node->getOperand(2);
-      SDValue N3 = Node->getOperand(3);
-
-      SDValue R6Reg = CurDAG->getRegister(SBF::R6, MVT::i64);
-      Chain = CurDAG->getCopyToReg(Chain, DL, R6Reg, Skb, SDValue());
-      Node = CurDAG->UpdateNodeOperands(Node, Chain, N1, R6Reg, N3);
-      break;
-    }
-    }
-    break;
-  }
 
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(Node)->getIndex();
@@ -377,8 +355,6 @@ void SBFDAGToDAGISel::PreprocessISelDAG() {
     unsigned Opcode = Node->getOpcode();
     if (Opcode == ISD::LOAD)
       PreprocessLoad(Node, I);
-    else if (Opcode == ISD::AND)
-      PreprocessTrunc(Node, I);
   }
 }
 
@@ -508,39 +484,6 @@ bool SBFDAGToDAGISel::fillConstantStruct(const DataLayout &DL,
   return true;
 }
 
-void SBFDAGToDAGISel::PreprocessTrunc(SDNode *Node,
-                                      SelectionDAG::allnodes_iterator &I) {
-  ConstantSDNode *MaskN = dyn_cast<ConstantSDNode>(Node->getOperand(1));
-  if (!MaskN)
-    return;
-
-  // The Reg operand should be a virtual register, which is defined
-  // outside the current basic block. DAG combiner has done a pretty
-  // good job in removing truncating inside a single basic block except
-  // when the Reg operand comes from bpf_load_[byte | half | word] for
-  // which the generic optimizer doesn't understand their results are
-  // zero extended.
-  SDValue BaseV = Node->getOperand(0);
-  if (BaseV.getOpcode() != ISD::INTRINSIC_W_CHAIN)
-    return;
-
-  unsigned IntNo = cast<ConstantSDNode>(BaseV->getOperand(1))->getZExtValue();
-  uint64_t MaskV = MaskN->getZExtValue();
-
-  if (!((IntNo == Intrinsic::bpf_load_byte && MaskV == 0xFF) ||
-        (IntNo == Intrinsic::bpf_load_half && MaskV == 0xFFFF) ||
-        (IntNo == Intrinsic::bpf_load_word && MaskV == 0xFFFFFFFF)))
-    return;
-
-  LLVM_DEBUG(dbgs() << "Remove the redundant AND operation in: ";
-             Node->dump(); dbgs() << '\n');
-
-  I--;
-  CurDAG->ReplaceAllUsesWith(SDValue(Node, 0), BaseV);
-  I++;
-  CurDAG->DeleteNode(Node);
-}
-
 FunctionPass *llvm::createSBFISelDag(SBFTargetMachine &TM) {
   return new SBFDAGToDAGISel(TM);
 }
diff --git a/llvm/lib/Target/SBF/SBFISelLowering.cpp b/llvm/lib/Target/SBF/SBFISelLowering.cpp
index 4e7051b960a5a3..e744795cf57535 100644
--- a/llvm/lib/Target/SBF/SBFISelLowering.cpp
+++ b/llvm/lib/Target/SBF/SBFISelLowering.cpp
@@ -23,7 +23,6 @@
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/IR/DiagnosticInfo.h"
 #include "llvm/IR/DiagnosticPrinter.h"
-#include "llvm/IR/IntrinsicsBPF.h" // TODO: jle.
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
@@ -367,24 +366,9 @@ SDValue SBFTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
   case ISD::ATOMIC_LOAD_UMIN:
   case ISD::ATOMIC_LOAD_XOR:
     return LowerATOMICRMW(Op, DAG);
-  case ISD::INTRINSIC_W_CHAIN: {
-    unsigned IntNo = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue();
-    switch (IntNo) {
-    case Intrinsic::bpf_load_byte:
-    case Intrinsic::bpf_load_half:
-    case Intrinsic::bpf_load_word:
-      if (Subtarget->isSolana()) {
-        report_fatal_error(
-            "llvm.bpf.load.* intrinsics are not supported in SBF", false);
-      }
-      break;
-    default:
-      break;
-    }
-
+  case ISD::INTRINSIC_W_CHAIN:
     // continue the expansion as defined with tablegen
     return SDValue();
-  }
   case ISD::DYNAMIC_STACKALLOC:
     report_fatal_error("Unsupported dynamic stack allocation");
   default:
diff --git a/llvm/test/CodeGen/BPF/intrinsics.ll b/llvm/test/CodeGen/BPF/intrinsics.ll
index c41503d739fce7..0f59fd5604732c 100644
--- a/llvm/test/CodeGen/BPF/intrinsics.ll
+++ b/llvm/test/CodeGen/BPF/intrinsics.ll
@@ -1,8 +1,5 @@
 ; RUN: llc < %s -march=bpfel -show-mc-encoding | FileCheck --check-prefix=CHECK-EL %s
 ; RUN: llc < %s -march=bpfeb -show-mc-encoding | FileCheck --check-prefix=CHECK-EB %s
-; RUN: not llc < %s -march=sbf 2>&1 | FileCheck --check-prefix=CHECK-SBF %s
-
-; CHECK-SBF: LLVM ERROR: llvm.bpf.load.* intrinsics are not supported in SBF
 
 ; Function Attrs: nounwind uwtable
 define i32 @ld_b(i64 %foo, ptr nocapture %bar, ptr %ctx, ptr %ctx2) #0 {
diff --git a/llvm/test/CodeGen/SBF/intrinsics.ll b/llvm/test/CodeGen/SBF/intrinsics.ll
deleted file mode 100644
index 4e22c8ebb37703..00000000000000
--- a/llvm/test/CodeGen/SBF/intrinsics.ll
+++ /dev/null
@@ -1,100 +0,0 @@
-; RUN: not llc < %s -march=sbf 2>&1 | FileCheck --check-prefix=CHECK-SBF %s
-
-; CHECK-SBF: LLVM ERROR: llvm.bpf.load.* intrinsics are not supported in SBF
-
-; Function Attrs: nounwind uwtable
-define i32 @ld_b(i64 %foo, i64* nocapture %bar, i8* %ctx, i8* %ctx2) #0 {
-  %1 = tail call i64 @llvm.bpf.load.byte(i8* %ctx, i64 123) #2
-  %2 = add i64 %1, %foo
-  %3 = load volatile i64, i64* %bar, align 8
-  %4 = add i64 %2, %3
-  %5 = tail call i64 @llvm.bpf.load.byte(i8* %ctx2, i64 %foo) #2
-  %6 = add i64 %4, %5
-  %7 = load volatile i64, i64* %bar, align 8
-  %8 = add i64 %6, %7
-  %9 = trunc i64 %8 to i32
-  ret i32 %9
-; CHECK-LABEL: ld_b:
-; CHECK-EL: r0 = *(u8 *)skb[123]
-; CHECK-EL: r0 = *(u8 *)skb[r
-; CHECK-EB: r0 = *(u8 *)skb[123]
-; CHECK-EB: r0 = *(u8 *)skb[r
-}
-
-declare i64 @llvm.bpf.load.byte(i8*, i64) #1
-
-; Function Attrs: nounwind uwtable
-define i32 @ld_h(i8* %ctx, i8* %ctx2, i32 %foo) #0 {
-  %1 = tail call i64 @llvm.bpf.load.half(i8* %ctx, i64 123) #2
-  %2 = sext i32 %foo to i64
-  %3 = tail call i64 @llvm.bpf.load.half(i8* %ctx2, i64 %2) #2
-  %4 = add i64 %3, %1
-  %5 = trunc i64 %4 to i32
-  ret i32 %5
-; CHECK-LABEL: ld_h:
-; CHECK-EL: r0 = *(u16 *)skb[r
-; CHECK-EL: r0 = *(u16 *)skb[123]
-; CHECK-EB: r0 = *(u16 *)skb[r
-; CHECK-EB: r0 = *(u16 *)skb[123]
-}
-
-declare i64 @llvm.bpf.load.half(i8*, i64) #1
-
-; Function Attrs: nounwind uwtable
-define i32 @ld_w(i8* %ctx, i8* %ctx2, i32 %foo) #0 {
-  %1 = tail call i64 @llvm.bpf.load.word(i8* %ctx, i64 123) #2
-  %2 = sext i32 %foo to i64
-  %3 = tail call i64 @llvm.bpf.load.word(i8* %ctx2, i64 %2) #2
-  %4 = add i64 %3, %1
-  %5 = trunc i64 %4 to i32
-  ret i32 %5
-; CHECK-LABEL: ld_w:
-; CHECK-EL: r0 = *(u32 *)skb[r
-; CHECK-EL: r0 = *(u32 *)skb[123]
-; CHECK-EB: r0 = *(u32 *)skb[r
-; CHECK-EB: r0 = *(u32 *)skb[123]
-}
-
-declare i64 @llvm.bpf.load.word(i8*, i64) #1
-
-define i32 @ld_pseudo() #0 {
-entry:
-  %call = tail call i64 @llvm.bpf.pseudo(i64 2, i64 3)
-  tail call void inttoptr (i64 4 to void (i64, i32)*)(i64 %call, i32 4) #2
-  ret i32 0
-; CHECK-LABEL: ld_pseudo:
-; CHECK-EL: ld_pseudo r1, 2, 3 # encoding: [0x18,0x21,0x00,0x00,0x03,0x00,0x00,0x00
-; CHECK-EB: ld_pseudo r1, 2, 3 # encoding: [0x18,0x12,0x00,0x00,0x00,0x00,0x00,0x03
-}
-
-declare i64 @llvm.bpf.pseudo(i64, i64) #2
-
-define i32 @bswap(i64 %a, i64 %b, i64 %c) #0 {
-entry:
-  %0 = tail call i64 @llvm.bswap.i64(i64 %a)
-  %conv = trunc i64 %b to i32
-  %1 = tail call i32 @llvm.bswap.i32(i32 %conv)
-  %conv1 = zext i32 %1 to i64
-  %add = add i64 %conv1, %0
-  %conv2 = trunc i64 %c to i16
-  %2 = tail call i16 @llvm.bswap.i16(i16 %conv2)
-  %conv3 = zext i16 %2 to i64
-  %add4 = add i64 %add, %conv3
-  %conv5 = trunc i64 %add4 to i32
-  ret i32 %conv5
-; CHECK-LABEL: bswap:
-; CHECK-EL: r1 = be64 r1     # encoding: [0xdc,0x01,0x00,0x00,0x40,0x00,0x00,0x00]
-; CHECK-EL: r0 = be32 r0     # encoding: [0xdc,0x00,0x00,0x00,0x20,0x00,0x00,0x00]
-; CHECK-EL: r0 += r1 # encoding: [0x0f,0x10,0x00,0x00,0x00,0x00,0x00,0x00]
-; CHECK-EL: r3 = be16 r3     # encoding: [0xdc,0x03,0x00,0x00,0x10,0x00,0x00,0x00]
-; CHECK-EL: r0 += r3 # encoding: [0x0f,0x30,0x00,0x00,0x00,0x00,0x00,0x00]
-; CHECK-EB: r1 = le64 r1     # encoding: [0xd4,0x10,0x00,0x00,0x00,0x00,0x00,0x40]
-; CHECK-EB: r0 = le32 r0     # encoding: [0xd4,0x00,0x00,0x00,0x00,0x00,0x00,0x20]
-; CHECK-EB: r0 += r1 # encoding: [0x0f,0x01,0x00,0x00,0x00,0x00,0x00,0x00]
-; CHECK-EB: r3 = le16 r3     # encoding: [0xd4,0x30,0x00,0x00,0x00,0x00,0x00,0x10]
-; CHECK-EB: r0 += r3 # encoding: [0x0f,0x03,0x00,0x00,0x00,0x00,0x00,0x00]
-}
-
-declare i64 @llvm.bswap.i64(i64) #1
-declare i32 @llvm.bswap.i32(i32) #1
-declare i16 @llvm.bswap.i16(i16) #1