[AMDGPU]: Packed instructions unpacking to co-issue post-RA scheduling - fix flag handling (llvm#160195)

This is a follow up to llvm#157968.
This fixes flag handling in inserted instructions.

Author: akadutta

llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp

@@ -698,15 +698,9 @@ void SIPreEmitPeephole::performF32Unpacking(MachineInstr &I) {
       createUnpackedMI(I, UnpackedOpcode, /*IsHiBits=*/true);
   MachineOperand HiDstOp = Op0HOp1H->getOperand(0);
 
-  if (I.getFlag(MachineInstr::MIFlag::NoFPExcept)) {
-    Op0LOp1L->setFlag(MachineInstr::MIFlag::NoFPExcept);
-    Op0HOp1H->setFlag(MachineInstr::MIFlag::NoFPExcept);
-  }
-  if (I.getFlag(MachineInstr::MIFlag::FmContract)) {
-    Op0LOp1L->setFlag(MachineInstr::MIFlag::FmContract);
-    Op0HOp1H->setFlag(MachineInstr::MIFlag::FmContract);
-  }
-
+  uint32_t IFlags = I.getFlags();
+  Op0LOp1L->setFlags(IFlags);
+  Op0HOp1H->setFlags(IFlags);
   LoDstOp.setIsRenamable(DstOp.isRenamable());
   HiDstOp.setIsRenamable(DstOp.isRenamable());