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dhalbertdhalbert
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Merge pull request #8798 from lovrojakic/board-support-for-vidi-x
Add support for VIDI X board
2 parents 758c60c + 39b44c7 commit 2cd53b0

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‎ports/espressif/boards/vidi_x/board.c

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#include "supervisor/board.h"
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#include "mpconfigboard.h"
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#include "shared-bindings/busio/SPI.h"
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#include "shared-bindings/fourwire/FourWire.h"
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#include "shared-module/displayio/__init__.h"
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#include "shared-module/displayio/mipi_constants.h"
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#include "common-hal/microcontroller/Pin.h"
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#define DELAY 0x80
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// ILI9341 init sequence from:
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// https://github.com/hardkernel/ODROID-GO-MicroPython/blob/loboris/odroid_go/utils/lcd/lcd.py#L55
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uint8_t display_init_sequence[] = {
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0x0f, 3, 0x03, 0x80, 0x02, // RDDSDR
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0xcf, 3, 0x00, 0xcf, 0x30, // PWCRTLB
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0xed, 4, 0x64, 0x03, 0x12, 0x81, // PWRONCTRL
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0xe8, 3, 0x85, 0x00, 0x78, // DTCTRLA
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0xcb, 5, 0x39, 0x2c, 0x00, 0x34, 0x02, // PWCTRLA
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0xf7, 1, 0x20, // PRCTRL
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0xea, 2, 0x00, 0x00, // DTCTRLB
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0xc0, 1, 0x1b, // PWCTRL1
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0xc1, 1, 0x12, // PWCTRL2
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0xc5, 2, 0x3e, 0x3c, // VMCTRL1
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0xc7, 1, 0x91, // VMCTRL2
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0x36, 1, 0xa8, // MADCTL
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0x3a, 1, 0x55, // PIXSET
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0xb1, 2, 0x00, 0x1b, // FRMCTR1
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0xb6, 3, 0x0a, 0xa2, 0x27, // DISCTRL
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0xf6, 2, 0x01, 0x30, // INTFACE
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0xf2, 1, 0x00, // ENA3G
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0x26, 1, 0x01, // GAMSET
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0xe0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00, // PGAMCTRL
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0xe1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xc1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f, // NGAMCTRL
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0x11, 0 | DELAY, 10, // SLPOUT
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0x29, 0 | DELAY, 100, // DISPON
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};
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void board_init(void) {
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fourwire_fourwire_obj_t *bus = &allocate_display_bus()->fourwire_bus;
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busio_spi_obj_t *spi = &bus->inline_bus;
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common_hal_busio_spi_construct(spi, &pin_GPIO18, &pin_GPIO23, NULL, false);
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common_hal_busio_spi_never_reset(spi);
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bus->base.type = &fourwire_fourwire_type;
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common_hal_fourwire_fourwire_construct(bus,
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spi,
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&pin_GPIO21, // TFT_DC Command or data
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&pin_GPIO5, // TFT_CS Chip select
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NULL, // TFT_RST Reset
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40000000, // Baudrate
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0, // Polarity
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0); // Phase
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busdisplay_busdisplay_obj_t *display = &allocate_display()->display;
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display->base.type = &busdisplay_busdisplay_type;
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common_hal_busdisplay_busdisplay_construct(display,
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bus,
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320, // Width (after rotation)
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240, // Height (after rotation)
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0, // column start
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0, // row start
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0, // rotation
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16, // Color depth
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false, // grayscale
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false, // pixels in byte share row. only used for depth < 8
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1, // bytes per cell. Only valid for depths < 8
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false, // reverse_pixels_in_byte. Only valid for depths < 8
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true, // reverse_pixels_in_word
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MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command
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MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command
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MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command
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display_init_sequence,
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sizeof(display_init_sequence),
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NULL, // backlight pin
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NO_BRIGHTNESS_COMMAND,
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1.0f, // brightness
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false, // single_byte_bounds
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false, // data_as_commands
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true, // auto_refresh
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60, // native_frames_per_second
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true, // backlight_on_high
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false, // SH1107_addressing
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50000); // backlight pwm frequency
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}
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bool espressif_board_reset_pin_number(gpio_num_t pin_number) {
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// Pull LED down on reset rather than the default up
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if (pin_number == 2) {
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gpio_config_t cfg = {
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.pin_bit_mask = BIT64(pin_number),
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.mode = GPIO_MODE_DISABLE,
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.pull_up_en = false,
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.pull_down_en = true,
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.intr_type = GPIO_INTR_DISABLE,
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};
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gpio_config(&cfg);
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return true;
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}
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return false;
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}
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// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/espressif/boards/vidi_x/mpconfigboard.h

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2022 Dan Halbert for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#pragma once
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#define MICROPY_HW_BOARD_NAME "VIDI X"
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#define MICROPY_HW_MCU_NAME "ESP32"
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#define MICROPY_HW_LED_STATUS (&pin_GPIO2)
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#define CIRCUITPY_BOARD_SPI (1)
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#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO18, .mosi = &pin_GPIO23, .miso = &pin_GPIO19}}
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#define CIRCUITPY_BOARD_I2C (1)
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#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO32, .sda = &pin_GPIO33}}
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#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
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// Explanation of how a user got into safe mode
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#define BOARD_USER_SAFE_MODE_ACTION MP_ERROR_TEXT("You pressed the VOLUME button at start up.")
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// UART pins attached to the USB-serial converter chip
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#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO1)
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#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO3)

‎ports/espressif/boards/vidi_x/mpconfigboard.mk

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CIRCUITPY_CREATOR_ID = 0x0D10C000
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CIRCUITPY_CREATION_ID = 0x00320001
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IDF_TARGET = esp32
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CIRCUITPY_ESP_FLASH_SIZE = 8MB
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CIRCUITPY_ESP_FLASH_MODE = qio
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CIRCUITPY_ESP_FLASH_FREQ = 80m
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CIRCUITPY_ESP_PSRAM_SIZE = 8MB
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CIRCUITPY_ESP_PSRAM_MODE = qio
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CIRCUITPY_ESP_PSRAM_FREQ = 80m

‎ports/espressif/boards/vidi_x/pins.c

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// This file is part of the CircuitPython project: https://circuitpython.org
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//
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// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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//
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// SPDX-License-Identifier: MIT
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#include "py/objtuple.h"
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#include "shared-bindings/board/__init__.h"
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#include "shared-module/displayio/__init__.h"
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static const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_ROM_QSTR(MP_QSTR_VOLUME), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_EXP9), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_EXP16), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO1), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_STATUS), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_EXP8), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_EXP14), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO3), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_VSPI_CS2), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_EXP10), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_CS), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_VSPI_CS0), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_EXP11), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_GPIO5) },
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// GPIOs 6-11 are connected to the module's integrated SPI flash and PSRAM
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_IRQ), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_EXP20), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_MENU), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_EXP17), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_MIC), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_EXP19), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_IRTX), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_EXP7), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_GPIO15) },
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// GPIOs 16 and 17 are connected to the module’s integrated PSRAM
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{ MP_ROM_QSTR(MP_QSTR_VSPI_SCK), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_EXP12), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_SCK), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_SCK), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_SD_SCK), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO18), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_VSPI_MISO), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_EXP13), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_MISO), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_MISO), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
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// GPIO 20 is only available on ESP32-PICO-V3 chip package
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{ MP_ROM_QSTR(MP_QSTR_LCD_DC), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_EXP15), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO21), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_VSPI_CS1), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_EXP18), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO22), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_VSPI_MOSI), MP_ROM_PTR(&pin_GPIO23) },
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{ MP_ROM_QSTR(MP_QSTR_EXP28), MP_ROM_PTR(&pin_GPIO23) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO23), MP_ROM_PTR(&pin_GPIO23) },
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{ MP_ROM_QSTR(MP_QSTR_TOUCH_MOSI), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_LCD_MOSI), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
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// 24 not connected
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{ MP_ROM_QSTR(MP_QSTR_IRRX), MP_ROM_PTR(&pin_GPIO25) },
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{ MP_ROM_QSTR(MP_QSTR_SPEAKER_IN), MP_ROM_PTR(&pin_GPIO25) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO25), MP_ROM_PTR(&pin_GPIO25) },
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{ MP_ROM_QSTR(MP_QSTR_TEMP), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_RGB_LED), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_SELECT), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_EXP22), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) },
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// 28-31 not connected
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{ MP_ROM_QSTR(MP_QSTR_BTN_A), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_EXP23), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO32), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_BTN_B), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_EXP21), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO33), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_BTN_L_R), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_EXP25), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO34), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_BTN_UP_DOWN), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_EXP24), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_ADC_BAT), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_EXP27), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO36), MP_ROM_PTR(&pin_GPIO36) },
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// 37-38 not connected
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{ MP_ROM_QSTR(MP_QSTR_START), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_EXP26), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_GPIO39), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
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{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
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{ MP_ROM_QSTR(MP_QSTR_VIDIIC), MP_ROM_PTR(&board_i2c_obj) },
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{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)},
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

‎ports/espressif/boards/vidi_x/sdkconfig

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#
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# Espressif IoT Development Framework Configuration
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#
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#
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# Component config
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#
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#
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# LWIP
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#
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CONFIG_LWIP_LOCAL_HOSTNAME="vidi-x"
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# end of LWIP
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# end of Component config
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# end of Espressif IoT Development Framework Configuration

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