[SSDT-USBX] vs _DSM XHC Clarifications

[1alessandro1]

There are a few ways to specify current limits on USB ports, one of them is using AppleUsbPower compatibility table for Skylake+ (also known as SSDT-USBX)

However there are some other properties that can be specified either though SSDT:

Or though DevicesProperties converting the HEX values to Little Endian format:

My doubts on this were:

1. Does specifying the properties for the XHC device or via PciRoot(0x0)/Pci(0x14,0x0) - which in the end is the same thing - have any relevant impact/change on correct USB power management?
2. Are these two methods doing the same thing?
3. Is SSDT-USBX enough for handling USB port currents or maybe needs some more properties?
4. If the answer for 2. is "SSDT-USBX is enough", why?

Thank you for your time and patience

[vit9696]

1. On IOUSBFamily (pre-10.11 if I remember correctly) it does and works correctly. Required to be AAPL,-prefixed properties. On IOUSBHostFamily these values are ignored I believe.
2. Using DeviceProperties and _DSM is about the same thing as long as you can specify the device path in DeviceProperties (for USBX you cannot for instance, since it is not a PCI device) and as long as the device exists in ACPI.
3. Depends on the hardware. For Haswell you must specify the values in the plist of the kext describing ports. For Skylake I experienced mixed results. Most likely you need to specify them in both places to get reliable behaviour. Easiest to check is to try charging an iPad.

[1alessandro1]

Thanks a lot for making this more clear

Also I recently noticed this (AppleACPIEC) from the Kernel ACPI Log:

1. Is this USBX related?
2. Should I care about this?
3. Why on laptops AppleACPIEC should be loaded and in desktops it does not?

[vit9696]

1. Not sure. It think it is about no T1/T2 support.
2. No.
3. I think it is coincidental.

[1alessandro1]

Depends on the hardware. For Haswell you must specify the values in the plist of the kext describing ports.

Regarding USB mapping on firmware which have ports described only in the DSDT, I successfully managed to map all my ports on a Q85 chipset with a i5 4590 using a _UPC to XUPC hotpach that can be found here and I mapped ports though SSDT that can be found here even if it's not Skylake which has a separate SSDT for that

I'd like to know your thoughts on this, since this is going to help me to update the PR here, where the method I proposed currently applies to skylake and above by dropping the original OEM SSDT (hence the USB table must be separate right now) while if this rename is a viable method, this approach can be used on all firmware, replacing the kext approach which breaks when changing SMBIOS, and it's not as clean as an ACPI-only solution

Thanks for your time

[1alessandro1]

tiny bump, @vit9696 ^

[vit9696]

Not sure I have a good opinion on that.