-
Notifications
You must be signed in to change notification settings - Fork 7
/
ukd11a.c
1549 lines (1396 loc) · 31 KB
/
ukd11a.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include <wiringPi.h>
#include <stdio.h>
#include "threading.h"
#include "11.h"
#include "ukd11a.h"
// CLK:
// 0,1: P1
// 2: P2
// 3: P2, P3
/*
P1 and P2:
CLK BUS
CLK BA
P1 and P3:
CLK B
WR R
CLK IR
P2 only:
CLK D
P END and JAM CLK:
ECLK
CLK U 56:09
CLK UPP*PUPP
PART P END: P END, but not P1
*/
struct timespec
timesub(struct timespec t1, struct timespec t2)
{
struct timespec d;
d.tv_sec = t2.tv_sec - t1.tv_sec;
d.tv_nsec = t2.tv_nsec - t1.tv_nsec;
if(d.tv_nsec < 0){
d.tv_nsec += 1000000000;
d.tv_sec -= 1;
}
return d;
}
struct timespec
timeadd(struct timespec t1, struct timespec t2)
{
struct timespec s;
s.tv_sec = t1.tv_sec + t2.tv_sec;
s.tv_nsec = t1.tv_nsec + t2.tv_nsec;
if(s.tv_nsec >= 1000000000){
s.tv_nsec -= 1000000000;
s.tv_sec += 1;
}
return s;
}
static void
timeaddns(struct timespec *t, int ns)
{
t->tv_nsec += ns;
if(t->tv_nsec >= 1000000000){
t->tv_nsec -= 1000000000;
t->tv_sec += 1;
}
}
Uword urom[] = {
#include "ucode_40.inc"
};
enum
{
IR_BYTE_INSTR = 1,
IR_NO_DATIP = 2,
IR_OVLAP_INSTR = 4,
IR_OVLAP_CYCLE = 010,
IR_CIN1 = 020, // CIN=1
IR_CINC = 040, // CIN=PS(C)
IR_UALUS = 0100, // force ALUS from uword
IR_ALUM_N = 0200, // ALUM from PS(N)
IR_ALUS_C = 0400, // ALUS from PS(C)
IR_BYTE_CODES = 01000,
};
IRdecode decodetab[0200000];
enum
{
PSW_N = 010,
PSW_Z = 004,
PSW_V = 002,
PSW_C = 001
};
int dotrace = 0;
#undef trace
#define trace if(dotrace) printf
#define BA cpu->ba
#define PBA cpu->bus->addr
#define UNIBUS_DATA cpu->bus->data
static word
rdps(KD11A *cpu)
{
// TODO: KT11
return cpu->ps_flags | cpu->ps_t<<4 | cpu->ps_prio<<5;
}
static void
loadps(KD11A *cpu)
{
cpu->ps_flags = cpu->dmux&017;
if(cpu->u.sps==7)
cpu->ps_t = !!(cpu->dmux&020);
cpu->ps_prio = (cpu->dmux>>5)&7;
}
static int
dati_cpu(KD11A *cpu)
{
/* internal registers */
// actually just BA without KT11
if(PBA > 0760000){
if((PBA&0777400) == 0777400){
switch(PBA&0377){
case 0170: case 0171:
UNIBUS_DATA = cpu->con.data_switches;
goto ok;
case 0376: case 0377:
UNIBUS_DATA = rdps(cpu);
goto ok;
}
}
}
return 0;
ok: return 1;
}
static int
dato_cpu(KD11A *cpu, int b)
{
word mask;
mask = b ? (BA&1 ? 0177400 : 0377) : 0177777;
/* internal registers */
// actually just BA without KT11
if(PBA > 0760000){
if((PBA&0777400) == 0777400){
switch(PBA&0377){
case 0170: case 0171:
/* can't write switches */
goto ok;
case 0376: case 0377:
if(mask&0377 && cpu->u.sps==0)
loadps(cpu);
goto ok;
}
}
}
return 0;
ok: return 1;
}
static void
businit(KD11A *cpu)
{
Busdev *bd;
cpu->cbr = 0;
cpu->brptr = 0;
for(bd = cpu->bus->devs; bd; bd = bd->next)
bd->reset(bd->dev);
}
static uint32
ubxt(word a)
{
return (a&0160000)==0160000 ? a|0600000 : a;
}
static int
remapBA(KD11A *cpu, int wr)
{
PBA = ubxt(BA);
return 0;
}
enum {
BUS_ODA_ERR = 1,
BUS_OVFLW_ERR,
BUS_NODAT
};
static void jamupp(KD11A *cpu);
#define CKOVF (cpu->ckovf && cpu->busc!=0) // TOOD(KT11): kernel mode
#define ODA_ERR (cpu->ba&1 && cpu->ckoda && !cpu->consl)
#define BOVFLW (cpu->ovfl_cond == 1)
#define OVFLW_ERR (cpu->ovfl_cond == 2)
static void
clr_berr(KD11A *cpu)
{
// name not quite correct
cpu->berr = 0;
cpu->trap = 0;
cpu->intr = 0;
cpu->brsv = 0;
cpu->wait = 0;
}
static void
flag_clr(KD11A *cpu)
{
cpu->awby = 0;
cpu->ovlap = 0;
cpu->bovflw = 0;
}
static void
busstop(KD11A *cpu, int reason)
{
cpu->busff = 0;
switch(reason){
case BUS_ODA_ERR:
printf("ODA ERR\n");
cpu->jberr = 1;
jamupp(cpu);
break;
case BUS_OVFLW_ERR:
printf("OVFLW ERR\n");
cpu->jberr = 1;
jamupp(cpu);
break;
case BUS_NODAT:
printf("NODAT\n");
cpu->nodat = 1;
jamupp(cpu);
break;
}
}
static void
clkptr(KD11A *cpu)
{
// TODO? we probably won't need it for this model
// if BUS SACK || NPR || GRANT BR
// return
cpu->cbr = !!(cpu->con.cntl_switches & SW_HALT);
cpu->brptr = cpu->brq;
}
// start a bus cycle
// we don't actually MSYN &c. flip-flops
static void
clkmsyn(KD11A *cpu)
{
remapBA(cpu, 0);
clkptr(cpu);
UNIBUS_DATA = cpu->dr;
//printf("BUS cycle %06o %06o\n", cpu->bus->addr, cpu->bus->data);
if(OVFLW_ERR){
busstop(cpu, BUS_OVFLW_ERR);
return;
}
if(ODA_ERR){
busstop(cpu, BUS_ODA_ERR);
return;
}
if(cpu->busc == 0 || cpu->busc == 1){
// DATI(P)
if(dati_cpu(cpu) == 0)
if((cpu->busc == 1 ? datip_bus : dati_bus)(cpu->bus)){
busstop(cpu, BUS_NODAT);
return;
}
trace("DATI: got %o\n", UNIBUS_DATA);
}else{
// DATO(B)
int b = cpu->busc == 3;
if(dato_cpu(cpu, b) == 0)
if((b ? datob_bus : dato_bus)(cpu->bus)){
busstop(cpu, BUS_NODAT);
return;
}
trace("DATO: wrote %o\n", UNIBUS_DATA);
}
cpu->busff = 0;
cpu->nodat = 0;
// happens when MSYN and SSYN are asserted
cpu->clkon = 1;
timeaddns(&cpu->bus_time, 500);
}
static char *busnames[] = { "DATI", "DATIP", "DATO", "DATOB" };
static void
clkbus(KD11A *cpu)
{
cpu->busc = cpu->u.bus>>1;
// set DATOB if byte
if(cpu->irdec.flags & IR_BYTE_INSTR && cpu->u.dad&1)
cpu->busc |= 1;
// clear DATIP for bit/cmp/tst
if(cpu->irdec.flags & IR_NO_DATIP && cpu->busc==1)
cpu->busc &= ~1;
// do not start a cycle under certain conditions
if(cpu->irdec.flags & IR_NO_DATIP && (cpu->u.dad&012)==012 ||
cpu->u.ubf == 037 && !cpu->ovlap_cycle)
cpu->busff = 0;
else
cpu->busff = 1;
// printf("%d BUS: %s\n", cpu->busff, busnames[cpu->busc]);
}
static void
clkba(KD11A *cpu)
{
cpu->ckovf = !cpu->stall && (cpu->radr&7)==6 && (cpu->u.dad&016)==6;
cpu->ckoda = !(cpu->irdec.flags & IR_BYTE_INSTR && cpu->u.dad&1);
cpu->ba = cpu->bamux;
cpu->ovfl_cond = 0;
if(CKOVF){
int ba = cpu->ba & ~1;
if(ba < 0400)
cpu->ovfl_cond = 1;
if(ba < 0340 ||
ba == 0177776 || // PSW
// ba == 0177774 || // SLR TODO(KJ11)
ba == 0177570) // SR
cpu->ovfl_cond = 2;
}
}
static void
clkir(KD11A *cpu)
{
cpu->ir = cpu->dmux;
cpu->irdec = decodetab[cpu->ir];
clkptr(cpu);
}
static void
clkflags(KD11A *cpu)
{
if(cpu->u.sps == 7)
loadps(cpu);
else if((cpu->ir&0177740) == 0240){
if(cpu->u.sps & 2)
cpu->ps_flags = cpu->ps_flags&1 | cpu->dmux&~1;
if(cpu->u.sps & 1)
cpu->ps_flags = cpu->ps_flags&~1 | cpu->dmux&1;
}else{
int ndata;
if(cpu->irdec.flags & IR_BYTE_INSTR)
ndata = !!(cpu->dr&0200);
else
ndata = !!(cpu->dr&0100000);
if(cpu->u.sps & 2){
// CLK NVZ
int zdata, pastb;
if(cpu->irdec.flags & IR_BYTE_INSTR){
zdata = (cpu->dr&0377)==0;
pastb = !!(cpu->bmux&0200);
}else{
zdata = cpu->dr==0;
pastb = !!(cpu->bmux&0100000);
}
int vlookup = cpu->pastc<<4 | pastb<<3 | (cpu->ps_flags&1)<<2 | cpu->pasta<<1 | ndata;
int vdata = (cpu->irdec.vtable>>vlookup)&1;
cpu->ps_flags &= ~016;
cpu->ps_flags |= vdata<<1;
cpu->ps_flags |= zdata<<2;
cpu->ps_flags |= ndata<<3;
}
if(cpu->u.sps & 1){
// CLK C
cpu->pastc = cpu->ps_flags&1;
cpu->ps_flags &= ~1;
if((cpu->ir&0077500) == 06000)
cpu->ps_flags |= cpu->dr&1;
else{
// what is this weird magic thing?
int magic = cpu->u.sps==3 && (cpu->ir&070) && (cpu->irdec.flags & IR_BYTE_INSTR && cpu->ba&1);
int clookup = magic<<4 | cpu->dcry<<3 | (cpu->ps_flags&1)<<2 | cpu->pasta<<1 | ndata;
cpu->ps_flags |= (cpu->irdec.ctable>>clookup)&1;
}
}
}
}
#define TRACE (cpu->ps_t && cpu->ir == 6)
static int
needservice(KD11A *cpu)
{
int service1 = TRACE || cpu->berr || cpu->bovflw || cpu->pwrdn;
return cpu->ba == 0177570 && (cpu->ir&070)!=0 || // TODO: KT11
cpu->brptr || cpu->cbr || service1;
}
static int
but(KD11A *cpu)
{
if(cpu->u.ubf == 0)
return 0;
int part_p_end = cpu->u.clk&4; // assume this is the last pulse
if(part_p_end && cpu->u.ubf >= 030)
cpu->swtch = 0;
trace("BUT%02o\n", cpu->u.ubf);
int bubc = 0;
int service;
switch(cpu->u.ubf){
case 2:
cpu->reset = 1;
businit(cpu);
// fallthrough
case 1:
return !(cpu->con.cntl_switches & SW_HALT);
case 3:
if(part_p_end){
cpu->exam = 0;
if(cpu->u.dad&1)
cpu->dep = 1;
}
// TODO: KT11
return ((cpu->ba&0177760) == 0177700);
case 4:
if(part_p_end){
cpu->dep = 0;
if(cpu->u.dad&1)
cpu->exam = 1;
}
// TODO: KT11
return !((cpu->ba&0177760) == 0177700);
case 5:
if(part_p_end){
cpu->exam = 0;
cpu->dep = 0;
}
return 1; // really: !cpu->begin;
case 6:
if(part_p_end)
cpu->consl = 1;
return cpu->swtch;
case 010:
if(part_p_end){
cpu->start = 0;
cpu->consl = 0;
}
return !!(cpu->con.cntl_switches & SW_HALT)<<1;
case 011:
// TODO: KT11
return 1;
case 012:
return cpu->dr == 0;
case 015:
return (cpu->ir&0177700) == 0004000;
case 016:
service = needservice(cpu);
if(service)
bubc |= 1;
break;
case 017:
return !!(cpu->ir&010);
case 021:
if(cpu->ir&010)
return 0;
// fallthrough
case 022:
return cpu->irdec.bubc22;
case 025:
return cpu->brptr ? 0 :
cpu->wait ? 3 : 2;
case 024:
if(part_p_end){
cpu->consl = 1;
cpu->exam = 0;
cpu->dep = 0;
}
return !!(cpu->con.cntl_switches & SW_HALT)<<1;
case 026:
if(cpu->ps_t && cpu->ir != 6 ||
cpu->berr || cpu->bovflw || cpu->pwrdn)
bubc = 0;
else if(!cpu->consl && cpu->con.cntl_switches & SW_HALT)
bubc = 1;
else if(cpu->brq || cpu->wait)
bubc = 2;
else
bubc = 3;
if(part_p_end){
cpu->consl = 0;
cpu->exam = 0;
cpu->dep = 0;
}
break;
case 020:
if(cpu->irdec.flags & IR_BYTE_INSTR)
return 3;
// fallthrough
case 027:
service = needservice(cpu);
if(cpu->ovlap && !service)
bubc |= 1;
if(service)
bubc |= 2;
break;
case 030:
if(cpu->con.cntl_switches & (SW_LOAD_ADDR|SW_EXAM|SW_DEP|SW_CONT))
bubc |= 4;
if(cpu->con.cntl_switches & (SW_LOAD_ADDR|SW_CONT) || cpu->start)
bubc |= 2;
if(cpu->con.cntl_switches & (SW_LOAD_ADDR|SW_EXAM))
bubc |= 1;
break;
case 031:
return cpu->irdec.bubc31;
case 033:
if(cpu->irdec.flags & IR_BYTE_INSTR && cpu->ba&1)
return cpu->irdec.bubc33[1];
else
return cpu->irdec.bubc33[0];
case 034:
if(cpu->irdec.flags & IR_BYTE_INSTR && cpu->ba&1)
return cpu->irdec.bubc34[1];
else
return cpu->irdec.bubc34[0];
case 035:
if(cpu->irdec.flags & IR_BYTE_INSTR && cpu->ba&1)
return cpu->irdec.bubc35[1];
else
return cpu->irdec.bubc35[0];
case 036:
return cpu->irdec.bubc36;
case 037:
if(part_p_end)
cpu->start = 0;
// not quite sure this is correct here
cpu->ovlap = cpu->ovlap_instr;
// set TRAP = TRAP DATA
cpu->pastc = 0;
return cpu->irdec.bubc37 | (cpu->irdec.brconst>>cpu->ps_flags)&1;
default:
printf(" not implemented: BUT%02o %o\n", cpu->u.ubf, cpu->pupp);
}
return bubc;
}
void
updateALU(KD11A *cpu, int mode, int cin)
{
word a = cpu->rd;
word b = cpu->bmux;
if(mode&020){
// logical
switch(mode&017){
case 000: cpu->alu = ~a; break;
case 001: cpu->alu = ~a & ~b; break;
case 002: cpu->alu = ~a & b; break;
case 003: cpu->alu = 0; break;
case 004: cpu->alu = ~a | ~b; break;
case 005: cpu->alu = ~b; break;
case 006: cpu->alu = a ^ b; break;
case 007: cpu->alu = a & ~b; break;
case 010: cpu->alu = ~a | b; break;
case 011: cpu->alu = ~a ^ b; break;
case 012: cpu->alu = b; break;
case 013: cpu->alu = a & b; break;
case 014: cpu->alu = ~0; break;
case 015: cpu->alu = a | ~b; break;
case 016: cpu->alu = a | b; break;
case 017: cpu->alu = a; break;
}
cpu->alu_cry = 0;
}else{
// arithmetic
word xa, xb;
// some of these should probably be swapped but who cares
switch(mode&017){
case 000: xa = a; xb = 0; break;
case 001: xa = a | b; xb = 0; break;
case 002: xa = a | ~b; xb = 0; break;
case 003: xa = ~0; xb = 0; break;
case 004: xa = a; xb = a & ~b; break;
case 005: xa = a | b; xb = a & ~b; break;
case 006: xa = a; xb = ~b; break;
case 007: xa = ~a | b; xb = 0; break;
case 010: xa = a; xb = a & b; break;
case 011: xa = a; xb = b; break;
case 012: xa = a | ~b; xb = a & b; break;
case 013: xa = ~a | ~b; xb = 0; break;
case 014: xa = a; xb = a; break;
case 015: xa = a | b; xb = a; break;
case 016: xa = a | ~b; xb = a; break;
case 017: xa = ~a; xb = 0; break;
}
cpu->alu = xa + xb + cin;
cpu->alu_cry = (xa^xb)&~cpu->alu | xa&xb;
}
}
static void
updateDMUX(KD11A *cpu)
{
switch(cpu->u.sdm){
case 0:
cpu->dmux = cpu->rd;
break;
case 1:
cpu->dmux = UNIBUS_DATA;
break;
case 2:
cpu->dmux = cpu->dr;
break;
case 3:
cpu->dmux = cpu->dr>>1 | cpu->dcry<<15;
break;
}
}
// update combinational elements
static void
update(KD11A *cpu)
{
// TODO: SP
cpu->radr = 0;
if(cpu->u.srx&1) // SRI
cpu->radr |= cpu->u.rif;
if(cpu->u.srx&2) // SRBA
cpu->radr |= cpu->ba&017;
if(cpu->u.srx&4) // SRD
cpu->radr |= cpu->ir&7;
if(cpu->u.srx&010) // SRS
cpu->radr |= (cpu->ir>>6)&7;
int cin = 0;
int r67, inc2;
if((cpu->u.sbm&3)==3 || ((cpu->u.sbm>>2)&3)==3)
switch(cpu->u.sbc){
case 0:
if(cpu->stall || cpu->berr)
cpu->bc = 4;
else if(cpu->trap)
cpu->bc = cpu->irdec.stpm;
else if(TRACE)
cpu->bc = 014;
else if(cpu->bovflw)
cpu->bc = 4;
else if(cpu->pwrdn)
cpu->bc = 024;
break;
case 001:
cpu->bc = 1;
break;
case 003:
cpu->bc = 1;
r67 = cpu->radr==6 || cpu->radr==7;
inc2 = r67 || !(cpu->irdec.flags & IR_BYTE_INSTR);
if(cpu->u.alu&1 && inc2)
cin = 1;
if(cpu->u.alu&2 && !inc2)
cin = 1;
break;
case 002:
cpu->bc = 2;
break;
case 005: // 5 undocumented and unused
case 007:
cpu->bc = cpu->exam|cpu->dep;
break;
case 010:
cpu->bc = 0177570;
break;
case 011:
cpu->bc = 024; // TODO? jumpers
break;
case 012:
cpu->bc = 017;
break;
case 013:
cpu->bc = 077;
break;
case 014:
// this seems awfully small
cpu->bc = !cpu->enable_mclk << 4;
break;
case 015:
cpu->bc = 0250;
break;
case 017:
cpu->bc = 4;
break;
default:
printf(" not implemented: SBC %02o\n", cpu->u.sbc);
cpu->bc = 0;
}
cpu->bmux = 0;
// BMUX hi
switch((cpu->u.sbm>>2)&3){
case 0:
cpu->bmux |= cpu->br&0177400;
break;
case 1:
cpu->bmux |= (cpu->br&0200) ? 0177400 : 0;
break;
case 2:
cpu->bmux |= (cpu->br<<8)&0177400;
break;
case 3:
cpu->bmux |= cpu->bc&0177400;
break;
}
// BMUX lo
switch(cpu->u.sbm&3){
case 0: case 1:
cpu->bmux |= cpu->br&0377;
break;
case 2:
cpu->bmux |= (cpu->br>>8)&0377;
break;
case 3:
cpu->bmux |= cpu->bc&0377;
break;
}
cpu->rd = 0;
if(cpu->u.srx)
cpu->rd |= cpu->reg[cpu->radr];
if(cpu->u.sps==6 || cpu->u.sps==3 && (cpu->ir&0177740) == 0240)
cpu->rd |= rdps(cpu);
int alu;
if((cpu->u.dad&014) == 014){
// ALU mode from IR
if(cpu->irdec.flags & IR_CIN1)
cin = 1;
else if(cpu->irdec.flags & IR_CINC)
cin = cpu->ps_flags&1;
// ALUM
if(cpu->irdec.flags & IR_ALUM_N && cpu->ps_flags & PSW_N)
alu = cpu->irdec.alu2&020;
else
alu = cpu->irdec.alu1&020;
// ALUS
if(cpu->irdec.flags & IR_UALUS)
alu |= cpu->u.alu&017;
else if(cpu->irdec.flags & IR_ALUS_C && cpu->ps_flags & PSW_C)
alu |= cpu->irdec.alu2&017;
else
alu |= cpu->irdec.alu1&017;
}else{
// ALU mode from Uword
if((cpu->u.dad&016) == 010)
cin = 1;
alu = cpu->u.alu;
}
updateALU(cpu, alu, cin);
cpu->coutmux = 0;
switch(cpu->irdec.comux){
case 0:
cpu->coutmux = !!(cpu->alu_cry&0100000);
break;
case 1:
cpu->coutmux = !!(cpu->alu_cry&0200);
break;
case 2:
cpu->coutmux = cpu->ps_flags&1;
break;
case 3:
cpu->coutmux = !!(cpu->alu&0100000);
break;
}
updateDMUX(cpu);
// BAMUX
switch(cpu->u.sba){
case 0:
cpu->bamux = cpu->alu;
break;
case 1:
cpu->bamux = cpu->rd;
break;
}
}
static void
uclk(KD11A *cpu)
{
cpu->pupp = cpu->upp;
cpu->u = urom[cpu->upp];
cpu->upp = cpu->u.upf | cpu->bubc;
trace("clocking %03o %s -> %03o\n", cpu->pupp, cpu->u.name, cpu->upp);
}
static void
p1(KD11A *cpu)
{
cpu->awby = cpu->u.bus == 2;
// CLK BUS
if(cpu->u.bus&1)
clkbus(cpu);
// CLK BA
if(cpu->u.cba)
clkba(cpu);
// CLK B
if(cpu->u.cb)
cpu->br = cpu->dmux;
// CLK PS
if(cpu->u.sps&3)
clkflags(cpu);
// WR R
if(cpu->u.srx){
switch(cpu->u.wr){
case 1:
cpu->reg[cpu->radr] = cpu->reg[cpu->radr]&~0377 | cpu->dmux&0377;
break;
case 2:
cpu->reg[cpu->radr] = cpu->reg[cpu->radr]&0377 | cpu->dmux&~0377;
break;
case 3:
cpu->reg[cpu->radr] = cpu->dmux;
}
}
// CLK IR
if(cpu->u.cir)
clkir(cpu);
// working BUTs (trap sequence)
switch(cpu->u.ubf){
case 01:
if(!(cpu->berr || cpu->trap || cpu->intr || TRACE))
cpu->bovflw = 0;
break;
case 03:
clr_berr(cpu);
break;
case 04:
if(!(cpu->berr || cpu->trap || cpu->intr || TRACE) && !cpu->bovflw)
cpu->pwrdn = 0;
cpu->stall = 0;
break;
}
}
static void
p2(KD11A *cpu)
{
// CLK BUS
if(cpu->u.bus&1)
clkbus(cpu);
if(CKOVF && !(cpu->irdec.flags & IR_NO_DATIP) &&
(BOVFLW || OVFLW_ERR))
cpu->bovflw = 1;
// CLK BA
if(cpu->u.cba)
clkba(cpu);
// CLK D
if(cpu->u.cd){
cpu->dr = cpu->alu;
cpu->dcry = cpu->coutmux;
cpu->pasta = cpu->irdec.flags&IR_BYTE_INSTR ? !!(cpu->rd&0200) : !!(cpu->rd&0100000);
}
}
static void
p3(KD11A *cpu)
{
cpu->awby = cpu->u.bus == 2;
// CLK B
if(cpu->u.cb)
cpu->br = cpu->dmux;
// CLK PS
if(cpu->u.sps&3)
clkflags(cpu);
// WR R
if(cpu->u.srx){
switch(cpu->u.wr){
case 1:
cpu->reg[cpu->radr] = cpu->reg[cpu->radr]&~0377 | cpu->dmux&0377;
break;
case 2:
cpu->reg[cpu->radr] = cpu->reg[cpu->radr]&0377 | cpu->dmux&~0377;
break;
case 3:
cpu->reg[cpu->radr] = cpu->dmux;
}
trace("wrote reg R[%o]/%o\n", cpu->radr, cpu->reg[cpu->radr]);
}
// CLK IR
if(cpu->u.cir)
clkir(cpu);
if(cpu->pwrdn && cpu->u.sbc==017){
clr_berr(cpu);
flag_clr(cpu);
}
// working BUTs
switch(cpu->u.ubf){
case 01:
if(!(cpu->berr || cpu->trap || cpu->intr || TRACE))
cpu->bovflw = 0;
break;
case 07:
cpu->brsv = 0;
cpu->wait = 0;
break;
case 026:
clkptr(cpu);
break;
}
}
static void
updateearly(KD11A *cpu)
{
cpu->brq = cpu->br_highest > cpu->ps_prio;
// can next instruction fetch overlap?
cpu->ovlap_instr = cpu->irdec.flags & IR_OVLAP_INSTR;
if(TRACE ||
cpu->con.cntl_switches & SW_HALT || cpu->pwrdn ||
cpu->brq)
cpu->ovlap_instr = 0;
// can next memory cycle overlap?
cpu->ovlap_cycle = (cpu->irdec.flags & IR_OVLAP_CYCLE) || cpu->ovlap_instr;
}
void
microstep(KD11A *cpu)
{
updateearly(cpu);
switch(cpu->u.clk>>1){
case 0: case 1:
cpu->bubc = but(cpu);
p1(cpu);
timeaddns(&cpu->inst_time, 140);
break;
case 2:
cpu->bubc = but(cpu);
p2(cpu);
timeaddns(&cpu->inst_time, 200);
break;
case 3:
p2(cpu);
// D can change, updating DMUX is all we need
updateDMUX(cpu);
cpu->bubc = but(cpu);
p3(cpu);
timeaddns(&cpu->inst_time, 300);
break;
}
if(cpu->u.clk&1)
cpu->idle = 1;
if(cpu->u.clk==0 && cpu->ovlap)
cpu->idle = 1;
uclk(cpu);