tag:github.com,2008:https://github.com/WorldofKerry/Python2Verilog/releasesTags from Python2Verilog2023-10-23T00:01:04Ztag:github.com,2008:Repository/661580396/v0.4.22023-10-23T00:01:30ZImproved error messages<p>Reduced hardware usage with nested for loops (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/182">#182</a>)</p>
<p>- Improved errors</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.4.12023-10-20T16:19:55ZChanged prefix of protocol signals and improved errors<p>Changed prefix of protocol signals (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/178">#178</a>)</p>
<p>- Errors on using reserved names
<br />- Removed MIT license disclaimer (as transpiled result has same license
<br />as source)</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.4.02023-10-19T22:57:51ZAdded for loop support without explicit instance variableWorldofKerrytag:github.com,2008:Repository/661580396/v0.3.02023-10-19T16:12:51ZAdded support for non-generator functions<p>Added support for regular functions (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/172">#172</a>)</p>
<p>- Added support for negative modulo
<br />- Added support for `True` and `False`</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.2.102023-10-16T21:04:02ZFixed potential bug with missing the done signal<p>Enhanced exclusive variables with exclusion group (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/168">#168</a>)</p>
<p>- Exclusive variables now use an exclusion group (which can be shared
<br />among exclusive variables)</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.2.92023-10-12T21:19:26ZImproved error messages<p>Improved error handling (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/165">#165</a>)</p>
<p>- Type inference now more efficient (will only look at first value if
<br />generator is not used)
<br />- Better exceptions
<br />- Hopefully removes matplotlib dependency</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.2.82023-10-11T21:09:15ZAdded support for multi-target assign, `break` and `continue` statementsWorldofKerrytag:github.com,2008:Repository/661580396/v0.2.62023-10-05T21:11:42ZImproved Optimizer<p>Remove Yield Node (<a class="issue-link js-issue-link" href="https://github.com/WorldofKerry/Python2Verilog/pull/159">#159</a>)</p>
<p>- Improved optimizer, reducing cycles across the board</p>WorldofKerrytag:github.com,2008:Repository/661580396/v0.2.52023-10-04T18:17:50ZFixed optimizer bug with optimizing function callsWorldofKerrytag:github.com,2008:Repository/661580396/v0.2.42023-10-03T16:18:27ZFixed optimizer on nested for loopsWorldofKerry