Fix typo in SIMD.md (#409)

Anonymous · web-flow · commit 2fd21c0bda21 · 2020-12-21T10:22:48.000+08:00
diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
@@ -349,7 +349,7 @@ def S.Reduce(x):
 ```
 
 There is no integer division operation provided here. This operation is not
-commonly part of bit 128-bit SIMD ISAs.
+commonly part of 128-bit SIMD ISAs.
 
 ### Integer addition
 * `i8x16.add(a: v128, b: v128) -> v128`
