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Hardware Design Stack

Welcome to the repository for the source codes discussed in the blog post available at https://rayanfam.com/topics/hardware-design-stack.

Description

Are you interested in delving into the fascinating world of hardware design? This repository is your gateway to exploring the intricacies of hardware design, from understanding fundamental concepts to hands-on experience with hardware description languages, synthesis, simulation, and more. In the blog post associated with this repository, we take you on a journey through the hardware design landscape, offering insights into various aspects, tools, and techniques that are crucial for designing and implementing hardware systems.

Table of Contents

  • Introduction
  • Analog Signals/Protocols
  • Digital Signals/Protocols
  • Source Code
  • Moore’s Law & Amdahl’s Law
  • Terms
  • Hardware Description Languages
  • Generating Hardware Using Chisel
  • C/C++ in Hardware Design
  • Vitis HLS
  • Simulating Codes
  • Simulating HDL Code Using GTKWave or ModelSim
  • Testing Codes in Chisel
  • Testing HDL Codes Using Verilator
  • Synthesising HDL Codes
  • Programming Xilinx FPGAs Using Vivado
  • Vivado Netlists
  • The Memory
  • Distributed RAMs in FPGAs
  • Block RAM (BRAM) in FPGAs
  • Static RAM (SRAM) in ASIC
  • Elaborating ASIC Designs
  • Building Hardware Layout (GDSII)
  • Reverse Engineering Netlists
  • Conclusion
  • References