@@ -62,14 +62,14 @@ module axis_tap #
62
62
/*
63
63
* AXI output
64
64
*/
65
- output wire [DATA_WIDTH- 1 :0 ] output_axis_tdata ,
66
- output wire [KEEP_WIDTH- 1 :0 ] output_axis_tkeep ,
67
- output wire output_axis_tvalid ,
68
- input wire output_axis_tready ,
69
- output wire output_axis_tlast ,
70
- output wire [ID_WIDTH- 1 :0 ] output_axis_tid ,
71
- output wire [DEST_WIDTH- 1 :0 ] output_axis_tdest ,
72
- output wire [USER_WIDTH- 1 :0 ] output_axis_tuser
65
+ output wire [DATA_WIDTH- 1 :0 ] m_axis_tdata ,
66
+ output wire [KEEP_WIDTH- 1 :0 ] m_axis_tkeep ,
67
+ output wire m_axis_tvalid ,
68
+ input wire m_axis_tready ,
69
+ output wire m_axis_tlast ,
70
+ output wire [ID_WIDTH- 1 :0 ] m_axis_tid ,
71
+ output wire [DEST_WIDTH- 1 :0 ] m_axis_tdest ,
72
+ output wire [USER_WIDTH- 1 :0 ] m_axis_tuser
73
73
);
74
74
75
75
// datapath control signals
@@ -80,15 +80,15 @@ reg [DEST_WIDTH-1:0] last_word_dest_reg = {DEST_WIDTH{1'b0}};
80
80
reg [USER_WIDTH- 1 :0 ] last_word_user_reg = {USER_WIDTH{1'b0 }};
81
81
82
82
// internal datapath
83
- reg [DATA_WIDTH- 1 :0 ] output_axis_tdata_int ;
84
- reg [KEEP_WIDTH- 1 :0 ] output_axis_tkeep_int ;
85
- reg output_axis_tvalid_int ;
86
- reg output_axis_tready_int_reg = 1'b0 ;
87
- reg output_axis_tlast_int ;
88
- reg [ID_WIDTH- 1 :0 ] output_axis_tid_int ;
89
- reg [DEST_WIDTH- 1 :0 ] output_axis_tdest_int ;
90
- reg [USER_WIDTH- 1 :0 ] output_axis_tuser_int ;
91
- wire output_axis_tready_int_early ;
83
+ reg [DATA_WIDTH- 1 :0 ] m_axis_tdata_int ;
84
+ reg [KEEP_WIDTH- 1 :0 ] m_axis_tkeep_int ;
85
+ reg m_axis_tvalid_int ;
86
+ reg m_axis_tready_int_reg = 1'b0 ;
87
+ reg m_axis_tlast_int ;
88
+ reg [ID_WIDTH- 1 :0 ] m_axis_tid_int ;
89
+ reg [DEST_WIDTH- 1 :0 ] m_axis_tdest_int ;
90
+ reg [USER_WIDTH- 1 :0 ] m_axis_tuser_int ;
91
+ wire m_axis_tready_int_early ;
92
92
93
93
localparam [1 :0 ]
94
94
STATE_IDLE = 2'd0 ,
@@ -107,30 +107,30 @@ always @* begin
107
107
108
108
frame_next = frame_reg;
109
109
110
- output_axis_tdata_int = {DATA_WIDTH{1'b0 }};
111
- output_axis_tkeep_int = {KEEP_WIDTH{1'b0 }};
112
- output_axis_tvalid_int = 1'b0 ;
113
- output_axis_tlast_int = 1'b0 ;
114
- output_axis_tid_int = {ID_WIDTH{1'b0 }};
115
- output_axis_tdest_int = {DEST_WIDTH{1'b0 }};
116
- output_axis_tuser_int = {USER_WIDTH{1'b0 }};
110
+ m_axis_tdata_int = {DATA_WIDTH{1'b0 }};
111
+ m_axis_tkeep_int = {KEEP_WIDTH{1'b0 }};
112
+ m_axis_tvalid_int = 1'b0 ;
113
+ m_axis_tlast_int = 1'b0 ;
114
+ m_axis_tid_int = {ID_WIDTH{1'b0 }};
115
+ m_axis_tdest_int = {DEST_WIDTH{1'b0 }};
116
+ m_axis_tuser_int = {USER_WIDTH{1'b0 }};
117
117
118
- if (tap_axis_tready & tap_axis_tvalid) begin
119
- frame_next = ~ tap_axis_tlast;
118
+ if (tap_axis_tready && tap_axis_tvalid) begin
119
+ frame_next = ! tap_axis_tlast;
120
120
end
121
121
122
122
case (state_reg)
123
123
STATE_IDLE: begin
124
- if (tap_axis_tready & tap_axis_tvalid) begin
124
+ if (tap_axis_tready && tap_axis_tvalid) begin
125
125
// start of frame
126
- if (output_axis_tready_int_reg ) begin
127
- output_axis_tdata_int = tap_axis_tdata;
128
- output_axis_tkeep_int = tap_axis_tkeep;
129
- output_axis_tvalid_int = tap_axis_tvalid & tap_axis_tready;
130
- output_axis_tlast_int = tap_axis_tlast;
131
- output_axis_tid_int = tap_axis_tid;
132
- output_axis_tdest_int = tap_axis_tdest;
133
- output_axis_tuser_int = tap_axis_tuser;
126
+ if (m_axis_tready_int_reg ) begin
127
+ m_axis_tdata_int = tap_axis_tdata;
128
+ m_axis_tkeep_int = tap_axis_tkeep;
129
+ m_axis_tvalid_int = tap_axis_tvalid & & tap_axis_tready;
130
+ m_axis_tlast_int = tap_axis_tlast;
131
+ m_axis_tid_int = tap_axis_tid;
132
+ m_axis_tdest_int = tap_axis_tdest;
133
+ m_axis_tuser_int = tap_axis_tuser;
134
134
if (tap_axis_tlast) begin
135
135
state_next = STATE_IDLE;
136
136
end else begin
@@ -144,16 +144,16 @@ always @* begin
144
144
end
145
145
end
146
146
STATE_TRANSFER: begin
147
- if (tap_axis_tready & tap_axis_tvalid) begin
147
+ if (tap_axis_tready && tap_axis_tvalid) begin
148
148
// transfer data
149
- if (output_axis_tready_int_reg ) begin
150
- output_axis_tdata_int = tap_axis_tdata;
151
- output_axis_tkeep_int = tap_axis_tkeep;
152
- output_axis_tvalid_int = tap_axis_tvalid & tap_axis_tready;
153
- output_axis_tlast_int = tap_axis_tlast;
154
- output_axis_tid_int = tap_axis_tid;
155
- output_axis_tdest_int = tap_axis_tdest;
156
- output_axis_tuser_int = tap_axis_tuser;
149
+ if (m_axis_tready_int_reg ) begin
150
+ m_axis_tdata_int = tap_axis_tdata;
151
+ m_axis_tkeep_int = tap_axis_tkeep;
152
+ m_axis_tvalid_int = tap_axis_tvalid & & tap_axis_tready;
153
+ m_axis_tlast_int = tap_axis_tlast;
154
+ m_axis_tid_int = tap_axis_tid;
155
+ m_axis_tdest_int = tap_axis_tdest;
156
+ m_axis_tuser_int = tap_axis_tuser;
157
157
if (tap_axis_tlast) begin
158
158
state_next = STATE_IDLE;
159
159
end else begin
@@ -168,14 +168,14 @@ always @* begin
168
168
end
169
169
end
170
170
STATE_TRUNCATE: begin
171
- if (output_axis_tready_int_reg ) begin
172
- output_axis_tdata_int = {DATA_WIDTH{1'b0 }};
173
- output_axis_tkeep_int = {{KEEP_WIDTH- 1 {1'b0 }}, 1'b1 };
174
- output_axis_tvalid_int = 1'b1 ;
175
- output_axis_tlast_int = 1'b1 ;
176
- output_axis_tid_int = last_word_id_reg;
177
- output_axis_tdest_int = last_word_dest_reg;
178
- output_axis_tuser_int = (last_word_user_reg & ~ USER_BAD_FRAME_MASK) | (USER_BAD_FRAME_VALUE & USER_BAD_FRAME_MASK);
171
+ if (m_axis_tready_int_reg ) begin
172
+ m_axis_tdata_int = {DATA_WIDTH{1'b0 }};
173
+ m_axis_tkeep_int = {{KEEP_WIDTH- 1 {1'b0 }}, 1'b1 };
174
+ m_axis_tvalid_int = 1'b1 ;
175
+ m_axis_tlast_int = 1'b1 ;
176
+ m_axis_tid_int = last_word_id_reg;
177
+ m_axis_tdest_int = last_word_dest_reg;
178
+ m_axis_tuser_int = (last_word_user_reg & ~ USER_BAD_FRAME_MASK) | (USER_BAD_FRAME_VALUE & USER_BAD_FRAME_MASK);
179
179
if (frame_next) begin
180
180
state_next = STATE_WAIT;
181
181
end else begin
@@ -186,7 +186,7 @@ always @* begin
186
186
end
187
187
end
188
188
STATE_WAIT: begin
189
- if (tap_axis_tready & tap_axis_tvalid) begin
189
+ if (tap_axis_tready && tap_axis_tvalid) begin
190
190
if (tap_axis_tlast) begin
191
191
state_next = STATE_IDLE;
192
192
end else begin
@@ -216,101 +216,101 @@ always @(posedge clk) begin
216
216
end
217
217
218
218
// output datapath logic
219
- reg [DATA_WIDTH- 1 :0 ] output_axis_tdata_reg = {DATA_WIDTH{1'b0 }};
220
- reg [KEEP_WIDTH- 1 :0 ] output_axis_tkeep_reg = {KEEP_WIDTH{1'b0 }};
221
- reg output_axis_tvalid_reg = 1'b0 , output_axis_tvalid_next ;
222
- reg output_axis_tlast_reg = 1'b0 ;
223
- reg [ID_WIDTH- 1 :0 ] output_axis_tid_reg = {ID_WIDTH{1'b0 }};
224
- reg [DEST_WIDTH- 1 :0 ] output_axis_tdest_reg = {DEST_WIDTH{1'b0 }};
225
- reg [USER_WIDTH- 1 :0 ] output_axis_tuser_reg = {USER_WIDTH{1'b0 }};
226
-
227
- reg [DATA_WIDTH- 1 :0 ] temp_axis_tdata_reg = {DATA_WIDTH{1'b0 }};
228
- reg [KEEP_WIDTH- 1 :0 ] temp_axis_tkeep_reg = {KEEP_WIDTH{1'b0 }};
229
- reg temp_axis_tvalid_reg = 1'b0 , temp_axis_tvalid_next ;
230
- reg temp_axis_tlast_reg = 1'b0 ;
231
- reg [ID_WIDTH- 1 :0 ] temp_axis_tid_reg = {ID_WIDTH{1'b0 }};
232
- reg [DEST_WIDTH- 1 :0 ] temp_axis_tdest_reg = {DEST_WIDTH{1'b0 }};
233
- reg [USER_WIDTH- 1 :0 ] temp_axis_tuser_reg = {USER_WIDTH{1'b0 }};
219
+ reg [DATA_WIDTH- 1 :0 ] m_axis_tdata_reg = {DATA_WIDTH{1'b0 }};
220
+ reg [KEEP_WIDTH- 1 :0 ] m_axis_tkeep_reg = {KEEP_WIDTH{1'b0 }};
221
+ reg m_axis_tvalid_reg = 1'b0 , m_axis_tvalid_next ;
222
+ reg m_axis_tlast_reg = 1'b0 ;
223
+ reg [ID_WIDTH- 1 :0 ] m_axis_tid_reg = {ID_WIDTH{1'b0 }};
224
+ reg [DEST_WIDTH- 1 :0 ] m_axis_tdest_reg = {DEST_WIDTH{1'b0 }};
225
+ reg [USER_WIDTH- 1 :0 ] m_axis_tuser_reg = {USER_WIDTH{1'b0 }};
226
+
227
+ reg [DATA_WIDTH- 1 :0 ] temp_m_axis_tdata_reg = {DATA_WIDTH{1'b0 }};
228
+ reg [KEEP_WIDTH- 1 :0 ] temp_m_axis_tkeep_reg = {KEEP_WIDTH{1'b0 }};
229
+ reg temp_m_axis_tvalid_reg = 1'b0 , temp_m_axis_tvalid_next ;
230
+ reg temp_m_axis_tlast_reg = 1'b0 ;
231
+ reg [ID_WIDTH- 1 :0 ] temp_m_axis_tid_reg = {ID_WIDTH{1'b0 }};
232
+ reg [DEST_WIDTH- 1 :0 ] temp_m_axis_tdest_reg = {DEST_WIDTH{1'b0 }};
233
+ reg [USER_WIDTH- 1 :0 ] temp_m_axis_tuser_reg = {USER_WIDTH{1'b0 }};
234
234
235
235
// datapath control
236
236
reg store_axis_int_to_output;
237
237
reg store_axis_int_to_temp;
238
238
reg store_axis_temp_to_output;
239
239
240
- assign output_axis_tdata = output_axis_tdata_reg ;
241
- assign output_axis_tkeep = KEEP_ENABLE ? output_axis_tkeep_reg : {KEEP_WIDTH{1'b1 }};
242
- assign output_axis_tvalid = output_axis_tvalid_reg ;
243
- assign output_axis_tlast = output_axis_tlast_reg ;
244
- assign output_axis_tid = ID_ENABLE ? output_axis_tid_reg : {ID_WIDTH{1'b0 }};
245
- assign output_axis_tdest = DEST_ENABLE ? output_axis_tdest_reg : {DEST_WIDTH{1'b0 }};
246
- assign output_axis_tuser = USER_ENABLE ? output_axis_tuser_reg : {USER_WIDTH{1'b0 }};
240
+ assign m_axis_tdata = m_axis_tdata_reg ;
241
+ assign m_axis_tkeep = KEEP_ENABLE ? m_axis_tkeep_reg : {KEEP_WIDTH{1'b1 }};
242
+ assign m_axis_tvalid = m_axis_tvalid_reg ;
243
+ assign m_axis_tlast = m_axis_tlast_reg ;
244
+ assign m_axis_tid = ID_ENABLE ? m_axis_tid_reg : {ID_WIDTH{1'b0 }};
245
+ assign m_axis_tdest = DEST_ENABLE ? m_axis_tdest_reg : {DEST_WIDTH{1'b0 }};
246
+ assign m_axis_tuser = USER_ENABLE ? m_axis_tuser_reg : {USER_WIDTH{1'b0 }};
247
247
248
248
// enable ready input next cycle if output is ready or the temp reg will not be filled on the next cycle (output reg empty or no input)
249
- assign output_axis_tready_int_early = output_axis_tready | ( ~ temp_axis_tvalid_reg & ( ~ output_axis_tvalid_reg | ~ output_axis_tvalid_int ));
249
+ assign m_axis_tready_int_early = m_axis_tready || ( ! temp_m_axis_tvalid_reg && ( ! m_axis_tvalid_reg || ! m_axis_tvalid_int ));
250
250
251
251
always @* begin
252
252
// transfer sink ready state to source
253
- output_axis_tvalid_next = output_axis_tvalid_reg ;
254
- temp_axis_tvalid_next = temp_axis_tvalid_reg ;
253
+ m_axis_tvalid_next = m_axis_tvalid_reg ;
254
+ temp_m_axis_tvalid_next = temp_m_axis_tvalid_reg ;
255
255
256
256
store_axis_int_to_output = 1'b0 ;
257
257
store_axis_int_to_temp = 1'b0 ;
258
258
store_axis_temp_to_output = 1'b0 ;
259
259
260
- if (output_axis_tready_int_reg ) begin
260
+ if (m_axis_tready_int_reg ) begin
261
261
// input is ready
262
- if (output_axis_tready | ~ output_axis_tvalid_reg ) begin
262
+ if (m_axis_tready || ! m_axis_tvalid_reg ) begin
263
263
// output is ready or currently not valid, transfer data to output
264
- output_axis_tvalid_next = output_axis_tvalid_int ;
264
+ m_axis_tvalid_next = m_axis_tvalid_int ;
265
265
store_axis_int_to_output = 1'b1 ;
266
266
end else begin
267
267
// output is not ready, store input in temp
268
- temp_axis_tvalid_next = output_axis_tvalid_int ;
268
+ temp_m_axis_tvalid_next = m_axis_tvalid_int ;
269
269
store_axis_int_to_temp = 1'b1 ;
270
270
end
271
- end else if (output_axis_tready ) begin
271
+ end else if (m_axis_tready ) begin
272
272
// input is not ready, but output is ready
273
- output_axis_tvalid_next = temp_axis_tvalid_reg ;
274
- temp_axis_tvalid_next = 1'b0 ;
273
+ m_axis_tvalid_next = temp_m_axis_tvalid_reg ;
274
+ temp_m_axis_tvalid_next = 1'b0 ;
275
275
store_axis_temp_to_output = 1'b1 ;
276
276
end
277
277
end
278
278
279
279
always @(posedge clk) begin
280
280
if (rst) begin
281
- output_axis_tvalid_reg <= 1'b0 ;
282
- output_axis_tready_int_reg <= 1'b0 ;
283
- temp_axis_tvalid_reg <= 1'b0 ;
281
+ m_axis_tvalid_reg <= 1'b0 ;
282
+ m_axis_tready_int_reg <= 1'b0 ;
283
+ temp_m_axis_tvalid_reg <= 1'b0 ;
284
284
end else begin
285
- output_axis_tvalid_reg <= output_axis_tvalid_next ;
286
- output_axis_tready_int_reg <= output_axis_tready_int_early ;
287
- temp_axis_tvalid_reg <= temp_axis_tvalid_next ;
285
+ m_axis_tvalid_reg <= m_axis_tvalid_next ;
286
+ m_axis_tready_int_reg <= m_axis_tready_int_early ;
287
+ temp_m_axis_tvalid_reg <= temp_m_axis_tvalid_next ;
288
288
end
289
289
290
290
// datapath
291
291
if (store_axis_int_to_output) begin
292
- output_axis_tdata_reg <= output_axis_tdata_int ;
293
- output_axis_tkeep_reg <= output_axis_tkeep_int ;
294
- output_axis_tlast_reg <= output_axis_tlast_int ;
295
- output_axis_tid_reg <= output_axis_tid_int ;
296
- output_axis_tdest_reg <= output_axis_tdest_int ;
297
- output_axis_tuser_reg <= output_axis_tuser_int ;
292
+ m_axis_tdata_reg <= m_axis_tdata_int ;
293
+ m_axis_tkeep_reg <= m_axis_tkeep_int ;
294
+ m_axis_tlast_reg <= m_axis_tlast_int ;
295
+ m_axis_tid_reg <= m_axis_tid_int ;
296
+ m_axis_tdest_reg <= m_axis_tdest_int ;
297
+ m_axis_tuser_reg <= m_axis_tuser_int ;
298
298
end else if (store_axis_temp_to_output) begin
299
- output_axis_tdata_reg <= temp_axis_tdata_reg ;
300
- output_axis_tkeep_reg <= temp_axis_tkeep_reg ;
301
- output_axis_tlast_reg <= temp_axis_tlast_reg ;
302
- output_axis_tid_reg <= temp_axis_tid_reg ;
303
- output_axis_tdest_reg <= temp_axis_tdest_reg ;
304
- output_axis_tuser_reg <= temp_axis_tuser_reg ;
299
+ m_axis_tdata_reg <= temp_m_axis_tdata_reg ;
300
+ m_axis_tkeep_reg <= temp_m_axis_tkeep_reg ;
301
+ m_axis_tlast_reg <= temp_m_axis_tlast_reg ;
302
+ m_axis_tid_reg <= temp_m_axis_tid_reg ;
303
+ m_axis_tdest_reg <= temp_m_axis_tdest_reg ;
304
+ m_axis_tuser_reg <= temp_m_axis_tuser_reg ;
305
305
end
306
306
307
307
if (store_axis_int_to_temp) begin
308
- temp_axis_tdata_reg <= output_axis_tdata_int ;
309
- temp_axis_tkeep_reg <= output_axis_tkeep_int ;
310
- temp_axis_tlast_reg <= output_axis_tlast_int ;
311
- temp_axis_tid_reg <= output_axis_tid_int ;
312
- temp_axis_tdest_reg <= output_axis_tdest_int ;
313
- temp_axis_tuser_reg <= output_axis_tuser_int ;
308
+ temp_m_axis_tdata_reg <= m_axis_tdata_int ;
309
+ temp_m_axis_tkeep_reg <= m_axis_tkeep_int ;
310
+ temp_m_axis_tlast_reg <= m_axis_tlast_int ;
311
+ temp_m_axis_tid_reg <= m_axis_tid_int ;
312
+ temp_m_axis_tdest_reg <= m_axis_tdest_int ;
313
+ temp_m_axis_tuser_reg <= m_axis_tuser_int ;
314
314
end
315
315
end
316
316
0 commit comments