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German university in Cario
- Cairo
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16:12
(UTC +03:00) - @khalid_shapan0
- in/khalidabdelaziz
- khalid.shapan.mohamed
Highlights
- Pro
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FPGA-Secure-Communication-System
FPGA-Secure-Communication-System PublicDeveloped a secure communication system using VHDL and Vivado on BASYS3 boards. - Implemented AES encryption on the first board to secure input data, and transmitted the encrypted data via UART. - …
VHDL 1
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PingPong_Game
PingPong_Game Public- The project involves designing and implementing a Ping Pong game using VHDL programming language and the VGA BASYS3 board. The game will have two paddles and a ball that will bounce back and fort…
VHDL 1
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mini_mips_34
mini_mips_34 PublicVHDL implementation for a simple five stage pipelined processor, Mini-MIPS, which is a subset of the 32-bit MIPS architecture . Mini-MIPS uses the same 3 instruction formats of MIPS (R, I and J-typ…
VHDL 1
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Health_monitor_online_application
Health_monitor_online_application PublicDeveloped an online health monitoring system using sensors and microcontrollers. A PIC microcontroller processed heart rate and temperature data, transmitted it via Bluetooth to an ESP module, and …
C 1
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Sobel_edge_detection_verilog
Sobel_edge_detection_verilog PublicThis project implements the Sobel edge detection algorithm in Verilog for image processing tasks. The Sobel operator is commonly used to detect edges in images by calculating the gradient magnitude…
Verilog 1
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