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Memory map #33
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Some assumptions from my side: each 2MiB Page has one Byte in the os_MemoryMap structure the whole memory is identity mapped (behave like paging is off) PML4 is a structure to keep track of virtual memory pages From Pure64/Pure64.asm/line 183 I'd recommend to set up the paging tables so that we can enter long mode(basically identity map everything) and keep the usage information in a seperate region This has the drawbacks, that we can't load more than one application at a time unless
with paging enabled we could load more than one application to virtual address 0x200000, but this hinders IPC because u cannot just share some pointer between the two and but a spinlock infront of it |
The question is if there are plans to make BareMetal-OS a multi-threading and multi-tasking OS. If yes, then there is another question. Just keep in mind that BareMetal is an exokernel, which means every program will have to supply it's own drivers, which could influence each other. |
Also a link to what PML4 exactly is: https://lwn.net/Articles/106177/ |
The idea here is to use the PML4 as the memory map instead of the separate 128KB I was going to test using the More info on those bits are in the Intel SDM docs. Section 4.4.2 - Table 4-9. |
Following up the questions from @benaryorg The BareMetal exokernel supports multi-threading but not in the conventional sense that most operating systems use. A thread is locked to a CPU core in BareMetal. If you spawn 5 "threads" and only have 4 cores then the last thread will only run once one of the first have completed. No worries on drivers. BareMetal publishes a simple API for the drivers (network and disk). Right now a single bad program can crash the OS (for instance if you overwrite the IDT at memory address 0x0). There needs to be some work done to make sure that isn't possible. |
Will this be Ok if we allocate the pages based on Present flag at the place of os_MemoryMap?? |
Use the PML4 to keep track of pages in use instead of a separate area of memory?
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