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SSDT-USB.dsl
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SSDT-USB.dsl
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// Instead of providing patched DSDT/SSDT, just include a single SSDT
// and do the rest of the work in config.plist
//DefinitionBlock("", "SSDT", 2, "hack", "_USB", 0)
//{
//
// Override for USBInjectAll.kext
//
Device(UIAC)
{
Name(_HID, "UIA00000")
Name(RMCF, Package()
{
// EH01 is disabled
// EH02 is disabled
// XHC overrides (8086:9xxx)
"8086_9xxx", Package()
{
//"port-count", Buffer() { 0x0d, 0, 0, 0},
"ports", Package()
{
"HS01", Package() // HS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 0x01, 0, 0, 0 },
},
"HS02", Package() // HS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x02, 0, 0, 0 },
},
"HS03", Package() // HS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 0x03, 0, 0, 0 },
},
"HS04", Package() // HS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x04, 0, 0, 0 },
},
"HS07", Package() // bluetooth
{
"UsbConnector", 255,
"port", Buffer() { 0x07, 0, 0, 0 },
},
"SS01", Package() // SS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 0x0a, 0, 0, 0 },
},
"SS02", Package() // SS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x0b, 0, 0, 0 },
},
"SS03", Package() // SS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 0x0c, 0, 0, 0 },
},
"SS04", Package() // SS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x0d, 0, 0, 0 },
},
},
},
// XHC overrides (8086:8xxx)
"8086_8xxx", Package()
{
//"port-count", Buffer() { 0x15, 0, 0, 0},
"ports", Package()
{
"HS01", Package() // HS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 0x01, 0, 0, 0 },
},
"HS02", Package() // HS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x02, 0, 0, 0 },
},
"HS03", Package() // HS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 0x03, 0, 0, 0 },
},
"HS04", Package() // HS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x04, 0, 0, 0 },
},
"HS09", Package() // bluetooth
{
"UsbConnector", 255,
"port", Buffer() { 0x09, 0, 0, 0 },
},
"SS01", Package() // SS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 0x10, 0, 0, 0 },
},
"SS02", Package() // SS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x11, 0, 0, 0 },
},
"SS05", Package() // SS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 0x14, 0, 0, 0 },
},
"SS06", Package() // SS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x15, 0, 0, 0 },
},
},
},
// XHC overrides (8086:9cb1) Broadwell BRIX
"8086_9cb1", Package()
{
"port-count", Buffer() { 15, 0, 0, 0 },
"ports", Package()
{
"HS01", Package() // HS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 0x01, 0, 0, 0 },
},
"HS02", Package() // HS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x02, 0, 0, 0 },
},
"HS03", Package() // HS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 0x03, 0, 0, 0 },
},
"HS04", Package() // HS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 0x04, 0, 0, 0 },
},
"HS07", Package() // bluetooth
{
"UsbConnector", 255,
"port", Buffer() { 7, 0, 0, 0 },
},
"SS01", Package() // SS USB3 front top
{
"UsbConnector", 3,
"port", Buffer() { 12, 0, 0, 0 },
},
"SS02", Package() // SS USB3 front bottom
{
"UsbConnector", 3,
"port", Buffer() { 13, 0, 0, 0 },
},
"SS03", Package() // SS USB3 rear top
{
"UsbConnector", 3,
"port", Buffer() { 14, 0, 0, 0 },
},
"SS04", Package() // SS USB3 rear bottom
{
"UsbConnector", 3,
"port", Buffer() { 15, 0, 0, 0 },
},
},
},
})
}
//
// Disabling EHCI #1 (and EHCI #2)
//
External(_SB.PCI0, DeviceObj)
External(_SB.PCI0.LPCB, DeviceObj)
External(_SB.PCI0.EH01, DeviceObj)
External(_SB.PCI0.EH02, DeviceObj)
Scope(_SB.PCI0)
{
// registers needed for disabling EHC#1
Scope(EH01)
{
OperationRegion(PSTS, PCI_Config, 0x54, 2)
Field(PSTS, WordAcc, NoLock, Preserve)
{
PSTE, 2 // bits 2:0 are power state
}
}
// registers needed for disabling EHC#1
Scope(EH02)
{
OperationRegion(PSTS, PCI_Config, 0x54, 2)
Field(PSTS, WordAcc, NoLock, Preserve)
{
PSTE, 2 // bits 2:0 are power state
}
}
Scope(LPCB)
{
OperationRegion(RMLP, PCI_Config, 0xF0, 4)
Field(RMLP, DWordAcc, NoLock, Preserve)
{
RCB1, 32, // Root Complex Base Address
}
// address is in bits 31:14
OperationRegion(FDM1, SystemMemory, (RCB1 & Not((1<<14)-1)) + 0x3418, 4)
Field(FDM1, DWordAcc, NoLock, Preserve)
{
,13, // skip first 13 bits
FDE2,1, // should be bit 13 (0-based) (FD EHCI#2)
,1,
FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
}
}
Device(RMD1)
{
//Name(_ADR, 0)
Name(_HID, "RMD10000")
Method(_INI)
{
// disable EHCI#1
// put EHCI#1 in D3hot (sleep mode)
^^EH01.PSTE = 3
// disable EHCI#1 PCI space
^^LPCB.FDE1 = 1
// disable EHCI#2
// put EHCI#2 in D3hot (sleep mode)
^^EH02.PSTE = 3
// disable EHCI#2 PCI space
^^LPCB.FDE2 = 1
}
}
}
//}
//EOF