All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog, and this project adheres to Semantic Versioning.
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Added stable LIR frontend with type checker and polymorphic types.
Expanded standard instruction set.
Added methods to types, associated constants, and expanded support for foreign functions.
Changed type system to accommodate methods.
Fixed bug where unary - operator did not type-check on Float values.
Support for typechecking expressions in parallel. Support for SIMD vector instructions.
All the VM instructions now take an optional "size" constant parameter which determines the size of the vector they're operating on. The register is now a vector, not a scalar.
Removed sage-os and x86 targets. x86 will be added back later, but likely using the C target as an intermediate step to produced better optimized x86.
New VM instructions:
IncDecOffsetAndOrNotBitwiseAndBitwiseOrBitwiseXorBitwiseNot
Generated code size is now up to 7x smaller than before.