[bsp][stm32]upgrade menuconfig about crypto

RT-Thread · Jul 11, 2019 · 55bdf73 · 55bdf73
1 parent b0e037f
commit 55bdf73
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Showing 9 changed files with 136 additions and 55 deletions.
diff --git a/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto b/bsp/stm32/libraries/HAL_Drivers/Kconfig.crypto
@@ -0,0 +1,57 @@
+menuconfig BSP_USING_ONCHIP_CRYPTO
+    bool "Enable hardware crypto"
+    select RT_USING_HWCRYPTO
+    default n
+
+    if BSP_USING_ONCHIP_CRYPTO
+        config BSP_HWCRYPTO_USING_CRC
+            bool "Using Hardware CRC"
+            select RT_HWCRYPTO_USING_CRC
+            depends on (SOC_SERIES_STM32F0 || SOC_SERIES_STM32F1 || SOC_SERIES_STM32F4 || \
+                        SOC_SERIES_STM32F7 || SOC_SERIES_STM32L4 || SOC_SERIES_STM32H7)
+            default n			
+
+        if BSP_HWCRYPTO_USING_CRC             
+            config BSP_HWCRYPTO_USING_CRC_CONFIG
+                bool "Select a CRC configuration"
+                depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32H7 || \
+                            SOC_SERIES_STM32F7)
+                default y
+
+            if BSP_HWCRYPTO_USING_CRC_CONFIG
+                config BSP_HWCRYPTO_USING_CRC_07
+                    select RT_HWCRYPTO_USING_CRC_07
+                    bool "Using Hardware CRC-8 0x07 polynomial"
+                    default n
+
+                config BSP_HWCRYPTO_USING_CRC_8005
+                    select RT_HWCRYPTO_USING_CRC_8005
+                    bool "Using Hardware CRC-16 0x8005 polynomial"
+                    default n
+
+                config BSP_HWCRYPTO_USING_CRC_1021
+                    select RT_HWCRYPTO_USING_CRC_1021
+                    bool "Using Hardware CRC-16 0x1021 polynomial"
+                    default n
+
+                config BSP_HWCRYPTO_USING_CRC_3D65
+                    select RT_HWCRYPTO_USING_CRC_3D65
+                    bool "Using Hardware CRC-16 0x3D65 polynomial"
+                    default n
+
+                config BSP_HWCRYPTO_USING_CRC_04C11DB7
+                    select RT_HWCRYPTO_USING_CRC_04C11DB7
+                    bool "Using Hardware CRC-32 0x04C11DB7 polynomial"
+                    default n
+
+            endif        
+        endif        
+
+        config BSP_HWCRYPTO_USING_RNG
+            select RT_HWCRYPTO_USING_RNG
+            depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
+                        SOC_SERIES_STM32H7)
+            bool "Using Hardware RNG"
+            default n
+   endif
+endmenu  
diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c b/bsp/stm32/libraries/HAL_Drivers/drv_crypto.c
@@ -15,13 +15,8 @@
 #include "drv_crypto.h"
 #include "board.h"
 
-#if !defined(SOC_SERIES_STM32F0)&& !defined(SOC_SERIES_STM32F1) && !defined(SOC_SERIES_STM32F4) \
-    && !defined(SOC_SERIES_STM32F7)&& !defined(SOC_SERIES_STM32L4)  && !defined(SOC_SERIES_STM32H7)
-    #error "Please define at least one SOC_SERIES"
-#endif
-
-#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
-    static struct hwcrypto_crc_cfg  crc_backup_cfg;
+#if !defined(BSP_HWCRYPTO_USING_CRC)&& !defined(BSP_HWCRYPTO_USING_RNG)
+    #error "Please define at least one function about this driver"
 #endif
 
 struct stm32_hwcrypto_device
@@ -30,28 +25,16 @@ struct stm32_hwcrypto_device
     struct rt_mutex mutex;
 };
 
+#if defined(BSP_HWCRYPTO_USING_CRC)
+
 struct hash_ctx_des
 {
     CRC_HandleTypeDef contex;
 };
 
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
-static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
-{
-    rt_uint32_t gen_random = 0;
-
-    RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
-
-    if (HAL_OK ==  HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
-    {
-        return gen_random ;
-    }
-
-    return 0;
-}
-#endif
+#if defined(BSP_HWCRYPTO_USING_CRC_CONFIG)
+static struct hwcrypto_crc_cfg  crc_backup_cfg;
 
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
 static int reverse_bit(rt_uint32_t n)
 {
     n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xaaaaaaaa);
@@ -62,18 +45,19 @@ static int reverse_bit(rt_uint32_t n)
 
     return n;
 }
-#endif
+#endif /* BSP_HWCRYPTO_USING_CRC_CONFIG */
 
 static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
 {
     rt_uint32_t result = 0;
     struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+
+#if defined(BSP_HWCRYPTO_USING_CRC_CONFIG)
     CRC_HandleTypeDef *HW_TypeDef = (CRC_HandleTypeDef *)(ctx->parent.contex);
-#endif
+#endif /* BSP_HWCRYPTO_USING_CRC_CONFIG */
 
     rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(BSP_HWCRYPTO_USING_CRC_CONFIG)
     if (0 != memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)))
     {
         if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
@@ -122,17 +106,17 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
     {
         goto _exit;
     }
-#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F1)
+#else
     if (length % 4 != 0)
     {
         goto _exit;
     }
     length >>= 2;
-#endif
+#endif /* BSP_HWCRYPTO_USING_CRC_CONFIG */
 
     result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
 
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(BSP_HWCRYPTO_USING_CRC_CONFIG)
     if (HW_TypeDef->Init.OutputDataInversionMode)
     {
         ctx ->crc_cfg.last_val = reverse_bit(result);
@@ -143,32 +127,48 @@ static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, r
     }
     crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
     result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
+#endif /* BSP_HWCRYPTO_USING_CRC_CONFIG */
 
-#endif
 _exit:
     rt_mutex_release(&stm32_hw_dev->mutex);
 
     return result;
 }
 
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
-static const struct hwcrypto_rng_ops rng_ops =
+static const struct hwcrypto_crc_ops crc_ops =
 {
-    .update = _rng_rand,
+    .update = _crc_update,
 };
-#endif
+#endif /* BSP_HWCRYPTO_USING_CRC */
 
-static const struct hwcrypto_crc_ops crc_ops =
+#if defined(BSP_HWCRYPTO_USING_RNG)
+static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
 {
-    .update = _crc_update,
+    rt_uint32_t gen_random = 0;
+
+    RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
+
+    if (HAL_OK ==  HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
+    {
+        return gen_random ;
+    }
+
+    return 0;
+}
+
+static const struct hwcrypto_rng_ops rng_ops =
+{
+    .update = _rng_rand,
 };
+#endif /* BSP_HWCRYPTO_USING_RNG */
+
 static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
 {
     rt_err_t res = RT_EOK;
 
     switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
     {
-#if defined(SOC_SERIES_STM32L4)	|| defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(BSP_HWCRYPTO_USING_RNG)
     case HWCRYPTO_TYPE_RNG:
     {
         RNG_HandleTypeDef *hrng = rt_calloc(1, sizeof(RNG_HandleTypeDef));
@@ -180,7 +180,9 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
 
         break;
     }
-#endif
+#endif /* BSP_HWCRYPTO_USING_RNG */
+
+#if defined(BSP_HWCRYPTO_USING_CRC)
     case HWCRYPTO_TYPE_CRC:
     {
         CRC_HandleTypeDef *hcrc = rt_calloc(1, sizeof(CRC_HandleTypeDef));
@@ -191,22 +193,23 @@ static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
         }
 
         hcrc->Instance = CRC;
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
+#if defined(BSP_HWCRYPTO_USING_CRC_CONFIG)
         hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
         hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
         hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
         hcrc->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
         hcrc->InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
-#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F1)
+#else
         if (HAL_CRC_Init(hcrc) != HAL_OK)
         {
             res = -RT_ERROR;
         }
-#endif
+#endif /* BSP_HWCRYPTO_USING_CRC_CONFIG */
         ctx->contex = hcrc;
         ((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
         break;
     }
+#endif /* BSP_HWCRYPTO_USING_CRC */
     default:
         res = -RT_ERROR;
         break;
@@ -219,11 +222,16 @@ static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
 {
     switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
     {
+#if defined(BSP_HWCRYPTO_USING_RNG)
     case HWCRYPTO_TYPE_RNG:
         break;
+#endif /* BSP_HWCRYPTO_USING_RNG */
+
+#if defined(BSP_HWCRYPTO_USING_CRC)
     case HWCRYPTO_TYPE_CRC:
         HAL_CRC_DeInit((CRC_HandleTypeDef *)(ctx->contex));
         break;
+#endif /* BSP_HWCRYPTO_USING_CRC */
     default:
         break;
     }
@@ -237,14 +245,19 @@ static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcry
 
     switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
     {
+#if defined(BSP_HWCRYPTO_USING_RNG)
     case HWCRYPTO_TYPE_RNG:
         break;
+#endif /* BSP_HWCRYPTO_USING_RNG */
+
+#if defined(BSP_HWCRYPTO_USING_CRC)
     case HWCRYPTO_TYPE_CRC:
         if (des->contex && src->contex)
         {
             rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
         }
         break;
+#endif /* BSP_HWCRYPTO_USING_CRC */
     default:
         res = -RT_ERROR;
         break;
@@ -256,11 +269,16 @@ static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
 {
     switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
     {
+#if defined(BSP_HWCRYPTO_USING_RNG)
     case HWCRYPTO_TYPE_RNG:
         break;
+#endif /* BSP_HWCRYPTO_USING_RNG */
+
+#if defined(BSP_HWCRYPTO_USING_CRC)
     case HWCRYPTO_TYPE_CRC:
         __HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
         break;
+#endif /* BSP_HWCRYPTO_USING_CRC */
     default:
         break;
     }

diff --git a/bsp/stm32/stm32f091-st-nucleo/board/Kconfig b/bsp/stm32/stm32f091-st-nucleo/board/Kconfig
@@ -156,7 +156,7 @@ menu "On-chip Peripheral Drivers"
         select RT_USING_WDT
         default n
 
-endmenu
+    source "../libraries/HAL_Drivers/Kconfig.crypto"	
 
 menu "Board extended module Drivers"
 

diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig
@@ -200,11 +200,12 @@ menu "On-chip Peripheral Drivers"
         bool "Enable Watchdog Timer"
         select RT_USING_WDT
         default n
-
-endmenu
-
+	
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
+	
 menu "Board extended module Drivers"
 
 endmenu
 
 endmenu
+
diff --git a/bsp/stm32/stm32f407-atk-explorer/board/Kconfig b/bsp/stm32/stm32f407-atk-explorer/board/Kconfig
@@ -294,7 +294,8 @@ menu "On-chip Peripheral Drivers"
         select RT_USING_DFS
         default n
 
-endmenu
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
+
 
 menu "Board extended module Drivers"
 

diff --git a/bsp/stm32/stm32f767-atk-apollo/board/Kconfig b/bsp/stm32/stm32f767-atk-apollo/board/Kconfig
@@ -245,10 +245,12 @@ menu "On-chip Peripheral Drivers"
         select RT_USING_DFS
         default n
 
-endmenu
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
+
 
 menu "Board extended module Drivers"
 
 endmenu
 
 endmenu
+
diff --git a/bsp/stm32/stm32h743-atk-apollo/board/Kconfig b/bsp/stm32/stm32h743-atk-apollo/board/Kconfig
@@ -63,10 +63,10 @@ menu "On-chip Peripheral Drivers"
             endchoice
         endif
 
-endmenu
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
 
 menu "Board extended module Drivers"
 
 endmenu
-
+    
 endmenu
diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig
@@ -250,8 +250,8 @@ menu "On-chip Peripheral Drivers"
         bool "Enable OTGFS as USB device"
         select RT_USING_USB_DEVICE
         default n
-
-endmenu
+   
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
 
 menu "Board extended module Drivers"
 
@@ -261,7 +261,8 @@ menu "Board extended module Drivers"
         select BSP_USING_SPI2
         select PKG_USING_NRF24L01
         default n
-
+        
 endmenu
 
 endmenu
+
diff --git a/bsp/stm32/stm32l496-ali-developer/board/Kconfig b/bsp/stm32/stm32l496-ali-developer/board/Kconfig
@@ -218,11 +218,12 @@ menu "On-chip Peripheral Drivers"
         bool "Enable Watchdog Timer"
         select RT_USING_WDT
         default n
-
-endmenu
+        
+    source "../libraries/HAL_Drivers/Kconfig.crypto"
 
 menu "Board extended module Drivers"
 
 endmenu
 
 endmenu
+