From b7d6994c4a73e98794394178714e6611896a9e71 Mon Sep 17 00:00:00 2001 From: Eladash Date: Thu, 24 Aug 2023 16:27:24 +0300 Subject: [PATCH] rsx: Discard color mask writes with reserved bits --- rpcs3/Emu/RSX/RSXDisAsm.cpp | 6 +++++- rpcs3/Emu/RSX/rsx_decode.h | 13 ++++++++++++- rpcs3/Emu/RSX/rsx_methods.cpp | 19 ++++++++++++++++++- rpcs3/rpcs3qt/syntax_highlighter.cpp | 2 +- 4 files changed, 36 insertions(+), 4 deletions(-) diff --git a/rpcs3/Emu/RSX/RSXDisAsm.cpp b/rpcs3/Emu/RSX/RSXDisAsm.cpp index 5d25284c61b4..7abcc179fe40 100644 --- a/rpcs3/Emu/RSX/RSXDisAsm.cpp +++ b/rpcs3/Emu/RSX/RSXDisAsm.cpp @@ -167,7 +167,11 @@ void RSXDisAsm::Write(std::string_view str, s32 count, bool is_non_inc, u32 id) { last_opcode.clear(); - if (count >= 0) + if (count == 1 && !is_non_inc) + { + fmt::append(last_opcode, "[%08x] ( )", dump_pc); + } + else if (count >= 0) { fmt::append(last_opcode, "[%08x] (%s%u)", dump_pc, is_non_inc ? "+" : "", count); } diff --git a/rpcs3/Emu/RSX/rsx_decode.h b/rpcs3/Emu/RSX/rsx_decode.h index 42a5fb9f110d..10b58d59c4d5 100644 --- a/rpcs3/Emu/RSX/rsx_decode.h +++ b/rpcs3/Emu/RSX/rsx_decode.h @@ -1592,7 +1592,7 @@ struct registers_decoder static void dump(std::string& out, const decoded_type& decoded) { - fmt::append(out, "Surface: Z offset: %u", decoded.surface_z_offset()); + fmt::append(out, "Surface: Z offset: 0x%x", decoded.surface_z_offset()); } }; @@ -3040,10 +3040,21 @@ struct registers_decoder { return value != 0; } + + u32 is_invalid() const + { + return (value & 0xfefefefe) ? value : 0; + } }; static void dump(std::string& out, const decoded_type& decoded) { + if (u32 invalid_value = decoded.is_invalid()) + { + fmt::append(out, "Surface: color mask: invalid = 0x%08x", invalid_value); + return; + } + fmt::append(out, "Surface: color mask A = %s R = %s G = %s B = %s" , print_boolean(decoded.color_a()), print_boolean(decoded.color_r()), print_boolean(decoded.color_g()), print_boolean(decoded.color_b())); } diff --git a/rpcs3/Emu/RSX/rsx_methods.cpp b/rpcs3/Emu/RSX/rsx_methods.cpp index fb78fd790d90..50d16845ce78 100644 --- a/rpcs3/Emu/RSX/rsx_methods.cpp +++ b/rpcs3/Emu/RSX/rsx_methods.cpp @@ -849,6 +849,23 @@ namespace rsx } } + void set_color_mask(thread* rsx, u32 reg, u32 arg) + { + if (arg == method_registers.register_previous_value) + { + return; + } + + if (!method_registers.decode(reg).is_invalid()) [[ likely ]] + { + set_surface_options_dirty_bit(rsx, reg, arg); + } + else + { + method_registers.decode(reg, method_registers.register_previous_value); + } + } + void set_stencil_op(thread* rsx, u32 reg, u32 arg) { if (arg == method_registers.register_previous_value) @@ -3550,7 +3567,7 @@ namespace rsx bind(NV4097_SET_DEPTH_TEST_ENABLE, nv4097::set_surface_options_dirty_bit); bind(NV4097_SET_DEPTH_FUNC, nv4097::set_surface_options_dirty_bit); bind(NV4097_SET_DEPTH_MASK, nv4097::set_surface_options_dirty_bit); - bind(NV4097_SET_COLOR_MASK, nv4097::set_surface_options_dirty_bit); + bind(NV4097_SET_COLOR_MASK, nv4097::set_color_mask); bind(NV4097_SET_COLOR_MASK_MRT, nv4097::set_surface_options_dirty_bit); bind(NV4097_SET_TWO_SIDED_STENCIL_TEST_ENABLE, nv4097::set_surface_options_dirty_bit); bind(NV4097_SET_STENCIL_TEST_ENABLE, nv4097::set_surface_options_dirty_bit); diff --git a/rpcs3/rpcs3qt/syntax_highlighter.cpp b/rpcs3/rpcs3qt/syntax_highlighter.cpp index 4d04e66e2b41..2f889d3fa4d7 100644 --- a/rpcs3/rpcs3qt/syntax_highlighter.cpp +++ b/rpcs3/rpcs3qt/syntax_highlighter.cpp @@ -67,7 +67,7 @@ LogHighlighter::LogHighlighter(QTextDocument* parent) : Highlighter(parent) AsmHighlighter::AsmHighlighter(QTextDocument *parent) : Highlighter(parent) { - addRule("^\b[A-Z0-9]+\b", Qt::darkBlue); // Instructions + addRule("^\\b[A-Z0-9]+\\b", Qt::darkBlue); // Instructions addRule("-?R\\d[^,;\\s]*", Qt::darkRed); // -R0.* addRule("-?H\\d[^,;\\s]*", Qt::red); // -H1.* addRule("-?v\\[\\d\\]*[^,;\\s]*", Qt::darkCyan); // -v[xyz].*