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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287276 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287277 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287289 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287290 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This should provide the function similar to `--disable-libedit` with the autotools build system, which seems to be missing from the commit (r200595) that adds this. Reviewers: pcc, beanz Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D26550 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287293 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This extends FCOPYSIGN support to 512-bit vectors. I've also added tests to show what the 128-bit and 256-bit cases look like with broadcast loads. Reviewers: delena, zvi, RKSimon, spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26791 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287298 91177308-0d34-0410-b5e6-96231b3b80d8
…rs. It doesn't and hasn't for at least 9 years. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287299 91177308-0d34-0410-b5e6-96231b3b80d8
since bpf instruction set was introduced people learned to read and understand kernel verifier output whereas llvm asm output stayed obscure and unknown. Convert llvm to emit assembler text similar to kernel to avoid this discrepancy Signed-off-by: Alexei Starovoitov <ast@kernel.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287300 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287302 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287305 91177308-0d34-0410-b5e6-96231b3b80d8
There are still crashes on non-MVT types in other places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287310 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287311 91177308-0d34-0410-b5e6-96231b3b80d8
…h new unmasked versions and selects. The same thing was done to 32-bit and 64-bit element sizes previously. This will allow us to support these shuffls in InstCombineCalls along with the other variable shift intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287312 91177308-0d34-0410-b5e6-96231b3b80d8
…nsics for variable shift with 16-bit elements. This is a straightforward extension of the existing support for 32/64-bit element types. Just needed to add the additional instrinsics to the switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287316 91177308-0d34-0410-b5e6-96231b3b80d8
https://reviews.llvm.org/D26339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287328 91177308-0d34-0410-b5e6-96231b3b80d8
…xtended When we see a SETCC whose only users are zero extend operations, we can replace it with a subtraction. This results in doing all calculations in GPRs and avoids CR use. Currently we do this only for ULT, ULE, UGT and UGE condition codes. There are ways that this can be extended. For example for signed condition codes. In that case we will be introducing additional sign extend instructions, so more careful profitability analysis may be required. Another direction to extend this is for equal, not equal conditions. Also when users of SETCC are any_ext or sign_ext, we might be able to do something similar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287329 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287331 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287332 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287333 91177308-0d34-0410-b5e6-96231b3b80d8
Exploit new instructions by adding patterns to .td file. https://reviews.llvm.org/D26551 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287334 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287338 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: The addr64-based legalization is incorrect for MUBUF instructions with idxen set as well as for BUFFER_LOAD/STORE_FORMAT_* instructions. This affects e.g. shaders that access buffer textures. Since we never actually need the addr64-legalization in shaders, this patch takes the easy route and keys off the calling convention. If this ever affects (non-OpenGL) compute, the type of legalization needs to be chosen based on some TSFlag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98664 Reviewers: arsenm, tstellarAMD Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D26747 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287339 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287340 91177308-0d34-0410-b5e6-96231b3b80d8
…ons. insertUniqueBackedgeBlock in lib/Transforms/Utils/LoopSimplify.cpp now propagates existing llvm.loop metadata to newly the added backedge. llvm::TryToSimplifyUncondBranchFromEmptyBlock in lib/Transforms/Utils/Local.cpp now propagates existing llvm.loop metadata to the branch instructions in the predecessor blocks of the empty block that is removed. Differential Revision: https://reviews.llvm.org/D26495 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287341 91177308-0d34-0410-b5e6-96231b3b80d8
… insts Summary: The 32-bit instructions don't zero the high 16-bits like the 16-bit instructions do. Reviewers: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D26828 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287342 91177308-0d34-0410-b5e6-96231b3b80d8
…bled Reviewers: t.p.northover, ab, qcolombet Subscribers: mehdi_amini, vkalintiris, wdng, dberris, llvm-commits, rovka Differential Revision: https://reviews.llvm.org/D26765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287344 91177308-0d34-0410-b5e6-96231b3b80d8
…fp opportunities without AVX512VL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287348 91177308-0d34-0410-b5e6-96231b3b80d8
The MIPS MSA ASE provides instructions to convert to and from half precision floating point. This patch teaches the MIPS backend to treat f16 as a legal type and how to promote such values to f32 for the usual set of operations. As a result of this, the fexup[lr].w intrinsics no longer crash LLVM during type legalization. Reviewers: zoran.jovanvoic, vkalintiris Differential Revision: https://reviews.llvm.org/D26398 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287349 91177308-0d34-0410-b5e6-96231b3b80d8
NFC. Forgot to fix this in the original commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287350 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: LLVM will define a symbol, either EnableABIBreakingChecks or DisableABIBreakingChecks depending on the configuration setting for LLVM_ABI_BREAKING_CHECKS. The llvm-config.h header will add weak references to these symbols in every clients that includes this header. This should ensure that a mismatch triggers a link failure (or a load time failure for DSO). On MSVC, the pragma "detect_mismatch" is used instead. Reviewers: rnk, jroelofs Subscribers: llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D26841 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287352 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287488 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287489 91177308-0d34-0410-b5e6-96231b3b80d8
Identified by Pedro Giffuni in PR27636. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287490 91177308-0d34-0410-b5e6-96231b3b80d8
…nly targets Use 512-bit instructions (we already do something similar for uint_to_fp v4i32 to v4f64) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287491 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287492 91177308-0d34-0410-b5e6-96231b3b80d8
Basic AVX512F already declared uint_to_fp v4i32 as legal git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287493 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287494 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287495 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287496 91177308-0d34-0410-b5e6-96231b3b80d8
…zero vector where possible git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287497 91177308-0d34-0410-b5e6-96231b3b80d8
… aims at amending those issues. full list: vcvtps2pd vcvtudq2pd vcvtps2qq vcvttps2qq vcvtps2uqq vcvttps2uqq variants are: [Dst]XMM(zero-masked/merge-masked/unmasked) [Src]Mem64 Differential Revision: https://reviews.llvm.org/D26799 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287500 91177308-0d34-0410-b5e6-96231b3b80d8
…amend it. More specifically - (MS dialect) broadcasting variants were implemented falsely. Differential Revision: https://reviews.llvm.org/D26257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287501 91177308-0d34-0410-b5e6-96231b3b80d8
… of which show failures to fold the masking into the operation. Many of these problems are because shuffle lowering widens element size and reduces element count when possible. This causes the shuffle to become separated from the select by a bitcast. Future patches will work to improve these cases by rewriting the shuffle back to a narrow element type if we think it can result in folding the mask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287503 91177308-0d34-0410-b5e6-96231b3b80d8
…CKSS git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287504 91177308-0d34-0410-b5e6-96231b3b80d8
The tail call optimization was being used without proper consideration of ABI requirements for saving and restoring the GP. This patch restricts tail call optimization to functions within the same translation unit. Reviewers: vkalintiris Differential Revision: https://reviews.llvm.org/D24763 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287505 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287511 91177308-0d34-0410-b5e6-96231b3b80d8
…, and fixed a bug in the jump instruction This patch adds a test for the assembly code emitted with XRay instrumentation. It also fixes a bug where the operand of a jump instruction must be not the number of bytes to jump over, but rather the number of 4-byte instructions. Author: rSerge Reviewers: dberris, rengolin Differential Revision: https://reviews.llvm.org/D26805 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287516 91177308-0d34-0410-b5e6-96231b3b80d8
…erns on other instructions. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287519 91177308-0d34-0410-b5e6-96231b3b80d8
…uring creation of SwitchTypeMatcher. Previously we were factoring when the ScopeMatcher was initially created, but it might get more Matchers added to it later. Delay factoring until we have fully created/populated the ScopeMatchers. This reduces X86 isel tables by 154 bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287520 91177308-0d34-0410-b5e6-96231b3b80d8
- teach RelocVisitor to recognize bpf relocations - fix AsmInfo->PointerSize to make sure dwarf is emitted correctly - add a test for the above Signed-off-by: Alexei Starovoitov <ast@kernel.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287521 91177308-0d34-0410-b5e6-96231b3b80d8
attempt to fix big-endian bots failing on new dwarfdump test Signed-off-by: Alexei Starovoitov <ast@kernel.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287522 91177308-0d34-0410-b5e6-96231b3b80d8
…o match SSE and AVX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287523 91177308-0d34-0410-b5e6-96231b3b80d8
…Classes array Summary: For Sparc the namespace (SP) is different from the target name (Sparc), which causes the name of the array in this declaration to differ from the name used in the definition. Patch by Daniel Cederman. Reviewers: jyknight Subscribers: llvm-commits, jyknight Differential Revision: https://reviews.llvm.org/D23650 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287528 91177308-0d34-0410-b5e6-96231b3b80d8
This instruction does not exist on SI, so we need to use buffer_wbinvl1
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kzhuravl
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Dec 29, 2017
Summary:
I have been getting rather difficult to reproduce SIGBUS crashes when
compiling certain FreeBSD sources, and their stack traces pointed
squarely at `SelectionDAG::salvageDebugInfo()`:
```
Core was generated by `/usr/obj/share/dim/src/freebsd/clang600-import/amd64.amd64/tmp/usr/bin/cc -cc1 -'.
Program terminated with signal SIGBUS, Bus error.
#0 isInvalidated () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h:115
115 bool isInvalidated() const { return Invalid; }
(gdb) bt
#0 isInvalidated () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h:115
#1 salvageDebugInfo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7116
#2 0x00000000033b2516 in operator() () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3595
#3 __invoke<(lambda at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3593:59) &, llvm::SDNode *, llvm::SDNode *> () at /usr/include/c++/v1/type_traits:4323
#4 __call<(lambda at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3593:59) &, llvm::SDNode *, llvm::SDNode *> () at /usr/include/c++/v1/__functional_base:349
#5 operator() () at /usr/include/c++/v1/functional:1562
#6 0x00000000033b0817 in operator() () at /usr/include/c++/v1/functional:1916
#7 NodeDeleted () at /share/dim/src/freebsd/clang600-import/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h:293
#8 0x0000000003529dde in RemoveDeadNodes () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:610
#9 0x00000000035556df in MorphNodeTo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:6794
#10 0x00000000033a9acc in MorphNode () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:2594
#11 0x00000000033ac80b in SelectCodeCommon () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:3601
#12 0x00000000023d464b in SelectCode () at /usr/obj/share/dim/src/freebsd/clang600-import/amd64.amd64/tmp/obj-tools/lib/clang/libllvm/X86GenDAGISel.inc:282902
#13 Select () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3072
#14 0x00000000033a5afa in DoInstructionSelection () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:988
#15 0x00000000033a4e1a in CodeGenAndEmitDAG () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:868
#16 0x00000000033a2643 in SelectAllBasicBlocks () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1624
#17 0x000000000339f158 in runOnMachineFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:466
#18 0x00000000023d03c4 in runOnMachineFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:175
#19 0x00000000035cc8c2 in runOnFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/MachineFunctionPass.cpp:62
#20 0x00000000030dca9a in runOnFunction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1520
#21 0x00000000030dccf3 in runOnModule () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1541
#22 0x00000000030dd228 in runOnModule () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1597
#23 run () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/IR/LegacyPassManager.cpp:1700
#24 0x00000000014db578 in EmitAssembly () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:815
#25 EmitBackendOutput () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/BackendUtil.cpp:1181
#26 0x00000000014d5b26 in HandleTranslationUnit () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp:292
#27 0x0000000001c4c332 in ParseAST () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Parse/ParseAST.cpp:159
#28 0x00000000015d546c in Execute () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Frontend/FrontendAction.cpp:897
#29 0x0000000001cec311 in ExecuteAction () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/Frontend/CompilerInstance.cpp:991
#30 0x00000000014b4f81 in ExecuteCompilerInvocation () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp:252
#31 0x00000000014aa73f in cc1_main () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/cc1_main.cpp:221
#32 0x00000000014b2928 in ExecuteCC1Tool () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/driver.cpp:309
#33 main () at /share/dim/src/freebsd/clang600-import/contrib/llvm/tools/clang/tools/driver/driver.cpp:388
(gdb) frame 1
#1 salvageDebugInfo () at /share/dim/src/freebsd/clang600-import/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7116
7116 if (DV->isInvalidated())
(gdb) disassemble
Dump of assembler code for function salvageDebugInfo():
[...]
0x0000000003557348 <+744>: nopl 0x0(%rax,%rax,1)
0x0000000003557350 <+752>: mov (%r12),%r13
=> 0x0000000003557354 <+756>: cmpb $0x0,0x31(%r13)
0x0000000003557359 <+761>: jne 0x35573b0 <salvageDebugInfo()+848>
(gdb) info registers
[...]
r13 0x5a5a5a5a5a5a5a5a 6510615555426900570
```
The `0x5a5a5a5a5a5a5a5a` value in `r13` indicates the memory was either
uninitialized, or already freed.
Unfortunately I do not have a simple self-contained test case for this.
However, it seems pretty clear that the call to `AddDbgValue()` in
`salvageDebugInfo()` causes the problems, since it modifies
`SelectionDag::DbgInfo` while looping through one of its DenseMaps:
```
void SelectionDAG::salvageDebugInfo(SDNode &N) {
[...]
for (auto DV : GetDbgValues(&N)) {
if (DV->isInvalidated())
continue;
[...]
AddDbgValue(Clone, N0.getNode(), false);
[...]
}
}
```
At least, if I comment out the `AddDbgValue()` call, the crashes go
away. I propose to change this function slightly, similar to the
`SelectionDAG::transferDbgValues()` function just above it, to save the
cloned SDDbgValues in a separate SmallVector, and only call
AddDbgValue() on them after the for loop is done.
Reviewers: aprantl, bogner, bkramer, davide
Reviewed By: davide
Subscribers: davide, krytarowski, JDevlieghere, emaste, llvm-commits
Differential Revision: https://reviews.llvm.org/D41589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321545 91177308-0d34-0410-b5e6-96231b3b80d8
kzhuravl
pushed a commit
that referenced
this pull request
Mar 17, 2018
Optionally allow the order of restoring the callee-saved registers in the epilogue to be reversed. The flag -reverse-csr-restore-seq generates the following code: ``` stp x26, x25, [sp, #-64]! stp x24, x23, [sp, #16] stp x22, x21, [sp, #32] stp x20, x19, [sp, #48] ; [..] ldp x24, x23, [sp, #16] ldp x22, x21, [sp, #32] ldp x20, x19, [sp, #48] ldp x26, x25, [sp], #64 ret ``` Note how the CSRs are restored in the same order as they are saved. One exception to this rule is the last `ldp`, which allows us to merge the stack adjustment and the ldp into a post-index ldp. This is done by first generating: ldp x26, x27, [sp] add sp, sp, #64 which gets merged by the arm64 load store optimizer into ldp x26, x25, [sp], #64 The flag is disabled by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327569 91177308-0d34-0410-b5e6-96231b3b80d8
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