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[RISCV] Use getAllOnesConstant/getSignedConstant.
1 parent 067f2e9 commit e6ceb29

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5 files changed

+101
-90
lines changed

5 files changed

+101
-90
lines changed

‎llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 47 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,8 @@ static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
177177
RISCVMatInt::InstSeq &Seq) {
178178
SDValue SrcReg = CurDAG->getRegister(RISCV::X0, VT);
179179
for (const RISCVMatInt::Inst &Inst : Seq) {
180-
SDValue SDImm = CurDAG->getTargetConstant(Inst.getImm(), DL, VT);
180+
SDValue SDImm =
181+
CurDAG->getSignedConstant(Inst.getImm(), DL, VT, /*isTarget=*/true);
181182
SDNode *Result = nullptr;
182183
switch (Inst.getOpndKind()) {
183184
case RISCVMatInt::Imm:
@@ -208,10 +209,10 @@ static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
208209

209210
// Use a rematerializable pseudo instruction for short sequences if enabled.
210211
if (Seq.size() == 2 && UsePseudoMovImm)
211-
return SDValue(
212-
CurDAG->getMachineNode(RISCV::PseudoMovImm, DL, VT,
213-
CurDAG->getTargetConstant(Imm, DL, VT)),
214-
0);
212+
return SDValue(CurDAG->getMachineNode(RISCV::PseudoMovImm, DL, VT,
213+
CurDAG->getSignedConstant(
214+
Imm, DL, VT, /*isTarget=*/true)),
215+
0);
215216

216217
// See if we can create this constant as (ADD (SLLI X, C), X) where X is at
217218
// worst an LUI+ADDIW. This will require an extra register, but avoids a
@@ -670,9 +671,9 @@ bool RISCVDAGToDAGISel::tryShrinkShlLogicImm(SDNode *Node) {
670671

671672
unsigned ShOpc = SignExt ? RISCV::SLLIW : RISCV::SLLI;
672673

673-
SDNode *BinOp =
674-
CurDAG->getMachineNode(BinOpc, DL, VT, Shift.getOperand(0),
675-
CurDAG->getTargetConstant(ShiftedVal, DL, VT));
674+
SDNode *BinOp = CurDAG->getMachineNode(
675+
BinOpc, DL, VT, Shift.getOperand(0),
676+
CurDAG->getSignedConstant(ShiftedVal, DL, VT, /*isTarget=*/true));
676677
SDNode *SLLI =
677678
CurDAG->getMachineNode(ShOpc, DL, VT, SDValue(BinOp, 0),
678679
CurDAG->getTargetConstant(ShAmt, DL, VT));
@@ -802,7 +803,8 @@ bool RISCVDAGToDAGISel::tryIndexedLoad(SDNode *Node) {
802803

803804
EVT Ty = Ld->getOffset().getValueType();
804805
SDValue Ops[] = {Ld->getBasePtr(),
805-
CurDAG->getTargetConstant(Offset >> Shift, SDLoc(Node), Ty),
806+
CurDAG->getSignedConstant(Offset >> Shift, SDLoc(Node), Ty,
807+
/*isTarget=*/true),
806808
CurDAG->getTargetConstant(Shift, SDLoc(Node), Ty),
807809
Ld->getChain()};
808810
SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(Node), Ld->getValueType(0),
@@ -2486,8 +2488,8 @@ bool RISCVDAGToDAGISel::SelectFrameAddrRegImm(SDValue Addr, SDValue &Base,
24862488
if (isInt<12>(CVal)) {
24872489
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(),
24882490
Subtarget->getXLenVT());
2489-
Offset = CurDAG->getTargetConstant(CVal, SDLoc(Addr),
2490-
Subtarget->getXLenVT());
2491+
Offset = CurDAG->getSignedConstant(
2492+
CVal, SDLoc(Addr), Subtarget->getXLenVT(), /*isTarget=*/true);
24912493
return true;
24922494
}
24932495
}
@@ -2523,7 +2525,7 @@ static bool selectConstantAddr(SelectionDAG *CurDAG, const SDLoc &DL,
25232525
} else {
25242526
Base = CurDAG->getRegister(RISCV::X0, VT);
25252527
}
2526-
Offset = CurDAG->getTargetConstant(Lo12, DL, VT);
2528+
Offset = CurDAG->getSignedConstant(Lo12, DL, VT, /*isTarget=*/true);
25272529
return true;
25282530
}
25292531

@@ -2543,7 +2545,7 @@ static bool selectConstantAddr(SelectionDAG *CurDAG, const SDLoc &DL,
25432545
assert(!Seq.empty() && "Expected more instructions in sequence");
25442546

25452547
Base = selectImmSeq(CurDAG, DL, VT, Seq);
2546-
Offset = CurDAG->getTargetConstant(Lo12, DL, VT);
2548+
Offset = CurDAG->getSignedConstant(Lo12, DL, VT, /*isTarget=*/true);
25472549
return true;
25482550
}
25492551

@@ -2668,7 +2670,7 @@ bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr, SDValue &Base,
26682670

26692671
if (auto *FIN = dyn_cast<FrameIndexSDNode>(Base))
26702672
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), VT);
2671-
Offset = CurDAG->getTargetConstant(CVal, DL, VT);
2673+
Offset = CurDAG->getSignedConstant(CVal, DL, VT, /*isTarget=*/true);
26722674
return true;
26732675
}
26742676
}
@@ -2685,10 +2687,11 @@ bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr, SDValue &Base,
26852687
if (isInt<12>(CVal / 2) && isInt<12>(CVal - CVal / 2)) {
26862688
int64_t Adj = CVal < 0 ? -2048 : 2047;
26872689
Base = SDValue(
2688-
CurDAG->getMachineNode(RISCV::ADDI, DL, VT, Addr.getOperand(0),
2689-
CurDAG->getTargetConstant(Adj, DL, VT)),
2690+
CurDAG->getMachineNode(
2691+
RISCV::ADDI, DL, VT, Addr.getOperand(0),
2692+
CurDAG->getSignedConstant(Adj, DL, VT, /*isTarget=*/true)),
26902693
0);
2691-
Offset = CurDAG->getTargetConstant(CVal - Adj, DL, VT);
2694+
Offset = CurDAG->getSignedConstant(CVal - Adj, DL, VT, /*isTarget=*/true);
26922695
return true;
26932696
}
26942697

@@ -2741,7 +2744,7 @@ bool RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(SDValue Addr, SDValue &Base,
27412744

27422745
if (auto *FIN = dyn_cast<FrameIndexSDNode>(Base))
27432746
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), VT);
2744-
Offset = CurDAG->getTargetConstant(CVal, DL, VT);
2747+
Offset = CurDAG->getSignedConstant(CVal, DL, VT, /*isTarget=*/true);
27452748
return true;
27462749
}
27472750
}
@@ -2759,9 +2762,10 @@ bool RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(SDValue Addr, SDValue &Base,
27592762
int64_t AdjustedOffset = CVal - Adj;
27602763
Base = SDValue(CurDAG->getMachineNode(
27612764
RISCV::ADDI, DL, VT, Addr.getOperand(0),
2762-
CurDAG->getTargetConstant(AdjustedOffset, DL, VT)),
2765+
CurDAG->getSignedConstant(AdjustedOffset, DL, VT,
2766+
/*isTarget=*/true)),
27632767
0);
2764-
Offset = CurDAG->getTargetConstant(Adj, DL, VT);
2768+
Offset = CurDAG->getSignedConstant(Adj, DL, VT, /*isTarget=*/true);
27652769
return true;
27662770
}
27672771

@@ -2857,9 +2861,9 @@ bool RISCVDAGToDAGISel::selectShiftMask(SDValue N, unsigned ShiftWidth,
28572861
if (Imm % ShiftWidth == ShiftWidth - 1) {
28582862
SDLoc DL(ShAmt);
28592863
EVT VT = ShAmt.getValueType();
2860-
MachineSDNode *Not =
2861-
CurDAG->getMachineNode(RISCV::XORI, DL, VT, ShAmt.getOperand(1),
2862-
CurDAG->getTargetConstant(-1, DL, VT));
2864+
MachineSDNode *Not = CurDAG->getMachineNode(
2865+
RISCV::XORI, DL, VT, ShAmt.getOperand(1),
2866+
CurDAG->getAllOnesConstant(DL, VT, /*isTarget=*/true));
28632867
ShAmt = SDValue(Not, 0);
28642868
return true;
28652869
}
@@ -2906,21 +2910,21 @@ bool RISCVDAGToDAGISel::selectSETCC(SDValue N, ISD::CondCode ExpectedCCVal,
29062910
// If the RHS is -2048, we can use xori to produce 0 if the LHS is -2048 and
29072911
// non-zero otherwise.
29082912
if (CVal == -2048) {
2909-
Val =
2910-
SDValue(CurDAG->getMachineNode(
2911-
RISCV::XORI, DL, N->getValueType(0), LHS,
2912-
CurDAG->getTargetConstant(CVal, DL, N->getValueType(0))),
2913-
0);
2913+
Val = SDValue(CurDAG->getMachineNode(
2914+
RISCV::XORI, DL, N->getValueType(0), LHS,
2915+
CurDAG->getSignedConstant(CVal, DL, N->getValueType(0),
2916+
/*isTarget=*/true)),
2917+
0);
29142918
return true;
29152919
}
29162920
// If the RHS is [-2047,2048], we can use addi with -RHS to produce 0 if the
29172921
// LHS is equal to the RHS and non-zero otherwise.
29182922
if (isInt<12>(CVal) || CVal == 2048) {
2919-
Val =
2920-
SDValue(CurDAG->getMachineNode(
2921-
RISCV::ADDI, DL, N->getValueType(0), LHS,
2922-
CurDAG->getTargetConstant(-CVal, DL, N->getValueType(0))),
2923-
0);
2923+
Val = SDValue(CurDAG->getMachineNode(
2924+
RISCV::ADDI, DL, N->getValueType(0), LHS,
2925+
CurDAG->getSignedConstant(-CVal, DL, N->getValueType(0),
2926+
/*isTarget=*/true)),
2927+
0);
29242928
return true;
29252929
}
29262930
}
@@ -3326,7 +3330,8 @@ bool RISCVDAGToDAGISel::selectSimm5Shl2(SDValue N, SDValue &Simm5,
33263330
return false;
33273331

33283332
EVT Ty = N->getValueType(0);
3329-
Simm5 = CurDAG->getTargetConstant(Offset >> Shift, SDLoc(N), Ty);
3333+
Simm5 = CurDAG->getSignedConstant(Offset >> Shift, SDLoc(N), Ty,
3334+
/*isTarget=*/true);
33303335
Shl2 = CurDAG->getTargetConstant(Shift, SDLoc(N), Ty);
33313336
return true;
33323337
}
@@ -3343,16 +3348,16 @@ bool RISCVDAGToDAGISel::selectVLOp(SDValue N, SDValue &VL) {
33433348
N->getValueType(0));
33443349
} else if (C && C->isAllOnes()) {
33453350
// Treat all ones as VLMax.
3346-
VL = CurDAG->getTargetConstant(RISCV::VLMaxSentinel, SDLoc(N),
3347-
N->getValueType(0));
3351+
VL = CurDAG->getSignedConstant(RISCV::VLMaxSentinel, SDLoc(N),
3352+
N->getValueType(0), /*isTarget=*/true);
33483353
} else if (isa<RegisterSDNode>(N) &&
33493354
cast<RegisterSDNode>(N)->getReg() == RISCV::X0) {
33503355
// All our VL operands use an operand that allows GPRNoX0 or an immediate
33513356
// as the register class. Convert X0 to a special immediate to pass the
33523357
// MachineVerifier. This is recognized specially by the vsetvli insertion
33533358
// pass.
3354-
VL = CurDAG->getTargetConstant(RISCV::VLMaxSentinel, SDLoc(N),
3355-
N->getValueType(0));
3359+
VL = CurDAG->getSignedConstant(RISCV::VLMaxSentinel, SDLoc(N),
3360+
N->getValueType(0), /*isTarget=*/true);
33563361
} else {
33573362
VL = N;
33583363
}
@@ -3410,7 +3415,8 @@ static bool selectVSplatImmHelper(SDValue N, SDValue &SplatVal,
34103415
if (!ValidateImm(SplatImm))
34113416
return false;
34123417

3413-
SplatVal = DAG.getTargetConstant(SplatImm, SDLoc(N), Subtarget.getXLenVT());
3418+
SplatVal = DAG.getSignedConstant(SplatImm, SDLoc(N), Subtarget.getXLenVT(),
3419+
/*isTarget=*/true);
34143420
return true;
34153421
}
34163422

@@ -3504,7 +3510,8 @@ bool RISCVDAGToDAGISel::selectRVVSimm5(SDValue N, unsigned Width,
35043510
if (!isInt<5>(ImmVal))
35053511
return false;
35063512

3507-
Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), Subtarget->getXLenVT());
3513+
Imm = CurDAG->getSignedConstant(ImmVal, SDLoc(N), Subtarget->getXLenVT(),
3514+
/*isTarget=*/true);
35083515
return true;
35093516
}
35103517

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