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[AMDGPU][Attributor] Rework update of AAAMDWavesPerEU (llvm#4076)
2 parents a4487fe + bef4080 commit 5a40266

10 files changed

+105
-131
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp‎

Lines changed: 22 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -1115,73 +1115,49 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute {
11151115
Function *F = getAssociatedFunction();
11161116
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
11171117

1118-
auto TakeRange = [&](std::pair<unsigned, unsigned> R) {
1119-
auto [Min, Max] = R;
1120-
ConstantRange Range(APInt(32, Min), APInt(32, Max + 1));
1121-
IntegerRangeState RangeState(Range);
1122-
clampStateAndIndicateChange(this->getState(), RangeState);
1123-
indicateOptimisticFixpoint();
1124-
};
1125-
1126-
std::pair<unsigned, unsigned> MaxWavesPerEURange{
1127-
1U, InfoCache.getMaxWavesPerEU(*F)};
1128-
11291118
// If the attribute exists, we will honor it if it is not the default.
11301119
if (auto Attr = InfoCache.getWavesPerEUAttr(*F)) {
1120+
std::pair<unsigned, unsigned> MaxWavesPerEURange{
1121+
1U, InfoCache.getMaxWavesPerEU(*F)};
11311122
if (*Attr != MaxWavesPerEURange) {
1132-
TakeRange(*Attr);
1123+
auto [Min, Max] = *Attr;
1124+
ConstantRange Range(APInt(32, Min), APInt(32, Max + 1));
1125+
IntegerRangeState RangeState(Range);
1126+
this->getState() = RangeState;
1127+
indicateOptimisticFixpoint();
11331128
return;
11341129
}
11351130
}
11361131

1137-
// Unlike AAAMDFlatWorkGroupSize, it's getting trickier here. Since the
1138-
// calculation of waves per EU involves flat work group size, we can't
1139-
// simply use an assumed flat work group size as a start point, because the
1140-
// update of flat work group size is in an inverse direction of waves per
1141-
// EU. However, we can still do something if it is an entry function. Since
1142-
// an entry function is a terminal node, and flat work group size either
1143-
// from attribute or default will be used anyway, we can take that value and
1144-
// calculate the waves per EU based on it. This result can't be updated by
1145-
// no means, but that could still allow us to propagate it.
1146-
if (AMDGPU::isEntryFunctionCC(F->getCallingConv())) {
1147-
std::pair<unsigned, unsigned> FlatWorkGroupSize;
1148-
if (auto Attr = InfoCache.getFlatWorkGroupSizeAttr(*F))
1149-
FlatWorkGroupSize = *Attr;
1150-
else
1151-
FlatWorkGroupSize = InfoCache.getDefaultFlatWorkGroupSize(*F);
1152-
TakeRange(InfoCache.getEffectiveWavesPerEU(*F, MaxWavesPerEURange,
1153-
FlatWorkGroupSize));
1154-
}
1132+
if (AMDGPU::isEntryFunctionCC(F->getCallingConv()))
1133+
indicatePessimisticFixpoint();
11551134
}
11561135

11571136
ChangeStatus updateImpl(Attributor &A) override {
1158-
auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache());
11591137
ChangeStatus Change = ChangeStatus::UNCHANGED;
11601138

11611139
auto CheckCallSite = [&](AbstractCallSite CS) {
11621140
Function *Caller = CS.getInstruction()->getFunction();
11631141
Function *Func = getAssociatedFunction();
11641142
LLVM_DEBUG(dbgs() << '[' << getName() << "] Call " << Caller->getName()
11651143
<< "->" << Func->getName() << '\n');
1144+
(void)Func;
11661145

1167-
const auto *CallerInfo = A.getAAFor<AAAMDWavesPerEU>(
1146+
const auto *CallerAA = A.getAAFor<AAAMDWavesPerEU>(
11681147
*this, IRPosition::function(*Caller), DepClassTy::REQUIRED);
1169-
const auto *AssumedGroupSize = A.getAAFor<AAAMDFlatWorkGroupSize>(
1170-
*this, IRPosition::function(*Func), DepClassTy::REQUIRED);
1171-
if (!CallerInfo || !AssumedGroupSize || !CallerInfo->isValidState() ||
1172-
!AssumedGroupSize->isValidState())
1148+
if (!CallerAA || !CallerAA->isValidState())
11731149
return false;
11741150

1175-
unsigned Min, Max;
1176-
std::tie(Min, Max) = InfoCache.getEffectiveWavesPerEU(
1177-
*Caller,
1178-
{CallerInfo->getAssumed().getLower().getZExtValue(),
1179-
CallerInfo->getAssumed().getUpper().getZExtValue() - 1},
1180-
{AssumedGroupSize->getAssumed().getLower().getZExtValue(),
1181-
AssumedGroupSize->getAssumed().getUpper().getZExtValue() - 1});
1182-
ConstantRange CallerRange(APInt(32, Min), APInt(32, Max + 1));
1183-
IntegerRangeState CallerRangeState(CallerRange);
1184-
Change |= clampStateAndIndicateChange(this->getState(), CallerRangeState);
1151+
ConstantRange Assumed = getAssumed();
1152+
unsigned Min = std::max(Assumed.getLower().getZExtValue(),
1153+
CallerAA->getAssumed().getLower().getZExtValue());
1154+
unsigned Max = std::max(Assumed.getUpper().getZExtValue(),
1155+
CallerAA->getAssumed().getUpper().getZExtValue());
1156+
ConstantRange Range(APInt(32, Min), APInt(32, Max));
1157+
IntegerRangeState RangeState(Range);
1158+
getState() = RangeState;
1159+
Change |= getState() == Assumed ? ChangeStatus::UNCHANGED
1160+
: ChangeStatus::CHANGED;
11851161

11861162
return true;
11871163
};

‎llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll‎

Lines changed: 22 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -688,7 +688,7 @@ define void @func_call_asm() #3 {
688688
;
689689
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_call_asm
690690
; ATTRIBUTOR_HSA-SAME: () #[[ATTR16]] {
691-
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR26:[0-9]+]]
691+
; ATTRIBUTOR_HSA-NEXT: call void asm sideeffect "", ""() #[[ATTR24:[0-9]+]]
692692
; ATTRIBUTOR_HSA-NEXT: ret void
693693
;
694694
call void asm sideeffect "", ""() #3
@@ -717,7 +717,7 @@ define amdgpu_kernel void @func_kern_defined() #3 {
717717
; AKF_HSA-NEXT: ret void
718718
;
719719
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_kern_defined
720-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17:[0-9]+]] {
720+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR16]] {
721721
; ATTRIBUTOR_HSA-NEXT: call void @defined.func()
722722
; ATTRIBUTOR_HSA-NEXT: ret void
723723
;
@@ -845,7 +845,7 @@ define amdgpu_kernel void @kern_sanitize_address() #4 {
845845
; AKF_HSA-NEXT: ret void
846846
;
847847
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_sanitize_address
848-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18:[0-9]+]] {
848+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17:[0-9]+]] {
849849
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, ptr addrspace(1) null, align 4
850850
; ATTRIBUTOR_HSA-NEXT: ret void
851851
;
@@ -861,7 +861,7 @@ define void @func_sanitize_address() #4 {
861861
; AKF_HSA-NEXT: ret void
862862
;
863863
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_sanitize_address
864-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18]] {
864+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR17]] {
865865
; ATTRIBUTOR_HSA-NEXT: store volatile i32 0, ptr addrspace(1) null, align 4
866866
; ATTRIBUTOR_HSA-NEXT: ret void
867867
;
@@ -877,7 +877,7 @@ define void @func_indirect_sanitize_address() #3 {
877877
; AKF_HSA-NEXT: ret void
878878
;
879879
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_indirect_sanitize_address
880-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR19:[0-9]+]] {
880+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18:[0-9]+]] {
881881
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
882882
; ATTRIBUTOR_HSA-NEXT: ret void
883883
;
@@ -893,7 +893,7 @@ define amdgpu_kernel void @kern_indirect_sanitize_address() #3 {
893893
; AKF_HSA-NEXT: ret void
894894
;
895895
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_indirect_sanitize_address
896-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR19]] {
896+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR18]] {
897897
; ATTRIBUTOR_HSA-NEXT: call void @func_sanitize_address()
898898
; ATTRIBUTOR_HSA-NEXT: ret void
899899
;
@@ -928,7 +928,7 @@ define internal void @enqueue_block_def() #6 {
928928
; AKF_HSA-NEXT: ret void
929929
;
930930
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@enqueue_block_def
931-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR22:[0-9]+]] {
931+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR21:[0-9]+]] {
932932
; ATTRIBUTOR_HSA-NEXT: ret void
933933
;
934934
ret void
@@ -941,7 +941,7 @@ define amdgpu_kernel void @kern_call_enqueued_block_decl() {
941941
; AKF_HSA-NEXT: ret void
942942
;
943943
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_call_enqueued_block_decl
944-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23:[0-9]+]] {
944+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR22:[0-9]+]] {
945945
; ATTRIBUTOR_HSA-NEXT: call void @enqueue_block_decl()
946946
; ATTRIBUTOR_HSA-NEXT: ret void
947947
;
@@ -956,7 +956,7 @@ define amdgpu_kernel void @kern_call_enqueued_block_def() {
956956
; AKF_HSA-NEXT: ret void
957957
;
958958
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_call_enqueued_block_def
959-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR24:[0-9]+]] {
959+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23:[0-9]+]] {
960960
; ATTRIBUTOR_HSA-NEXT: call void @enqueue_block_def()
961961
; ATTRIBUTOR_HSA-NEXT: ret void
962962
;
@@ -969,7 +969,7 @@ define void @unused_enqueue_block() {
969969
; AKF_HSA-NEXT: ret void
970970
;
971971
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@unused_enqueue_block
972-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR25:[0-9]+]] {
972+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
973973
; ATTRIBUTOR_HSA-NEXT: ret void
974974
;
975975
ret void
@@ -980,7 +980,7 @@ define internal void @known_func() {
980980
; AKF_HSA-NEXT: ret void
981981
;
982982
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@known_func
983-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR25]] {
983+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
984984
; ATTRIBUTOR_HSA-NEXT: ret void
985985
;
986986
ret void
@@ -994,8 +994,8 @@ define amdgpu_kernel void @kern_callsite_enqueue_block() {
994994
; AKF_HSA-NEXT: ret void
995995
;
996996
; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@kern_callsite_enqueue_block
997-
; ATTRIBUTOR_HSA-SAME: () #[[ATTR24]] {
998-
; ATTRIBUTOR_HSA-NEXT: call void @known_func() #[[ATTR27:[0-9]+]]
997+
; ATTRIBUTOR_HSA-SAME: () #[[ATTR23]] {
998+
; ATTRIBUTOR_HSA-NEXT: call void @known_func() #[[ATTR25:[0-9]+]]
999999
; ATTRIBUTOR_HSA-NEXT: ret void
10001000
;
10011001
call void @known_func() #6
@@ -1041,17 +1041,15 @@ attributes #6 = { "enqueued-block" }
10411041
; ATTRIBUTOR_HSA: attributes #[[ATTR14]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx900" "uniform-work-group-size"="false" }
10421042
; ATTRIBUTOR_HSA: attributes #[[ATTR15]] = { nounwind "uniform-work-group-size"="false" }
10431043
; ATTRIBUTOR_HSA: attributes #[[ATTR16]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1044-
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
1045-
; ATTRIBUTOR_HSA: attributes #[[ATTR18]] = { nounwind sanitize_address "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1046-
; ATTRIBUTOR_HSA: attributes #[[ATTR19]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1047-
; ATTRIBUTOR_HSA: attributes #[[ATTR20:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
1048-
; ATTRIBUTOR_HSA: attributes #[[ATTR21:[0-9]+]] = { "enqueued-block" "uniform-work-group-size"="false" }
1049-
; ATTRIBUTOR_HSA: attributes #[[ATTR22]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "enqueued-block" "uniform-work-group-size"="false" }
1050-
; ATTRIBUTOR_HSA: attributes #[[ATTR23]] = { "uniform-work-group-size"="false" }
1051-
; ATTRIBUTOR_HSA: attributes #[[ATTR24]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
1052-
; ATTRIBUTOR_HSA: attributes #[[ATTR25]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1053-
; ATTRIBUTOR_HSA: attributes #[[ATTR26]] = { nounwind }
1054-
; ATTRIBUTOR_HSA: attributes #[[ATTR27]] = { "enqueued-block" }
1044+
; ATTRIBUTOR_HSA: attributes #[[ATTR17]] = { nounwind sanitize_address "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1045+
; ATTRIBUTOR_HSA: attributes #[[ATTR18]] = { nounwind "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1046+
; ATTRIBUTOR_HSA: attributes #[[ATTR19:[0-9]+]] = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" "uniform-work-group-size"="false" }
1047+
; ATTRIBUTOR_HSA: attributes #[[ATTR20:[0-9]+]] = { "enqueued-block" "uniform-work-group-size"="false" }
1048+
; ATTRIBUTOR_HSA: attributes #[[ATTR21]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "enqueued-block" "uniform-work-group-size"="false" }
1049+
; ATTRIBUTOR_HSA: attributes #[[ATTR22]] = { "uniform-work-group-size"="false" }
1050+
; ATTRIBUTOR_HSA: attributes #[[ATTR23]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
1051+
; ATTRIBUTOR_HSA: attributes #[[ATTR24]] = { nounwind }
1052+
; ATTRIBUTOR_HSA: attributes #[[ATTR25]] = { "enqueued-block" }
10551053
;.
10561054
; AKF_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
10571055
;.

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