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RISCVFixupKinds.h: Don’t duplicate function or class name at the beginning of the comment && fix some comments
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llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h

Lines changed: 31 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -16,73 +16,60 @@
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namespace llvm {
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namespace RISCV {
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enum Fixups {
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// fixup_riscv_hi20 - 20-bit fixup corresponding to hi(foo) for
20-
// instructions like lui
19+
// 20-bit fixup corresponding to %hi(foo) for instructions like lui
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fixup_riscv_hi20 = FirstTargetFixupKind,
22-
// fixup_riscv_lo12_i - 12-bit fixup corresponding to lo(foo) for
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// instructions like addi
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// 12-bit fixup corresponding to %lo(foo) for instructions like addi
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fixup_riscv_lo12_i,
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// fixup_riscv_lo12_s - 12-bit fixup corresponding to lo(foo) for
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// the S-type store instructions
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// 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
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fixup_riscv_lo12_s,
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// fixup_riscv_pcrel_hi20 - 20-bit fixup corresponding to pcrel_hi(foo) for
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// instructions like auipc
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// 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
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fixup_riscv_pcrel_hi20,
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// fixup_riscv_pcrel_lo12_i - 12-bit fixup corresponding to pcrel_lo(foo) for
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// instructions like addi
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// 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
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fixup_riscv_pcrel_lo12_i,
34-
// fixup_riscv_pcrel_lo12_s - 12-bit fixup corresponding to pcrel_lo(foo) for
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// the S-type store instructions
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// 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
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// instructions
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fixup_riscv_pcrel_lo12_s,
37-
// fixup_riscv_got_hi20 - 20-bit fixup corresponding to got_pcrel_hi(foo) for
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// instructions like auipc
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// 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
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// auipc
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fixup_riscv_got_hi20,
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// fixup_riscv_tprel_hi20 - 20-bit fixup corresponding to tprel_hi(foo) for
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// instructions like lui
35+
// 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
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fixup_riscv_tprel_hi20,
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// fixup_riscv_tprel_lo12_i - 12-bit fixup corresponding to tprel_lo(foo) for
44-
// instructions like addi
37+
// 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
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fixup_riscv_tprel_lo12_i,
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// fixup_riscv_tprel_lo12_s - 12-bit fixup corresponding to tprel_lo(foo) for
47-
// the S-type store instructions
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// 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
40+
// instructions
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fixup_riscv_tprel_lo12_s,
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// fixup_riscv_tprel_add - A fixup corresponding to %tprel_add(foo) for the
50-
// add_tls instruction. Used to provide a hint to the linker.
42+
// Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
43+
// hint
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fixup_riscv_tprel_add,
52-
// fixup_riscv_tls_got_hi20 - 20-bit fixup corresponding to
53-
// tls_ie_pcrel_hi(foo) for instructions like auipc
45+
// 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
46+
// auipc
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fixup_riscv_tls_got_hi20,
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// fixup_riscv_tls_gd_hi20 - 20-bit fixup corresponding to
56-
// tls_gd_pcrel_hi(foo) for instructions like auipc
48+
// 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
49+
// auipc
5750
fixup_riscv_tls_gd_hi20,
58-
// fixup_riscv_jal - 20-bit fixup for symbol references in the jal
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// instruction
51+
// 20-bit fixup for symbol references in the jal instruction
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fixup_riscv_jal,
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// fixup_riscv_branch - 12-bit fixup for symbol references in the branch
62-
// instructions
53+
// 12-bit fixup for symbol references in the branch instructions
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fixup_riscv_branch,
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// fixup_riscv_rvc_jump - 11-bit fixup for symbol references in the
65-
// compressed jump instruction
55+
// 11-bit fixup for symbol references in the compressed jump instruction
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fixup_riscv_rvc_jump,
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// fixup_riscv_rvc_branch - 8-bit fixup for symbol references in the
68-
// compressed branch instruction
57+
// 8-bit fixup for symbol references in the compressed branch instruction
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fixup_riscv_rvc_branch,
70-
// fixup_riscv_call - A fixup representing a call attached to the auipc
59+
// Fixup representing a legacy no-pic function call attached to the auipc
7160
// instruction in a pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call,
73-
// fixup_riscv_call_plt - A fixup representing a procedure linkage table call
74-
// attached to the auipc instruction in a pair composed of adjacent auipc+jalr
75-
// instructions.
62+
// Fixup representing a function call attached to the auipc instruction in a
63+
// pair composed of adjacent auipc+jalr instructions.
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fixup_riscv_call_plt,
77-
// fixup_riscv_relax - Used to generate an R_RISCV_RELAX relocation type,
78-
// which indicates the linker may relax the instruction pair.
65+
// Used to generate an R_RISCV_RELAX relocation, which indicates the linker
66+
// may relax the instruction pair.
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fixup_riscv_relax,
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// fixup_riscv_align - Used to generate an R_RISCV_ALIGN relocation type,
81-
// which indicates the linker should fixup the alignment after linker
82-
// relaxation.
68+
// Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
69+
// should fixup the alignment after linker relaxation.
8370
fixup_riscv_align,
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85-
// fixup_riscv_invalid - used as a sentinel and a marker, must be last fixup
72+
// Used as a sentinel, must be the last
8673
fixup_riscv_invalid,
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NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
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};

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