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cpu/atmega: MCU implementation of the new GPIO API #14607
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cpu/atmega: MCU implementation of the new GPIO API #14607
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@maribu May I ask you to execute a short test this PR with |
Actually, the old API was way too slow on the low end ATmega platform. Instead, a two hand-crafted assembly implementations doing the bit-banging are used - one working on 8 MHz ATmegas and one on 16 MHz ATmegas. The timing is done by relying that on ATmega each instruction takes 1 CPU cycle, except for branches and RAM accesses (which take 2). So with the driver not using the GPIO API anyway (except for the pin setup), it won't be affected by any changes in the timing. |
I see 😟 It would have been interesting to see the new API in action. |
But |
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This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
Contribution description
This PR provides the MCU implementation of the low-level GPIO API in PR #14602 for ATmega. It also contains necessary changes for ATmega boards.
This PR depends on and includes PR #14602. Only the last two commits e461608 and 8aca4d1 are new in this PR.
Testing procedure
The following tests should be executed for any ATmega board:
tests/periph_gpio_exp
and test whether basic GPIO functionality is still working.make -C tests/periph_gpio_exp test
to test whether the redirection to virtual GPIO expanders works correctly.periph/pwm
had to be changed,tests/periph_pwm
should be used to check whether PWM is still working.periph/spi
had to be changed, use any test that requires SPI to check whether SPI is still working.Issues/PRs references
Depends on PR #14602