From f3dfb740f715972ff7d36b481e1541aa50177f2c Mon Sep 17 00:00:00 2001 From: Francisco Molina Date: Mon, 4 May 2020 08:59:44 +0200 Subject: [PATCH] cpu/*: define arch implementing legacy irq api --- cpu/atmega_common/include/cpu_conf.h | 5 +++++ cpu/esp_common/include/cpu_conf_common.h | 6 +++++- cpu/fe310/include/cpu_conf.h | 5 +++++ cpu/lpc2387/include/cpu_conf.h | 5 +++++ cpu/mips_pic32mx/include/cpu_conf.h | 5 +++++ cpu/mips_pic32mz/include/cpu_conf.h | 5 +++++ cpu/msp430_common/include/cpu_conf.h | 5 +++++ cpu/native/include/cpu_conf.h | 5 +++++ 8 files changed, 40 insertions(+), 1 deletion(-) diff --git a/cpu/atmega_common/include/cpu_conf.h b/cpu/atmega_common/include/cpu_conf.h index 7e7986137b62c..22a6423d5cbf6 100644 --- a/cpu/atmega_common/include/cpu_conf.h +++ b/cpu/atmega_common/include/cpu_conf.h @@ -63,6 +63,11 @@ extern "C" { */ #define HAVE_HEAP_STATS +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif diff --git a/cpu/esp_common/include/cpu_conf_common.h b/cpu/esp_common/include/cpu_conf_common.h index 6b4f9c9d373d0..700d00994ccb5 100644 --- a/cpu/esp_common/include/cpu_conf_common.h +++ b/cpu/esp_common/include/cpu_conf_common.h @@ -44,7 +44,11 @@ */ #define BACKUP_RAM_DATA __attribute__((section(".rtc.data"))) -#ifdef __cplusplus +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + extern "C" { #endif diff --git a/cpu/fe310/include/cpu_conf.h b/cpu/fe310/include/cpu_conf.h index 698ea7873abe7..049474e86e130 100644 --- a/cpu/fe310/include/cpu_conf.h +++ b/cpu/fe310/include/cpu_conf.h @@ -39,6 +39,11 @@ */ #define HAVE_HEAP_STATS +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus extern "C" { #endif diff --git a/cpu/lpc2387/include/cpu_conf.h b/cpu/lpc2387/include/cpu_conf.h index b0e46d287e8a1..72a647ac62785 100644 --- a/cpu/lpc2387/include/cpu_conf.h +++ b/cpu/lpc2387/include/cpu_conf.h @@ -138,6 +138,11 @@ extern "C" { */ #define BACKUP_RAM_DATA __attribute__((section(".backup.data"))) +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif diff --git a/cpu/mips_pic32mx/include/cpu_conf.h b/cpu/mips_pic32mx/include/cpu_conf.h index 6d60586cc5412..f602068272e9d 100644 --- a/cpu/mips_pic32mx/include/cpu_conf.h +++ b/cpu/mips_pic32mx/include/cpu_conf.h @@ -66,6 +66,11 @@ extern "C" { #endif /** @} */ +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif diff --git a/cpu/mips_pic32mz/include/cpu_conf.h b/cpu/mips_pic32mz/include/cpu_conf.h index f307de809f3f2..3c0acf590c0f6 100644 --- a/cpu/mips_pic32mz/include/cpu_conf.h +++ b/cpu/mips_pic32mz/include/cpu_conf.h @@ -67,6 +67,11 @@ extern "C" { #endif /** @} */ +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif diff --git a/cpu/msp430_common/include/cpu_conf.h b/cpu/msp430_common/include/cpu_conf.h index eab506fe00756..bc89e42c698b4 100644 --- a/cpu/msp430_common/include/cpu_conf.h +++ b/cpu/msp430_common/include/cpu_conf.h @@ -89,6 +89,11 @@ extern "C" { */ #define HAVE_HEAP_STATS +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif diff --git a/cpu/native/include/cpu_conf.h b/cpu/native/include/cpu_conf.h index c801eafb076bf..5d90db29727a1 100644 --- a/cpu/native/include/cpu_conf.h +++ b/cpu/native/include/cpu_conf.h @@ -60,6 +60,11 @@ extern "C" { # define GNRC_PKTBUF_SIZE (2048) #endif +/** + * @brief This arch uses the non-inlined legacy irq API. + */ +#define LEGACY_IRQ_API (1) + #ifdef __cplusplus } #endif