Skip to content

Commit 42ed952

Browse files
committed
Updated main packet spec to allow for IMU and pressure floats
1 parent 0a37b26 commit 42ed952

File tree

1 file changed

+34
-26
lines changed

1 file changed

+34
-26
lines changed

README.md

Lines changed: 34 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -45,32 +45,40 @@ Byte # | Description | Type
4545
-------|-----------------|-------------------
4646
00 | Header | 0x12 - 18 decimal
4747
01 | Thruster Status | 1 bit per thruster
48-
02 | Pressure-1 | Signed int (2 bytes), High order
49-
03 | Pressure-2 | Signed int (2 bytes), Low order
50-
04 | Temp-1 | 32-bit float, Highest order
51-
05 | Temp-2 | 32-bit float, High order
52-
06 | Temp-3 | 32-bit float, Low order
53-
07 | Temp-4 | 32-bit float, Lowest order
54-
08 | IMU A-1 | Signed int (2 bytes), High order
55-
09 | IMU A-2 | Signed int (2 bytes), Low order
56-
10 | IMU B-1 | Signed int (2 bytes), High order
57-
11 | IMU B-2 | Signed int (2 bytes), Low order
58-
12 | IMU C-1 | Signed int (2 bytes), High order
59-
13 | IMU C-2 | Signed int (2 bytes), Low order
60-
14 | IMU D-1 | Signed int (2 bytes), High order
61-
15 | IMU D-2 | Signed int (2 bytes), Low order
62-
16 | IMU E-1 | Signed int (2 bytes), High order
63-
17 | IMU E-2 | Signed int (2 bytes), Low order
64-
18 | IMU F-1 | Signed int (2 bytes), High order
65-
19 | IMU F-2 | Signed int (2 bytes), Low order
66-
20 | IMU G-1 | Signed int (2 bytes), High order
67-
21 | IMU G-2 | Signed int (2 bytes), Low order
68-
22 | IMU H-1 | Signed int (2 bytes), High order
69-
23 | IMU H-2 | Signed int (2 bytes), Low order
70-
24 | IMU I-1 | Signed int (2 bytes), High order
71-
25 | IMU I-2 | Signed int (2 bytes), Low order
72-
26 | CRC8 Check | Use 0xD5 as polynomial
73-
27 | Tail Byte | 0x13 - 19 decimal
48+
02 | Pressure-1 | 32-bit float
49+
03 | Pressure-2 | 32-bit float
50+
04 | Pressure-3 | 32-bit float
51+
05 | Pressure-4 | 32-bit float
52+
06 | Temp-1 | 32-bit float
53+
07 | Temp-2 | 32-bit float
54+
08 | Temp-3 | 32-bit float
55+
09 | Temp-4 | 32-bit float
56+
10 | IMU-Lx | 32-bit float
57+
11 | IMU-Lx | 32-bit float
58+
12 | IMU-Lx | 32-bit float
59+
13 | IMU-Lx | 32-bit float
60+
14 | IMU-Ly | 32-bit float
61+
15 | IMU-Ly | 32-bit float
62+
16 | IMU-Ly | 32-bit float
63+
17 | IMU-Ly | 32-bit float
64+
18 | IMU-Lz | 32-bit float
65+
19 | IMU-Lz | 32-bit float
66+
20 | IMU-Lz | 32-bit float
67+
21 | IMU-Lz | 32-bit float
68+
22 | IMU-Rx | 32-bit float
69+
23 | IMU-Rx | 32-bit float
70+
24 | IMU-Rx | 32-bit float
71+
25 | IMU-Rx | 32-bit float
72+
26 | IMU-Ry | 32-bit float
73+
27 | IMU-Ry | 32-bit float
74+
28 | IMU-Ry | 32-bit float
75+
29 | IMU-Ry | 32-bit float
76+
30 | IMU-Rz | 32-bit float
77+
31 | IMU-Rz | 32-bit float
78+
32 | IMU-Rz | 32-bit float
79+
33 | IMU-Rz | 32-bit float
80+
34 | CRC8 Check | Use 0xD5 as polynomial
81+
35 | Tail Byte | 0x13 - 19 decimal
7482

7583

7684
C :: CRC-8 Checksum Code

0 commit comments

Comments
 (0)