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ADS1220/ads1220.c

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/*
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* ads1220.c
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*
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* AD9833 Driver
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* Author: Felipe Navarro
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*
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* Fault Common Numbers:
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* -3 Semaphore
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* -2 SPI
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* -1 Wrong Configuration
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*
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* 1 Represent Success
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*
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*/

ADS1220/ads1220.h

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/*
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* ads1220.h
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*
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* AD9833 Driver
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* Author: Felipe Navarro
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*
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* Fault Common Numbers:
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* -3 Semaphore
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* -2 SPI
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* -1 Wrong Configuration
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*
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* 1 Represent Success
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*
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*/
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#include "main.h"
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#include "stm32f4xx_hal.h"
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#include "cmsis_os.h"
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#include "spi.h"
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#include "gpio.h"
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#include "queue.h"
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#include "arm_math.h"
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/*
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* ADS1220 Registers and Command Values
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*/
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enum ADS1220_REGISTERS_AND_COMMANDS{
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//Write Single Register Command
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ADS1220_REG0_W = 0x40,
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ADS1220_REG1_W = 0x44,
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ADS1220_REG2_W = 0x48,
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ADS1220_REG3_W = 0x4C,
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//Read Single Register Command
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ADS1220_REG0_R = 0x20,
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ADS1220_REG1_R = 0x24,
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ADS1220_REG2_R = 0x28,
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ADS1220_REG3_R = 0x2C,
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//Read Data Command
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ADS1220_READ_DATA = 0x10,
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//Start Sync Conversion
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ADS1220_START_SYNC = 0x08,
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//Reset
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ADS1220_RESET = 0x06,
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//Power Down
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ADS1220_POWER_DOWN = 0x02
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};
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/*
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* ADS1220_CONFIG is an enum for making it easier to enable/disable
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* configs on the ADS1220.
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*
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* EXAMPLE OF USAGE:
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* Multiple bits Config:
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* REG = ( REG & BITMASK ) | VALUE;
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*
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* Single Bit Config:
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* REG |= ( 1UL << BIT POSITION );
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*/
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enum ADS1220_CONFIG_VALUES{
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// Config Register 0
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ADS1220_GAIN_1 = 0x00,
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ADS1220_GAIN_2,
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ADS1220_GAIN_4,
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ADS1220_GAIN_8,
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ADS1220_GAIN_16,
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ADS1220_GAIN_32,
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ADS1220_GAIN_64,
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ADS1220_GAIN_128,
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ADS1220_GAIN_BITMASK = 0xF1,
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//ADS1220 MUX CONFIG
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//Named as: First AINp Last AINn
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ADS1220_MUX_AIN0_AIN1 = 0x00,
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ADS1220_MUX_AIN0_AIN2,
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ADS1220_MUX_AIN0_AIN3,
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ADS1220_MUX_AIN1_AIN2,
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ADS1220_MUX_AIN1_AIN3,
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ADS1220_MUX_AIN2_AIN3,
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ADS1220_MUX_AIN1_AIN0,
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ADS1220_MUX_AIN3_AIN2,
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ADS1220_MUX_AIN0_AVSS,
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ADS1220_MUX_AIN1_AVSS,
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ADS1220_MUX_AIN2_AVSS,
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ADS1220_MUX_AIN3_AVSS,
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//There is more FOUR cases not listed here
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//because they're not going to be used anyway.
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ADS1220_MUX_BITMASK = 0x0F,
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// Config Register 1
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ADS1220_DATA_RATE_0 = 0x00,
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ADS1220_DATA_RATE_1,
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ADS1220_DATA_RATE_2,
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ADS1220_DATA_RATE_3,
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ADS1220_DATA_RATE_4,
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ADS1220_DATA_RATE_5,
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ADS1220_DATA_RATE_6,
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ADS1220_DATA_RATE_7, //Reserved
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ADS1220_DATA_RATE_BITMASK = 0x1F,
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ADS1220_MODE_NORMAL = 0x00,
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ADS1220_MODE_DUTY_CYCLE,
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ADS1220_MODE_TURBO,
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ADS1220_MODE_BITMASK = 0xE7,
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// Config Register 2
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ADS1220_IDAC_OFF = 0x00,
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ADS1220_IDAC_RES,
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ADS1220_IDAC_50ua,
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ADS1220_IDAC_100ua,
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ADS1220_IDAC_250ua,
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ADS1220_IDAC_500ua,
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ADS1220_IDAC_1000ua,
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ADS1220_IDAC_1500ua,
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ADS1220_IDAC_BITMASK = 0xF8,
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ADS1220_VREF_INTERNAL = 0x00,
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ADS1220_VREF_REFP0_REFN0,
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ADS1220_VREF_AIN0_AIN3,
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ADS1220_VREF_ANALOG_SUPPLY,
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ADS1220_VREF_BITMASK = 0x3F,
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// Config Register 3
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ADS1220_IDAC1_DISABLED = 0x00,
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ADS1220_IDAC1_AIN0_REFP1,
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ADS1220_IDAC1_AIN1,
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ADS1220_IDAC1_AIN2,
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ADS1220_IDAC1_AIN3_REFN1,
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ADS1220_IDAC1_REFP0,
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ADS1220_IDAC1_REFN0,
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ADS1220_IDAC1_RESERVED,
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ADS1220_IDAC1_BITMASK = 0x1F,
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ADS1220_IDAC2_DISABLED = 0x00,
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ADS1220_IDAC2_AIN0_REFP1,
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ADS1220_IDAC2_AIN1,
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ADS1220_IDAC2_AIN2,
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ADS1220_IDAC2_AIN3_REFN1,
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ADS1220_IDAC2_REFP0,
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ADS1220_IDAC2_REFN0,
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ADS1220_IDAC2_RESERVED,
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ADS1220_IDAC2_BITMASK = 0xE3,
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}ADS1220_CONFIG_VALUES;
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enum ADS1220_CONFIG_POS{
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// Config Register 0
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ADS1220_CONFIG_PGA_BYPASS = 0x0,
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ADS1220_CONFIG_GAIN = 0x1,
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ADS1220_CONFIG_MUX = 0x4,
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// Config Register 1
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ADS1220_CONFIG_BCS = 0x0,
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ADS1220_CONFIG_TS = 0x1,
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ADS1220_CONFIG_CONV_MODE = 0x2,
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ADS1220_CONFIG_OP_MODE = 0x3,
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ADS1220_CONFIG_DATA_RATE = 0x5,
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// Config Register 2
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ADS1220_CONFIG_IDAC = 0x0,
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ADS1220_CONFIG_PSW = 0x3,
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ADS1220_CONFIG_FIR_FILTER = 0x4,
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ADS1220_CONFIG_VREF = 0x6,
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// Config Register 3
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ADS1220_CONFIG_RESERVED = 0x0, // Never change this register to 1
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ADS1220_CONFIG_DRDYM = 0x1,
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ADS1220_CONFIG_I2MUX = 0x2,
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ADS1220_CONFIG_I1MUX = 0x5,
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}ADS1220_CONFIG_POS;
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enum ADS1220_FAULTS{
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ADS1220_SEMAPHORE_FAULT = -3,
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ADS1220_SPI_FAULT = -2,
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ADS1220_CONFIG_FAULT = -1,
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ADS1220_SUCCESS = 0
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}ADS1220_FAULTS;
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// Functions and Tasks Prototypes
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