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Strange behavior from EL1259 #566

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eliapellegrino opened this issue Oct 28, 2021 · 3 comments
Closed

Strange behavior from EL1259 #566

eliapellegrino opened this issue Oct 28, 2021 · 3 comments

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@eliapellegrino
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Dear all,
I am currently having some issues trying to get EL1259 (from Beckhoff company) working with SOEM. The problem arise in the transistion between PRE-OP to SAFE-OP (this is my guess), something to do with DC configuration. I read all the issues about DC (in particular I find very useful #487 and #520), and some of them help me to partially solve the issue. I try to be as concise as possible., trying to explain the problem.

First of all, the code

Firstly, I must clarify that ecx_context.manualstatechange = 0, so SOEM will automatically call INIT->PREOP and PREOP->SAFEOP transistion.

ec_init();
ec_config_init(FALSE);
check_state(EC_STATE_PRE_OP);

custom_configuration(); // Instead of assigning the PO2SOHook, due to the complexity of our application. Here I write 0x1C12 and 0x1C13 subindex per subindex using CoE.

ec_config_map(&IOmap);

1) if (!check_state(EC_STATE_SAFE_OP,timeout) ) { /*Handling errors*/ } // If timeout = 0us (no checking) everything is fine, otherwise the EL1259 will stay in state 0x02, with ALStatusCode = 0x030

ec_config_dc();
2) int chk = 10; // If I put a value greater than 10, the EL1259 will stay in state 0x02, with ALStatusCode = 0x030
    DPRINTF("[ECat_master] pdo warm up for %d process data cycles...\n", chk);
    do {
        ec_send_processdata();
        ec_receive_processdata(500);
        sleep(50us);
    } while ( chk--);

start_ecat_thread();

ec_dcsync0(EL1259_pos, true, 1000000, 0);

sleep(1s);

ec_slave[0].state = EC_STATE_OPERATIONAL;
ec_writestate(0);

With the code above, the EL1259 works well also with other slaves. What I do not understand is why, if I waste some times (also stupid prints bring the same problem of ALStatusCode = 0x030) between ec_config_map and go to OPerational, the EL1259 stays in state = 0x12 with ALStatusCode = 0x030 (Invalid DC sync configuration)

A little bit of debug

  1. When the above code is executed, what I get from my print is this
    working. All okay, but only few packets for synchornization are sent (it works, but I don't like and I don't think this is a common behavior).

  2. When I raise chk (line 1) what I get is:
    workingbuthigherchk
    Apparently no problem, but the slave didn't manage to go in SAFE-OP.

  3. When I check for state SAFE-OP (line 2), what I get is:
    workingbutchecking.

So, I think that the problem is how I configure the DC synchronization, even if I think it is set according to the ESI.

Additional information

slaveinfo -map

SOEM (Simple Open EtherCAT Master)
Slaveinfo
Starting slaveinfo
ec_init on rteth0 succeeded.
[ECat_master] Failed to reset slaves!
[ECat_master] POWER ON slaves.
3 slaves found and configured.
Calculated workcounter 4
Not all slaves reached safe operational state.
Slave 2 State=12 StatusCode=  30 : Invalid DC SYNC configuration

Slave:1
 Name:EK1100
 Output size: 0bits
 Input size: 0bits
 State: 4
 Delay: 0[ns]
 Has DC: 1
 DCParentport:0
 Activeports:1.1.0.0
 Configured address: 1001
 Man: 00000002 ID: 044c2c52 Rev: 00120000
 FMMUfunc 0:0 1:0 2:0 3:0
 MBX length wr: 0 rd: 0 MBX protocols : 00
 CoE details: 00 FoE details: 00 EoE details: 00 SoE details: 00
 Ebus current: -2000[mA]
 only LRD/LWR:0
PDO mapping according to SII :

Slave:2
 Name:EL1259
 Output size: 3328bits
 Input size: 3328bits
 State: 18
 Delay: 145[ns]
 Has DC: 1
 DCParentport:1
 Activeports:1.1.0.0
 Configured address: 1002
 Man: 00000002 ID: 04eb3052 Rev: 00120000
 SM0 A:1000 L: 256 F:00010026 Type:1
 SM1 A:1100 L: 256 F:00010022 Type:2
 SM2 A:1200 L: 416 F:00010024 Type:3
 SM3 A:1900 L: 416 F:00010020 Type:4
 FMMU0 Ls:00000000 Ll: 416 Lsb:0 Leb:7 Ps:1200 Psb:0 Ty:02 Act:01
 FMMU1 Ls:000001a0 Ll: 416 Lsb:0 Leb:7 Ps:1900 Psb:0 Ty:01 Act:01
 FMMUfunc 0:1 1:2 2:3 3:0
 MBX length wr: 256 rd: 256 MBX protocols : 0c
 CoE details: 27 FoE details: 01 EoE details: 00 SoE details: 00
 Ebus current: 130[mA]
 only LRD/LWR:0
PDO mapping according to CoE :
  SM2 outputs
     addr b   index: sub bitl data_type    name
  [0x0000.0] 0x7001:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0000.1] 0x7001:0x02 0x01 BOOLEAN      Manual output state
  [0x0000.2] 0x7001:0x03 0x01 BOOLEAN      Force order
  [0x0000.3] 0x7001:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0000.4] 0x0000:0x00 0x04
  [0x0001.0] 0x7001:0x09 0x08 UNSIGNED8    Output order counter
  [0x0002.0] 0x7001:0x11 0x08 UNSIGNED8    No of output events
  [0x0003.0] 0x0000:0x00 0x08
  [0x0004.0] 0x7001:0x21 0x01 BOOLEAN      Output event state 1
  [0x0004.1] 0x7001:0x22 0x01 BOOLEAN      Output event state 2
  [0x0004.2] 0x7001:0x23 0x01 BOOLEAN      Output event state 3
  [0x0004.3] 0x7001:0x24 0x01 BOOLEAN      Output event state 4
  [0x0004.4] 0x7001:0x25 0x01 BOOLEAN      Output event state 5
  [0x0004.5] 0x7001:0x26 0x01 BOOLEAN      Output event state 6
  [0x0004.6] 0x7001:0x27 0x01 BOOLEAN      Output event state 7
  [0x0004.7] 0x7001:0x28 0x01 BOOLEAN      Output event state 8
  [0x0005.0] 0x7001:0x29 0x01 BOOLEAN      Output event state 9
  [0x0005.1] 0x7001:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0005.2] 0x0000:0x00 0x16
  [0x0008.0] 0x7001:0x41 0x20 UNSIGNED32   Output event time 1
  [0x000C.0] 0x7001:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0010.0] 0x7001:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0014.0] 0x7001:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0018.0] 0x7001:0x45 0x20 UNSIGNED32   Output event time 5
  [0x001C.0] 0x7001:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0020.0] 0x7001:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0024.0] 0x7001:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0028.0] 0x7001:0x49 0x20 UNSIGNED32   Output event time 9
  [0x002C.0] 0x7001:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0030.0] 0x7011:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0030.1] 0x7011:0x02 0x01 BOOLEAN      Manual output state
  [0x0030.2] 0x7011:0x03 0x01 BOOLEAN      Force order
  [0x0030.3] 0x7011:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0030.4] 0x0000:0x00 0x04
  [0x0031.0] 0x7011:0x09 0x08 UNSIGNED8    Output order counter
  [0x0032.0] 0x7011:0x11 0x08 UNSIGNED8    No of output events
  [0x0033.0] 0x0000:0x00 0x08
  [0x0034.0] 0x7011:0x21 0x01 BOOLEAN      Output event state 1
  [0x0034.1] 0x7011:0x22 0x01 BOOLEAN      Output event state 2
  [0x0034.2] 0x7011:0x23 0x01 BOOLEAN      Output event state 3
  [0x0034.3] 0x7011:0x24 0x01 BOOLEAN      Output event state 4
  [0x0034.4] 0x7011:0x25 0x01 BOOLEAN      Output event state 5
  [0x0034.5] 0x7011:0x26 0x01 BOOLEAN      Output event state 6
  [0x0034.6] 0x7011:0x27 0x01 BOOLEAN      Output event state 7
  [0x0034.7] 0x7011:0x28 0x01 BOOLEAN      Output event state 8
  [0x0035.0] 0x7011:0x29 0x01 BOOLEAN      Output event state 9
  [0x0035.1] 0x7011:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0035.2] 0x0000:0x00 0x16
  [0x0038.0] 0x7011:0x41 0x20 UNSIGNED32   Output event time 1
  [0x003C.0] 0x7011:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0040.0] 0x7011:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0044.0] 0x7011:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0048.0] 0x7011:0x45 0x20 UNSIGNED32   Output event time 5
  [0x004C.0] 0x7011:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0050.0] 0x7011:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0054.0] 0x7011:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0058.0] 0x7011:0x49 0x20 UNSIGNED32   Output event time 9
  [0x005C.0] 0x7011:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0060.0] 0x7021:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0060.1] 0x7021:0x02 0x01 BOOLEAN      Manual output state
  [0x0060.2] 0x7021:0x03 0x01 BOOLEAN      Force order
  [0x0060.3] 0x7021:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0060.4] 0x0000:0x00 0x04
  [0x0061.0] 0x7021:0x09 0x08 UNSIGNED8    Output order counter
  [0x0062.0] 0x7021:0x11 0x08 UNSIGNED8    No of output events
  [0x0063.0] 0x0000:0x00 0x08
  [0x0064.0] 0x7021:0x21 0x01 BOOLEAN      Output event state 1
  [0x0064.1] 0x7021:0x22 0x01 BOOLEAN      Output event state 2
  [0x0064.2] 0x7021:0x23 0x01 BOOLEAN      Output event state 3
  [0x0064.3] 0x7021:0x24 0x01 BOOLEAN      Output event state 4
  [0x0064.4] 0x7021:0x25 0x01 BOOLEAN      Output event state 5
  [0x0064.5] 0x7021:0x26 0x01 BOOLEAN      Output event state 6
  [0x0064.6] 0x7021:0x27 0x01 BOOLEAN      Output event state 7
  [0x0064.7] 0x7021:0x28 0x01 BOOLEAN      Output event state 8
  [0x0065.0] 0x7021:0x29 0x01 BOOLEAN      Output event state 9
  [0x0065.1] 0x7021:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0065.2] 0x0000:0x00 0x16
  [0x0068.0] 0x7021:0x41 0x20 UNSIGNED32   Output event time 1
  [0x006C.0] 0x7021:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0070.0] 0x7021:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0074.0] 0x7021:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0078.0] 0x7021:0x45 0x20 UNSIGNED32   Output event time 5
  [0x007C.0] 0x7021:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0080.0] 0x7021:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0084.0] 0x7021:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0088.0] 0x7021:0x49 0x20 UNSIGNED32   Output event time 9
  [0x008C.0] 0x7021:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0090.0] 0x7031:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0090.1] 0x7031:0x02 0x01 BOOLEAN      Manual output state
  [0x0090.2] 0x7031:0x03 0x01 BOOLEAN      Force order
  [0x0090.3] 0x7031:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0090.4] 0x0000:0x00 0x04
  [0x0091.0] 0x7031:0x09 0x08 UNSIGNED8    Output order counter
  [0x0092.0] 0x7031:0x11 0x08 UNSIGNED8    No of output events
  [0x0093.0] 0x0000:0x00 0x08
  [0x0094.0] 0x7031:0x21 0x01 BOOLEAN      Output event state 1
  [0x0094.1] 0x7031:0x22 0x01 BOOLEAN      Output event state 2
  [0x0094.2] 0x7031:0x23 0x01 BOOLEAN      Output event state 3
  [0x0094.3] 0x7031:0x24 0x01 BOOLEAN      Output event state 4
  [0x0094.4] 0x7031:0x25 0x01 BOOLEAN      Output event state 5
  [0x0094.5] 0x7031:0x26 0x01 BOOLEAN      Output event state 6
  [0x0094.6] 0x7031:0x27 0x01 BOOLEAN      Output event state 7
  [0x0094.7] 0x7031:0x28 0x01 BOOLEAN      Output event state 8
  [0x0095.0] 0x7031:0x29 0x01 BOOLEAN      Output event state 9
  [0x0095.1] 0x7031:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0095.2] 0x0000:0x00 0x16
  [0x0098.0] 0x7031:0x41 0x20 UNSIGNED32   Output event time 1
  [0x009C.0] 0x7031:0x42 0x20 UNSIGNED32   Output event time 2
  [0x00A0.0] 0x7031:0x43 0x20 UNSIGNED32   Output event time 3
  [0x00A4.0] 0x7031:0x44 0x20 UNSIGNED32   Output event time 4
  [0x00A8.0] 0x7031:0x45 0x20 UNSIGNED32   Output event time 5
  [0x00AC.0] 0x7031:0x46 0x20 UNSIGNED32   Output event time 6
  [0x00B0.0] 0x7031:0x47 0x20 UNSIGNED32   Output event time 7
  [0x00B4.0] 0x7031:0x48 0x20 UNSIGNED32   Output event time 8
  [0x00B8.0] 0x7031:0x49 0x20 UNSIGNED32   Output event time 9
  [0x00BC.0] 0x7031:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x00C0.0] 0x7041:0x01 0x01 BOOLEAN      Output buffer reset
  [0x00C0.1] 0x7041:0x02 0x01 BOOLEAN      Manual output state
  [0x00C0.2] 0x7041:0x03 0x01 BOOLEAN      Force order
  [0x00C0.3] 0x7041:0x04 0x01 BOOLEAN      Enable manual operation
  [0x00C0.4] 0x0000:0x00 0x04
  [0x00C1.0] 0x7041:0x09 0x08 UNSIGNED8    Output order counter
  [0x00C2.0] 0x7041:0x11 0x08 UNSIGNED8    No of output events
  [0x00C3.0] 0x0000:0x00 0x08
  [0x00C4.0] 0x7041:0x21 0x01 BOOLEAN      Output event state 1
  [0x00C4.1] 0x7041:0x22 0x01 BOOLEAN      Output event state 2
  [0x00C4.2] 0x7041:0x23 0x01 BOOLEAN      Output event state 3
  [0x00C4.3] 0x7041:0x24 0x01 BOOLEAN      Output event state 4
  [0x00C4.4] 0x7041:0x25 0x01 BOOLEAN      Output event state 5
  [0x00C4.5] 0x7041:0x26 0x01 BOOLEAN      Output event state 6
  [0x00C4.6] 0x7041:0x27 0x01 BOOLEAN      Output event state 7
  [0x00C4.7] 0x7041:0x28 0x01 BOOLEAN      Output event state 8
  [0x00C5.0] 0x7041:0x29 0x01 BOOLEAN      Output event state 9
  [0x00C5.1] 0x7041:0x2A 0x01 BOOLEAN      Output event state 10
  [0x00C5.2] 0x0000:0x00 0x16
  [0x00C8.0] 0x7041:0x41 0x20 UNSIGNED32   Output event time 1
  [0x00CC.0] 0x7041:0x42 0x20 UNSIGNED32   Output event time 2
  [0x00D0.0] 0x7041:0x43 0x20 UNSIGNED32   Output event time 3
  [0x00D4.0] 0x7041:0x44 0x20 UNSIGNED32   Output event time 4
  [0x00D8.0] 0x7041:0x45 0x20 UNSIGNED32   Output event time 5
  [0x00DC.0] 0x7041:0x46 0x20 UNSIGNED32   Output event time 6
  [0x00E0.0] 0x7041:0x47 0x20 UNSIGNED32   Output event time 7
  [0x00E4.0] 0x7041:0x48 0x20 UNSIGNED32   Output event time 8
  [0x00E8.0] 0x7041:0x49 0x20 UNSIGNED32   Output event time 9
  [0x00EC.0] 0x7041:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x00F0.0] 0x7051:0x01 0x01 BOOLEAN      Output buffer reset
  [0x00F0.1] 0x7051:0x02 0x01 BOOLEAN      Manual output state
  [0x00F0.2] 0x7051:0x03 0x01 BOOLEAN      Force order
  [0x00F0.3] 0x7051:0x04 0x01 BOOLEAN      Enable manual operation
  [0x00F0.4] 0x0000:0x00 0x04
  [0x00F1.0] 0x7051:0x09 0x08 UNSIGNED8    Output order counter
  [0x00F2.0] 0x7051:0x11 0x08 UNSIGNED8    No of output events
  [0x00F3.0] 0x0000:0x00 0x08
  [0x00F4.0] 0x7051:0x21 0x01 BOOLEAN      Output event state 1
  [0x00F4.1] 0x7051:0x22 0x01 BOOLEAN      Output event state 2
  [0x00F4.2] 0x7051:0x23 0x01 BOOLEAN      Output event state 3
  [0x00F4.3] 0x7051:0x24 0x01 BOOLEAN      Output event state 4
  [0x00F4.4] 0x7051:0x25 0x01 BOOLEAN      Output event state 5
  [0x00F4.5] 0x7051:0x26 0x01 BOOLEAN      Output event state 6
  [0x00F4.6] 0x7051:0x27 0x01 BOOLEAN      Output event state 7
  [0x00F4.7] 0x7051:0x28 0x01 BOOLEAN      Output event state 8
  [0x00F5.0] 0x7051:0x29 0x01 BOOLEAN      Output event state 9
  [0x00F5.1] 0x7051:0x2A 0x01 BOOLEAN      Output event state 10
  [0x00F5.2] 0x0000:0x00 0x16
  [0x00F8.0] 0x7051:0x41 0x20 UNSIGNED32   Output event time 1
  [0x00FC.0] 0x7051:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0100.0] 0x7051:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0104.0] 0x7051:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0108.0] 0x7051:0x45 0x20 UNSIGNED32   Output event time 5
  [0x010C.0] 0x7051:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0110.0] 0x7051:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0114.0] 0x7051:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0118.0] 0x7051:0x49 0x20 UNSIGNED32   Output event time 9
  [0x011C.0] 0x7051:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0120.0] 0x7061:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0120.1] 0x7061:0x02 0x01 BOOLEAN      Manual output state
  [0x0120.2] 0x7061:0x03 0x01 BOOLEAN      Force order
  [0x0120.3] 0x7061:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0120.4] 0x0000:0x00 0x04
  [0x0121.0] 0x7061:0x09 0x08 UNSIGNED8    Output order counter
  [0x0122.0] 0x7061:0x11 0x08 UNSIGNED8    No of output events
  [0x0123.0] 0x0000:0x00 0x08
  [0x0124.0] 0x7061:0x21 0x01 BOOLEAN      Output event state 1
  [0x0124.1] 0x7061:0x22 0x01 BOOLEAN      Output event state 2
  [0x0124.2] 0x7061:0x23 0x01 BOOLEAN      Output event state 3
  [0x0124.3] 0x7061:0x24 0x01 BOOLEAN      Output event state 4
  [0x0124.4] 0x7061:0x25 0x01 BOOLEAN      Output event state 5
  [0x0124.5] 0x7061:0x26 0x01 BOOLEAN      Output event state 6
  [0x0124.6] 0x7061:0x27 0x01 BOOLEAN      Output event state 7
  [0x0124.7] 0x7061:0x28 0x01 BOOLEAN      Output event state 8
  [0x0125.0] 0x7061:0x29 0x01 BOOLEAN      Output event state 9
  [0x0125.1] 0x7061:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0125.2] 0x0000:0x00 0x16
  [0x0128.0] 0x7061:0x41 0x20 UNSIGNED32   Output event time 1
  [0x012C.0] 0x7061:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0130.0] 0x7061:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0134.0] 0x7061:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0138.0] 0x7061:0x45 0x20 UNSIGNED32   Output event time 5
  [0x013C.0] 0x7061:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0140.0] 0x7061:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0144.0] 0x7061:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0148.0] 0x7061:0x49 0x20 UNSIGNED32   Output event time 9
  [0x014C.0] 0x7061:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0150.0] 0x7071:0x01 0x01 BOOLEAN      Output buffer reset
  [0x0150.1] 0x7071:0x02 0x01 BOOLEAN      Manual output state
  [0x0150.2] 0x7071:0x03 0x01 BOOLEAN      Force order
  [0x0150.3] 0x7071:0x04 0x01 BOOLEAN      Enable manual operation
  [0x0150.4] 0x0000:0x00 0x04
  [0x0151.0] 0x7071:0x09 0x08 UNSIGNED8    Output order counter
  [0x0152.0] 0x7071:0x11 0x08 UNSIGNED8    No of output events
  [0x0153.0] 0x0000:0x00 0x08
  [0x0154.0] 0x7071:0x21 0x01 BOOLEAN      Output event state 1
  [0x0154.1] 0x7071:0x22 0x01 BOOLEAN      Output event state 2
  [0x0154.2] 0x7071:0x23 0x01 BOOLEAN      Output event state 3
  [0x0154.3] 0x7071:0x24 0x01 BOOLEAN      Output event state 4
  [0x0154.4] 0x7071:0x25 0x01 BOOLEAN      Output event state 5
  [0x0154.5] 0x7071:0x26 0x01 BOOLEAN      Output event state 6
  [0x0154.6] 0x7071:0x27 0x01 BOOLEAN      Output event state 7
  [0x0154.7] 0x7071:0x28 0x01 BOOLEAN      Output event state 8
  [0x0155.0] 0x7071:0x29 0x01 BOOLEAN      Output event state 9
  [0x0155.1] 0x7071:0x2A 0x01 BOOLEAN      Output event state 10
  [0x0155.2] 0x0000:0x00 0x16
  [0x0158.0] 0x7071:0x41 0x20 UNSIGNED32   Output event time 1
  [0x015C.0] 0x7071:0x42 0x20 UNSIGNED32   Output event time 2
  [0x0160.0] 0x7071:0x43 0x20 UNSIGNED32   Output event time 3
  [0x0164.0] 0x7071:0x44 0x20 UNSIGNED32   Output event time 4
  [0x0168.0] 0x7071:0x45 0x20 UNSIGNED32   Output event time 5
  [0x016C.0] 0x7071:0x46 0x20 UNSIGNED32   Output event time 6
  [0x0170.0] 0x7071:0x47 0x20 UNSIGNED32   Output event time 7
  [0x0174.0] 0x7071:0x48 0x20 UNSIGNED32   Output event time 8
  [0x0178.0] 0x7071:0x49 0x20 UNSIGNED32   Output event time 9
  [0x017C.0] 0x7071:0x4A 0x20 UNSIGNED32   Output event time 10
  [0x0180.0] 0x7080:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0180.1] 0x0000:0x00 0x0F
  [0x0182.0] 0x7080:0x11 0x08 UNSIGNED8    Input order counter
  [0x0183.0] 0x0000:0x00 0x08
  [0x0184.0] 0x7090:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0184.1] 0x0000:0x00 0x0F
  [0x0186.0] 0x7090:0x11 0x08 UNSIGNED8    Input order counter
  [0x0187.0] 0x0000:0x00 0x08
  [0x0188.0] 0x70A0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0188.1] 0x0000:0x00 0x0F
  [0x018A.0] 0x70A0:0x11 0x08 UNSIGNED8    Input order counter
  [0x018B.0] 0x0000:0x00 0x08
  [0x018C.0] 0x70B0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x018C.1] 0x0000:0x00 0x0F
  [0x018E.0] 0x70B0:0x11 0x08 UNSIGNED8    Input order counter
  [0x018F.0] 0x0000:0x00 0x08
  [0x0190.0] 0x70C0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0190.1] 0x0000:0x00 0x0F
  [0x0192.0] 0x70C0:0x11 0x08 UNSIGNED8    Input order counter
  [0x0193.0] 0x0000:0x00 0x08
  [0x0194.0] 0x70D0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0194.1] 0x0000:0x00 0x0F
  [0x0196.0] 0x70D0:0x11 0x08 UNSIGNED8    Input order counter
  [0x0197.0] 0x0000:0x00 0x08
  [0x0198.0] 0x70E0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x0198.1] 0x0000:0x00 0x0F
  [0x019A.0] 0x70E0:0x11 0x08 UNSIGNED8    Input order counter
  [0x019B.0] 0x0000:0x00 0x08
  [0x019C.0] 0x70F0:0x01 0x01 BOOLEAN      Input buffer reset
  [0x019C.1] 0x0000:0x00 0x0F
  [0x019E.0] 0x70F0:0x11 0x08 UNSIGNED8    Input order counter
  [0x019F.0] 0x0000:0x00 0x08
  SM3 inputs
     addr b   index: sub bitl data_type    name
  [0x01A0.0] 0x6000:0x01 0x01 BOOLEAN      Output short circuit
  [0x01A0.1] 0x6000:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01A0.2] 0x6000:0x03 0x01 BOOLEAN      Output state
  [0x01A0.3] 0x0000:0x00 0x0B
  [0x01A1.6] 0x6000:0x0F 0x02 BIT2         Input cycle counter
  [0x01A2.0] 0x6000:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01A3.0] 0x6000:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01A4.0] 0x6010:0x01 0x01 BOOLEAN      Output short circuit
  [0x01A4.1] 0x6010:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01A4.2] 0x6010:0x03 0x01 BOOLEAN      Output state
  [0x01A4.3] 0x0000:0x00 0x0B
  [0x01A5.6] 0x6010:0x0F 0x02 BIT2         Input cycle counter
  [0x01A6.0] 0x6010:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01A7.0] 0x6010:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01A8.0] 0x6020:0x01 0x01 BOOLEAN      Output short circuit
  [0x01A8.1] 0x6020:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01A8.2] 0x6020:0x03 0x01 BOOLEAN      Output state
  [0x01A8.3] 0x0000:0x00 0x0B
  [0x01A9.6] 0x6020:0x0F 0x02 BIT2         Input cycle counter
  [0x01AA.0] 0x6020:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01AB.0] 0x6020:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01AC.0] 0x6030:0x01 0x01 BOOLEAN      Output short circuit
  [0x01AC.1] 0x6030:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01AC.2] 0x6030:0x03 0x01 BOOLEAN      Output state
  [0x01AC.3] 0x0000:0x00 0x0B
  [0x01AD.6] 0x6030:0x0F 0x02 BIT2         Input cycle counter
  [0x01AE.0] 0x6030:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01AF.0] 0x6030:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01B0.0] 0x6040:0x01 0x01 BOOLEAN      Output short circuit
  [0x01B0.1] 0x6040:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01B0.2] 0x6040:0x03 0x01 BOOLEAN      Output state
  [0x01B0.3] 0x0000:0x00 0x0B
  [0x01B1.6] 0x6040:0x0F 0x02 BIT2         Input cycle counter
  [0x01B2.0] 0x6040:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01B3.0] 0x6040:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01B4.0] 0x6050:0x01 0x01 BOOLEAN      Output short circuit
  [0x01B4.1] 0x6050:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01B4.2] 0x6050:0x03 0x01 BOOLEAN      Output state
  [0x01B4.3] 0x0000:0x00 0x0B
  [0x01B5.6] 0x6050:0x0F 0x02 BIT2         Input cycle counter
  [0x01B6.0] 0x6050:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01B7.0] 0x6050:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01B8.0] 0x6060:0x01 0x01 BOOLEAN      Output short circuit
  [0x01B8.1] 0x6060:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01B8.2] 0x6060:0x03 0x01 BOOLEAN      Output state
  [0x01B8.3] 0x0000:0x00 0x0B
  [0x01B9.6] 0x6060:0x0F 0x02 BIT2         Input cycle counter
  [0x01BA.0] 0x6060:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01BB.0] 0x6060:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01BC.0] 0x6070:0x01 0x01 BOOLEAN      Output short circuit
  [0x01BC.1] 0x6070:0x02 0x01 BOOLEAN      Output buffer overflow
  [0x01BC.2] 0x6070:0x03 0x01 BOOLEAN      Output state
  [0x01BC.3] 0x0000:0x00 0x0B
  [0x01BD.6] 0x6070:0x0F 0x02 BIT2         Input cycle counter
  [0x01BE.0] 0x6070:0x11 0x08 UNSIGNED8    Output order feedback
  [0x01BF.0] 0x6070:0x12 0x08 UNSIGNED8    Events in output buffer
  [0x01C0.0] 0x6081:0x01 0x08 UNSIGNED8    No of input events
  [0x01C1.0] 0x6081:0x09 0x01 BOOLEAN      Input state
  [0x01C1.1] 0x6081:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x01C1.2] 0x0000:0x00 0x04
  [0x01C1.6] 0x6081:0x0F 0x02 BIT2         Input cycle counter
  [0x01C2.0] 0x6081:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x01C3.0] 0x6081:0x12 0x08 UNSIGNED8    Input order feedback
  [0x01C4.0] 0x6081:0x21 0x01 BOOLEAN      Input event state 1
  [0x01C4.1] 0x6081:0x22 0x01 BOOLEAN      Input event state 2
  [0x01C4.2] 0x6081:0x23 0x01 BOOLEAN      Input event state 3
  [0x01C4.3] 0x6081:0x24 0x01 BOOLEAN      Input event state 4
  [0x01C4.4] 0x6081:0x25 0x01 BOOLEAN      Input event state 5
  [0x01C4.5] 0x6081:0x26 0x01 BOOLEAN      Input event state 6
  [0x01C4.6] 0x6081:0x27 0x01 BOOLEAN      Input event state 7
  [0x01C4.7] 0x6081:0x28 0x01 BOOLEAN      Input event state 8
  [0x01C5.0] 0x6081:0x29 0x01 BOOLEAN      Input event state 9
  [0x01C5.1] 0x6081:0x2A 0x01 BOOLEAN      Input event state 10
  [0x01C5.2] 0x0000:0x00 0x16
  [0x01C8.0] 0x6081:0x41 0x20 UNSIGNED32   Input event time 1
  [0x01CC.0] 0x6081:0x42 0x20 UNSIGNED32   Input event time 2
  [0x01D0.0] 0x6081:0x43 0x20 UNSIGNED32   Input event time 3
  [0x01D4.0] 0x6081:0x44 0x20 UNSIGNED32   Input event time 4
  [0x01D8.0] 0x6081:0x45 0x20 UNSIGNED32   Input event time 5
  [0x01DC.0] 0x6081:0x46 0x20 UNSIGNED32   Input event time 6
  [0x01E0.0] 0x6081:0x47 0x20 UNSIGNED32   Input event time 7
  [0x01E4.0] 0x6081:0x48 0x20 UNSIGNED32   Input event time 8
  [0x01E8.0] 0x6081:0x49 0x20 UNSIGNED32   Input event time 9
  [0x01EC.0] 0x6081:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x01F0.0] 0x6091:0x01 0x08 UNSIGNED8    No of input events
  [0x01F1.0] 0x6091:0x09 0x01 BOOLEAN      Input state
  [0x01F1.1] 0x6091:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x01F1.2] 0x0000:0x00 0x04
  [0x01F1.6] 0x6091:0x0F 0x02 BIT2         Input cycle counter
  [0x01F2.0] 0x6091:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x01F3.0] 0x6091:0x12 0x08 UNSIGNED8    Input order feedback
  [0x01F4.0] 0x6091:0x21 0x01 BOOLEAN      Input event state 1
  [0x01F4.1] 0x6091:0x22 0x01 BOOLEAN      Input event state 2
  [0x01F4.2] 0x6091:0x23 0x01 BOOLEAN      Input event state 3
  [0x01F4.3] 0x6091:0x24 0x01 BOOLEAN      Input event state 4
  [0x01F4.4] 0x6091:0x25 0x01 BOOLEAN      Input event state 5
  [0x01F4.5] 0x6091:0x26 0x01 BOOLEAN      Input event state 6
  [0x01F4.6] 0x6091:0x27 0x01 BOOLEAN      Input event state 7
  [0x01F4.7] 0x6091:0x28 0x01 BOOLEAN      Input event state 8
  [0x01F5.0] 0x6091:0x29 0x01 BOOLEAN      Input event state 9
  [0x01F5.1] 0x6091:0x2A 0x01 BOOLEAN      Input event state 10
  [0x01F5.2] 0x0000:0x00 0x16
  [0x01F8.0] 0x6091:0x41 0x20 UNSIGNED32   Input event time 1
  [0x01FC.0] 0x6091:0x42 0x20 UNSIGNED32   Input event time 2
  [0x0200.0] 0x6091:0x43 0x20 UNSIGNED32   Input event time 3
  [0x0204.0] 0x6091:0x44 0x20 UNSIGNED32   Input event time 4
  [0x0208.0] 0x6091:0x45 0x20 UNSIGNED32   Input event time 5
  [0x020C.0] 0x6091:0x46 0x20 UNSIGNED32   Input event time 6
  [0x0210.0] 0x6091:0x47 0x20 UNSIGNED32   Input event time 7
  [0x0214.0] 0x6091:0x48 0x20 UNSIGNED32   Input event time 8
  [0x0218.0] 0x6091:0x49 0x20 UNSIGNED32   Input event time 9
  [0x021C.0] 0x6091:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x0220.0] 0x60A1:0x01 0x08 UNSIGNED8    No of input events
  [0x0221.0] 0x60A1:0x09 0x01 BOOLEAN      Input state
  [0x0221.1] 0x60A1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x0221.2] 0x0000:0x00 0x04
  [0x0221.6] 0x60A1:0x0F 0x02 BIT2         Input cycle counter
  [0x0222.0] 0x60A1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x0223.0] 0x60A1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x0224.0] 0x60A1:0x21 0x01 BOOLEAN      Input event state 1
  [0x0224.1] 0x60A1:0x22 0x01 BOOLEAN      Input event state 2
  [0x0224.2] 0x60A1:0x23 0x01 BOOLEAN      Input event state 3
  [0x0224.3] 0x60A1:0x24 0x01 BOOLEAN      Input event state 4
  [0x0224.4] 0x60A1:0x25 0x01 BOOLEAN      Input event state 5
  [0x0224.5] 0x60A1:0x26 0x01 BOOLEAN      Input event state 6
  [0x0224.6] 0x60A1:0x27 0x01 BOOLEAN      Input event state 7
  [0x0224.7] 0x60A1:0x28 0x01 BOOLEAN      Input event state 8
  [0x0225.0] 0x60A1:0x29 0x01 BOOLEAN      Input event state 9
  [0x0225.1] 0x60A1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x0225.2] 0x0000:0x00 0x16
  [0x0228.0] 0x60A1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x022C.0] 0x60A1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x0230.0] 0x60A1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x0234.0] 0x60A1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x0238.0] 0x60A1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x023C.0] 0x60A1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x0240.0] 0x60A1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x0244.0] 0x60A1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x0248.0] 0x60A1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x024C.0] 0x60A1:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x0250.0] 0x60B1:0x01 0x08 UNSIGNED8    No of input events
  [0x0251.0] 0x60B1:0x09 0x01 BOOLEAN      Input state
  [0x0251.1] 0x60B1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x0251.2] 0x0000:0x00 0x04
  [0x0251.6] 0x60B1:0x0F 0x02 BIT2         Input cycle counter
  [0x0252.0] 0x60B1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x0253.0] 0x60B1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x0254.0] 0x60B1:0x21 0x01 BOOLEAN      Input event state 1
  [0x0254.1] 0x60B1:0x22 0x01 BOOLEAN      Input event state 2
  [0x0254.2] 0x60B1:0x23 0x01 BOOLEAN      Input event state 3
  [0x0254.3] 0x60B1:0x24 0x01 BOOLEAN      Input event state 4
  [0x0254.4] 0x60B1:0x25 0x01 BOOLEAN      Input event state 5
  [0x0254.5] 0x60B1:0x26 0x01 BOOLEAN      Input event state 6
  [0x0254.6] 0x60B1:0x27 0x01 BOOLEAN      Input event state 7
  [0x0254.7] 0x60B1:0x28 0x01 BOOLEAN      Input event state 8
  [0x0255.0] 0x60B1:0x29 0x01 BOOLEAN      Input event state 9
  [0x0255.1] 0x60B1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x0255.2] 0x0000:0x00 0x16
  [0x0258.0] 0x60B1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x025C.0] 0x60B1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x0260.0] 0x60B1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x0264.0] 0x60B1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x0268.0] 0x60B1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x026C.0] 0x60B1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x0270.0] 0x60B1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x0274.0] 0x60B1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x0278.0] 0x60B1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x027C.0] 0x60B1:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x0280.0] 0x60C1:0x01 0x08 UNSIGNED8    No of input events
  [0x0281.0] 0x60C1:0x09 0x01 BOOLEAN      Input state
  [0x0281.1] 0x60C1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x0281.2] 0x0000:0x00 0x04
  [0x0281.6] 0x60C1:0x0F 0x02 BIT2         Input cycle counter
  [0x0282.0] 0x60C1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x0283.0] 0x60C1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x0284.0] 0x60C1:0x21 0x01 BOOLEAN      Input event state 1
  [0x0284.1] 0x60C1:0x22 0x01 BOOLEAN      Input event state 2
  [0x0284.2] 0x60C1:0x23 0x01 BOOLEAN      Input event state 3
  [0x0284.3] 0x60C1:0x24 0x01 BOOLEAN      Input event state 4
  [0x0284.4] 0x60C1:0x25 0x01 BOOLEAN      Input event state 5
  [0x0284.5] 0x60C1:0x26 0x01 BOOLEAN      Input event state 6
  [0x0284.6] 0x60C1:0x27 0x01 BOOLEAN      Input event state 7
  [0x0284.7] 0x60C1:0x28 0x01 BOOLEAN      Input event state 8
  [0x0285.0] 0x60C1:0x29 0x01 BOOLEAN      Input event state 9
  [0x0285.1] 0x60C1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x0285.2] 0x0000:0x00 0x16
  [0x0288.0] 0x60C1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x028C.0] 0x60C1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x0290.0] 0x60C1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x0294.0] 0x60C1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x0298.0] 0x60C1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x029C.0] 0x60C1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x02A0.0] 0x60C1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x02A4.0] 0x60C1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x02A8.0] 0x60C1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x02AC.0] 0x60C1:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x02B0.0] 0x60D1:0x01 0x08 UNSIGNED8    No of input events
  [0x02B1.0] 0x60D1:0x09 0x01 BOOLEAN      Input state
  [0x02B1.1] 0x60D1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x02B1.2] 0x0000:0x00 0x04
  [0x02B1.6] 0x60D1:0x0F 0x02 BIT2         Input cycle counter
  [0x02B2.0] 0x60D1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x02B3.0] 0x60D1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x02B4.0] 0x60D1:0x21 0x01 BOOLEAN      Input event state 1
  [0x02B4.1] 0x60D1:0x22 0x01 BOOLEAN      Input event state 2
  [0x02B4.2] 0x60D1:0x23 0x01 BOOLEAN      Input event state 3
  [0x02B4.3] 0x60D1:0x24 0x01 BOOLEAN      Input event state 4
  [0x02B4.4] 0x60D1:0x25 0x01 BOOLEAN      Input event state 5
  [0x02B4.5] 0x60D1:0x26 0x01 BOOLEAN      Input event state 6
  [0x02B4.6] 0x60D1:0x27 0x01 BOOLEAN      Input event state 7
  [0x02B4.7] 0x60D1:0x28 0x01 BOOLEAN      Input event state 8
  [0x02B5.0] 0x60D1:0x29 0x01 BOOLEAN      Input event state 9
  [0x02B5.1] 0x60D1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x02B5.2] 0x0000:0x00 0x16
  [0x02B8.0] 0x60D1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x02BC.0] 0x60D1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x02C0.0] 0x60D1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x02C4.0] 0x60D1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x02C8.0] 0x60D1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x02CC.0] 0x60D1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x02D0.0] 0x60D1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x02D4.0] 0x60D1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x02D8.0] 0x60D1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x02DC.0] 0x60D1:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x02E0.0] 0x60E1:0x01 0x08 UNSIGNED8    No of input events
  [0x02E1.0] 0x60E1:0x09 0x01 BOOLEAN      Input state
  [0x02E1.1] 0x60E1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x02E1.2] 0x0000:0x00 0x04
  [0x02E1.6] 0x60E1:0x0F 0x02 BIT2         Input cycle counter
  [0x02E2.0] 0x60E1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x02E3.0] 0x60E1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x02E4.0] 0x60E1:0x21 0x01 BOOLEAN      Input event state 1
  [0x02E4.1] 0x60E1:0x22 0x01 BOOLEAN      Input event state 2
  [0x02E4.2] 0x60E1:0x23 0x01 BOOLEAN      Input event state 3
  [0x02E4.3] 0x60E1:0x24 0x01 BOOLEAN      Input event state 4
  [0x02E4.4] 0x60E1:0x25 0x01 BOOLEAN      Input event state 5
  [0x02E4.5] 0x60E1:0x26 0x01 BOOLEAN      Input event state 6
  [0x02E4.6] 0x60E1:0x27 0x01 BOOLEAN      Input event state 7
  [0x02E4.7] 0x60E1:0x28 0x01 BOOLEAN      Input event state 8
  [0x02E5.0] 0x60E1:0x29 0x01 BOOLEAN      Input event state 9
  [0x02E5.1] 0x60E1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x02E5.2] 0x0000:0x00 0x16
  [0x02E8.0] 0x60E1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x02EC.0] 0x60E1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x02F0.0] 0x60E1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x02F4.0] 0x60E1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x02F8.0] 0x60E1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x02FC.0] 0x60E1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x0300.0] 0x60E1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x0304.0] 0x60E1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x0308.0] 0x60E1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x030C.0] 0x60E1:0x4A 0x20 UNSIGNED32   Input event time 10
  [0x0310.0] 0x60F1:0x01 0x08 UNSIGNED8    No of input events
  [0x0311.0] 0x60F1:0x09 0x01 BOOLEAN      Input state
  [0x0311.1] 0x60F1:0x0A 0x01 BOOLEAN      Input buffer overflow
  [0x0311.2] 0x0000:0x00 0x04
  [0x0311.6] 0x60F1:0x0F 0x02 BIT2         Input cycle counter
  [0x0312.0] 0x60F1:0x11 0x08 UNSIGNED8    Events in input buffer
  [0x0313.0] 0x60F1:0x12 0x08 UNSIGNED8    Input order feedback
  [0x0314.0] 0x60F1:0x21 0x01 BOOLEAN      Input event state 1
  [0x0314.1] 0x60F1:0x22 0x01 BOOLEAN      Input event state 2
  [0x0314.2] 0x60F1:0x23 0x01 BOOLEAN      Input event state 3
  [0x0314.3] 0x60F1:0x24 0x01 BOOLEAN      Input event state 4
  [0x0314.4] 0x60F1:0x25 0x01 BOOLEAN      Input event state 5
  [0x0314.5] 0x60F1:0x26 0x01 BOOLEAN      Input event state 6
  [0x0314.6] 0x60F1:0x27 0x01 BOOLEAN      Input event state 7
  [0x0314.7] 0x60F1:0x28 0x01 BOOLEAN      Input event state 8
  [0x0315.0] 0x60F1:0x29 0x01 BOOLEAN      Input event state 9
  [0x0315.1] 0x60F1:0x2A 0x01 BOOLEAN      Input event state 10
  [0x0315.2] 0x0000:0x00 0x16
  [0x0318.0] 0x60F1:0x41 0x20 UNSIGNED32   Input event time 1
  [0x031C.0] 0x60F1:0x42 0x20 UNSIGNED32   Input event time 2
  [0x0320.0] 0x60F1:0x43 0x20 UNSIGNED32   Input event time 3
  [0x0324.0] 0x60F1:0x44 0x20 UNSIGNED32   Input event time 4
  [0x0328.0] 0x60F1:0x45 0x20 UNSIGNED32   Input event time 5
  [0x032C.0] 0x60F1:0x46 0x20 UNSIGNED32   Input event time 6
  [0x0330.0] 0x60F1:0x47 0x20 UNSIGNED32   Input event time 7
  [0x0334.0] 0x60F1:0x48 0x20 UNSIGNED32   Input event time 8
  [0x0338.0] 0x60F1:0x49 0x20 UNSIGNED32   Input event time 9
  [0x033C.0] 0x60F1:0x4A 0x20 UNSIGNED32   Input event time 10

Slave:3
 Name:EL6224
 Output size: 0bits
 Input size: 48bits
 State: 4
 Delay: 300[ns]
 Has DC: 1
 DCParentport:1
 Activeports:1.0.0.0
 Configured address: 1003
 Man: 00000002 ID: 18503052 Rev: 00150000
 SM0 A:1000 L: 256 F:00010026 Type:1
 SM1 A:1100 L: 256 F:00010022 Type:2
 SM2 A:1200 L:   0 F:00000024 Type:3
 SM3 A:1300 L:   6 F:00010020 Type:4
 FMMU0 Ls:00000340 Ll:   6 Lsb:0 Leb:7 Ps:1300 Psb:0 Ty:01 Act:01
 FMMUfunc 0:1 1:2 2:3 3:0
 MBX length wr: 256 rd: 256 MBX protocols : 0d
 CoE details: 2f FoE details: 01 EoE details: 00 SoE details: 00
 Ebus current: 120[mA]
 only LRD/LWR:0
PDO mapping according to CoE :
  SM2 outputs
     addr b   index: sub bitl data_type    name
  SM3 inputs
     addr b   index: sub bitl data_type    name
  [0x0340.0] 0xF100:0x01 0x08 UNSIGNED8    State Ch1
  [0x0341.0] 0xF100:0x02 0x08 UNSIGNED8    State Ch2
  [0x0342.0] 0xF100:0x03 0x08 UNSIGNED8    State Ch3
  [0x0343.0] 0xF100:0x04 0x08 UNSIGNED8    State Ch4
  [0x0344.0] 0x0000:0x00 0x0C
  [0x0345.4] 0xF101:0x0D 0x01 BOOLEAN      Device Diag
  [0x0345.5] 0x0000:0x00 0x02
  [0x0345.7] 0xF101:0x10 0x01 BOOLEAN      Device State
End slaveinfo, close socket
End program

While here another outputs from red_test rteth0 rteth0 1000

SOEM (Simple Open EtherCAT Master)
Redundancy test
Starting Redundant test
ec_init on rteth0 succeeded.
[ECat_master] Failed to reset slaves!
[ECat_master] POWER ON slaves.
3 slaves found and configured.
Slave:1 Name:EK1100 Output size:  0bits Input size:  0bits State: 4 delay:0.1
         Out:00000000,   0 In:00000000,   0
Slave:2 Name:EL1259 Output size:3328bits Input size:3328bits State:18 delay:145.1
         Out:b50df1a0, 416 In:b50df340, 416
Slave:3 Name:EL6224 Output size:  0bits Input size: 48bits State: 4 delay:300.1
         Out:00000000,   0 In:b50df4e0,   6
Calculated workcounter 4
Request operational state for all slaves
Not all slaves reached operational state.
Slave 2 State=0x12 StatusCode=0x0030 : Invalid DC SYNC configuration
Request safe operational state for all slaves
End redundant test, close socket
End program

I am working on this machine:

Linux 4.19.89-xeno-ipipe-3.1 #1 SMP Tue Sep 29 16:46:56 CEST 2020 GNU/Linux

Wireshark captures

  1. These are the captures from SOEM of the three different situation above:

SOEM

  1. I have also captured some traffics from TwinCat: in this case, the behavior is as follow:
    When I request the OPERATIONAL state for the network, the EL1259 goes only in SAFE-OP, and it must be manually switched in OPERATIONAL. Here, there is the capture from wireshark.

I can easily provide more materials to debug the problem.
Any help would be really appreciated.
Thanks to all.

@ArthurKetels
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Interesting problem. Knowing how TwinCAT is setting up the PDO transfers I think the problem lies in the state where the SYNC0 is enabled on the slave. In this case the ecx_context.manualstatechange = 1 is mandatory.

The logic should then be something like:

ec_init();
ec_config_init(FALSE);
check_state(EC_STATE_PRE_OP);
custom_configuration();
ec_config_map(&IOmap);
// do NOT go to safe-op
ec_configdc();
start_ecat_thread();
sleep(a few seconds); // wait until DC is stable
ec_slave[0].state = EC_STATE_SAFEOP;
ec_writestate(0);
ec_dcsync0(EL1259_pos, true, 1000000, 0);
sleep(1s);
ec_slave[0].state = EC_STATE_OPERATIONAL;
ec_writestate(0);

I hope this helps.

@eliapellegrino
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Dear Arthur,
I manage to solve the problem with you help, thank you! In particular I synchronize master and slaves with a pdo warm up of +/- 25000 packets.
After synchronize I checked for REGISTER 0x092C: is this considered a good synchronization?

If I add a sleep after starting the ecat thread (as you suggested), the synchronization seems to drift a bit: is it a normal behavior due to the higher cycle time (1 ms) ?

Screenshot from 2021-10-29 11-53-55

@ArthurKetels
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A 25K warm-up for DC should be ample.

The best thing to do is to check 0x092c of your last slave during the warm-up and plot the results. You will find a very fast pull-in to almost zero and then some dampened oscillation towards zero. Your system requirements will dictate the good-enough point. If you do not care about the few last 100th of nanosecond then you could leave the warm-up phase much sooner.

The actual behavior of your system depends a lot on the number of slaves and the worst case clock skew in your slave. That is why it pays off to have accurate oscillators/crystals in your slaves when doing precision time measurements.

If I add a sleep after starting the ecat thread (as you suggested), the synchronization seems to drift a bit

I do not understand your remark. A sleep in the main task has no influence on the RT task. The RT task should always keep ticking and syncing to the reference slave clock. The sleep is there to insure the slave has seen enough SYNC0 events before the master requests a state change to Operational. For a measurement slave this is not so important, but it is for servo drives. Some servo drives have to check stable SYNC0 and proper phase locking of the master PDO packets before they accept Operational state.

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