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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER (flash_npcm_nor , CONFIG_FLASH_LOG_LEVEL );
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+ #ifdef CONFIG_XIP
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+ #include <zephyr/linker/linker-defs.h>
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+ #define RAMFUNC __attribute__ ((section(".ramfunc")))
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+ #else
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+ #define RAMFUNC
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+ #endif
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+
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#define BLOCK_64K_SIZE KB(64)
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#define BLOCK_4K_SIZE KB(4)
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#define MAPPED_ADDR_NOT_SUPPORT 0xffffffff
@@ -61,22 +68,29 @@ static const struct flash_parameters flash_npcm_parameters = {
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DT_INST_STRING_TOKEN(inst, quad_enable_requirements))), \
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((JESD216_DW15_QER_VAL_NONE)))
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- static inline bool is_within_region (off_t addr , size_t size , off_t region_start ,
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+ RAMFUNC static inline bool is_within_region (off_t addr , size_t size , off_t region_start ,
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size_t region_size )
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{
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return (addr >= region_start &&
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(addr < (region_start + region_size )) &&
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((addr + size ) <= (region_start + region_size )));
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}
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- static int flash_npcm_transceive (const struct device * dev , struct npcm_transceive_cfg * cfg ,
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+ RAMFUNC static int flash_npcm_transceive (const struct device * dev , struct npcm_transceive_cfg * cfg ,
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uint32_t flags )
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{
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const struct flash_npcm_nor_config * config = dev -> config ;
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struct flash_npcm_nor_data * data = dev -> data ;
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struct npcm_qspi_data * qspi_data = config -> qspi_bus -> data ;
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int ret ;
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+ #ifdef CONFIG_XIP
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+ unsigned int key = 0 ;
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+
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+ /* Disable IRQ */
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+ key = irq_lock ();
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+ #endif
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+
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/* Lock SPI bus and configure it if needed */
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qspi_data -> qspi_ops -> lock_configure (config -> qspi_bus , & config -> qspi_cfg ,
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data -> operation );
@@ -87,18 +101,22 @@ static int flash_npcm_transceive(const struct device *dev, struct npcm_transceiv
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/* Unlock SPI bus */
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qspi_data -> qspi_ops -> unlock (config -> qspi_bus );
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+ #ifdef CONFIG_XIP
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+ irq_unlock (key );
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+ #endif
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+
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return ret ;
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}
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/* NPCM functions for SPI NOR flash */
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- static int flash_npcm_transceive_cmd_only (const struct device * dev , uint8_t opcode )
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+ RAMFUNC static int flash_npcm_transceive_cmd_only (const struct device * dev , uint8_t opcode )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode };
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return flash_npcm_transceive (dev , & cfg , 0 ); /* opcode only */
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}
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- static int flash_npcm_transceive_cmd_by_addr (const struct device * dev , uint8_t opcode ,
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+ RAMFUNC static int flash_npcm_transceive_cmd_by_addr (const struct device * dev , uint8_t opcode ,
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uint32_t addr )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode };
@@ -107,7 +125,7 @@ static int flash_npcm_transceive_cmd_by_addr(const struct device *dev, uint8_t o
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return flash_npcm_transceive (dev , & cfg , NPCM_TRANSCEIVE_ACCESS_ADDR );
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}
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- static int flash_npcm_transceive_read_by_addr (const struct device * dev , uint8_t opcode ,
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+ RAMFUNC static int flash_npcm_transceive_read_by_addr (const struct device * dev , uint8_t opcode ,
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uint8_t * dst , const size_t size , uint32_t addr )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode ,
@@ -119,7 +137,7 @@ static int flash_npcm_transceive_read_by_addr(const struct device *dev, uint8_t
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NPCM_TRANSCEIVE_ACCESS_ADDR );
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}
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- static int flash_npcm_transceive_read (const struct device * dev , uint8_t opcode ,
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+ RAMFUNC static int flash_npcm_transceive_read (const struct device * dev , uint8_t opcode ,
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uint8_t * dst , const size_t size )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode ,
@@ -129,7 +147,7 @@ static int flash_npcm_transceive_read(const struct device *dev, uint8_t opcode,
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return flash_npcm_transceive (dev , & cfg , NPCM_TRANSCEIVE_ACCESS_READ );
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}
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- static int flash_npcm_transceive_write (const struct device * dev , uint8_t opcode ,
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+ RAMFUNC static int flash_npcm_transceive_write (const struct device * dev , uint8_t opcode ,
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uint8_t * src , const size_t size )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode ,
@@ -139,7 +157,7 @@ static int flash_npcm_transceive_write(const struct device *dev, uint8_t opcode,
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return flash_npcm_transceive (dev , & cfg , NPCM_TRANSCEIVE_ACCESS_WRITE );
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}
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- static int flash_npcm_transceive_write_by_addr (const struct device * dev , uint8_t opcode ,
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+ RAMFUNC static int flash_npcm_transceive_write_by_addr (const struct device * dev , uint8_t opcode ,
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uint8_t * src , const size_t size , uint32_t addr )
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{
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struct npcm_transceive_cfg cfg = { .opcode = opcode ,
@@ -152,7 +170,7 @@ static int flash_npcm_transceive_write_by_addr(const struct device *dev, uint8_t
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}
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/* Local SPI NOR flash functions */
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- static int flash_npcm_nor_wait_until_ready (const struct device * dev )
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+ RAMFUNC static int flash_npcm_nor_wait_until_ready (const struct device * dev )
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{
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int ret ;
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uint8_t reg ;
@@ -172,36 +190,51 @@ static int flash_npcm_nor_wait_until_ready(const struct device *dev)
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return - EBUSY ;
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}
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- static int flash_npcm_nor_read_status_regs (const struct device * dev , uint8_t * sts_reg )
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+ RAMFUNC static int flash_npcm_nor_read_status_regs (const struct device * dev , uint8_t * sts_reg )
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{
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int ret = flash_npcm_transceive_read (dev , SPI_NOR_CMD_RDSR , sts_reg , 1 );
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if (ret != 0 ) {
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return ret ;
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}
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+
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return flash_npcm_transceive_read (dev , SPI_NOR_CMD_RDSR2 , sts_reg + 1 , 1 );
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}
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- static int flash_npcm_nor_write_status_regs (const struct device * dev , uint8_t * sts_reg )
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+ RAMFUNC static int flash_npcm_nor_write_status_regs (const struct device * dev , uint8_t * sts_reg )
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{
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int ret ;
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+ #ifdef CONFIG_XIP
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+ unsigned int key = 0 ;
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+
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+ key = irq_lock ();
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+ #endif
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+
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ret = flash_npcm_transceive_cmd_only (dev , SPI_NOR_CMD_WREN );
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if (ret != 0 ) {
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- return ret ;
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+ goto exit ;
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}
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ret = flash_npcm_transceive_write (dev , SPI_NOR_CMD_WRSR , sts_reg , 2 );
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if (ret != 0 ) {
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- return ret ;
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+ goto exit ;
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}
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- return flash_npcm_nor_wait_until_ready (dev );
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+ ret = flash_npcm_nor_wait_until_ready (dev );
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+
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+ exit :
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+
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+ #ifdef CONFIG_XIP
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+ key = irq_lock ();
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+ #endif
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+
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+ return ret ;
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}
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/* Flash API functions */
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#if defined(CONFIG_FLASH_JESD216_API )
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- static int flash_npcm_nor_read_jedec_id (const struct device * dev , uint8_t * id )
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+ RAMFUNC static int flash_npcm_nor_read_jedec_id (const struct device * dev , uint8_t * id )
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{
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if (id == NULL ) {
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return - EINVAL ;
@@ -210,7 +243,7 @@ static int flash_npcm_nor_read_jedec_id(const struct device *dev, uint8_t *id)
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return flash_npcm_transceive_read (dev , SPI_NOR_CMD_RDID , id , SPI_NOR_MAX_ID_LEN );
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}
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- static int flash_npcm_nor_read_sfdp (const struct device * dev , off_t addr ,
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+ RAMFUNC static int flash_npcm_nor_read_sfdp (const struct device * dev , off_t addr ,
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void * data , size_t size )
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{
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uint8_t sfdp_addr [4 ];
@@ -234,7 +267,7 @@ static int flash_npcm_nor_read_sfdp(const struct device *dev, off_t addr,
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#endif /* CONFIG_FLASH_JESD216_API */
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#if defined(CONFIG_FLASH_PAGE_LAYOUT )
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- static void flash_npcm_nor_pages_layout (const struct device * dev ,
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+ RAMFUNC static void flash_npcm_nor_pages_layout (const struct device * dev ,
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const struct flash_pages_layout * * layout ,
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size_t * layout_size )
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{
@@ -245,7 +278,7 @@ static void flash_npcm_nor_pages_layout(const struct device *dev,
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}
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#endif /* CONFIG_FLASH_PAGE_LAYOUT */
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- static int flash_npcm_nor_read (const struct device * dev , off_t addr ,
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+ RAMFUNC static int flash_npcm_nor_read (const struct device * dev , off_t addr ,
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void * data , size_t size )
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{
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const struct flash_npcm_nor_config * config = dev -> config ;
@@ -275,11 +308,15 @@ static int flash_npcm_nor_read(const struct device *dev, off_t addr,
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return 0 ;
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}
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- static int flash_npcm_nor_erase (const struct device * dev , off_t addr , size_t size )
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+ RAMFUNC static int flash_npcm_nor_erase (const struct device * dev , off_t addr , size_t size )
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{
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const struct flash_npcm_nor_config * config = dev -> config ;
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int ret = 0 ;
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+ #ifdef CONFIG_XIP
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+ unsigned int key = 0 ;
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+ #endif
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+
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/* Out of the region of nor flash device? */
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if (!is_within_region (addr , size , 0 , config -> flash_size )) {
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LOG_ERR ("Addr %ld, size %d are out of range" , addr , size );
@@ -298,6 +335,15 @@ static int flash_npcm_nor_erase(const struct device *dev, off_t addr, size_t siz
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return - EINVAL ;
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}
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+ #ifdef CONFIG_XIP
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+ /* if execute in the place, disable IRQ to avoid interrupt and context
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+ * switch, to make sure always execute code in the RAM(SRAM) when use
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+ * spim driver. npcm4xx only have one core, we don't need use lock to
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+ * handle race condition.
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+ */
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+ key = irq_lock ();
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+ #endif
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+
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/* Select erase opcode by size */
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if (size == config -> flash_size ) {
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flash_npcm_transceive_cmd_only (dev , SPI_NOR_CMD_WREN );
@@ -324,17 +370,28 @@ static int flash_npcm_nor_erase(const struct device *dev, off_t addr, size_t siz
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}
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}
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+ #ifdef CONFIG_XIP
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+ irq_unlock (key );
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+ #endif
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+
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return ret ;
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}
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- static int flash_npcm_nor_write (const struct device * dev , off_t addr ,
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+ uintptr_t npcm4xx_vector_table_save (void );
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+ void npcm4xx_vector_table_restore (uintptr_t vtor );
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+
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+ RAMFUNC static int flash_npcm_nor_write (const struct device * dev , off_t addr ,
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const void * data , size_t size )
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{
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const struct flash_npcm_nor_config * config = dev -> config ;
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uint8_t * tx_buf = (uint8_t * )data ;
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int ret = 0 ;
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size_t sz_write ;
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+ #ifdef CONFIG_XIP
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+ unsigned int key = 0 ;
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+ #endif
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+
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/* Out of the region of nor flash device? */
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if (!is_within_region (addr , size , 0 , config -> flash_size )) {
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return - EINVAL ;
@@ -355,6 +412,10 @@ static int flash_npcm_nor_write(const struct device *dev, off_t addr,
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sz_write -= (addr + sz_write ) & (SPI_NOR_PAGE_SIZE - 1 );
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}
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+ #ifdef CONFIG_XIP
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+ key = irq_lock ();
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+ #endif
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+
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while (size > 0 ) {
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/* Start to write */
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flash_npcm_transceive_cmd_only (dev , SPI_NOR_CMD_WREN );
@@ -381,10 +442,14 @@ static int flash_npcm_nor_write(const struct device *dev, off_t addr,
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}
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}
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+ #ifdef CONFIG_XIP
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+ irq_unlock (key );
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+ #endif
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+
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return ret ;
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}
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- static const struct flash_parameters *
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+ RAMFUNC static const struct flash_parameters *
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flash_npcm_nor_get_parameters (const struct device * dev )
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{
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ARG_UNUSED (dev );
@@ -393,7 +458,7 @@ flash_npcm_nor_get_parameters(const struct device *dev)
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};
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#ifdef CONFIG_FLASH_EX_OP_ENABLED
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- static int flash_npcm_nor_ex_exec_transceive (const struct device * dev ,
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+ RAMFUNC static int flash_npcm_nor_ex_exec_transceive (const struct device * dev ,
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const struct npcm_ex_ops_transceive_in * op_in ,
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const struct npcm_ex_ops_transceive_out * op_out )
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{
@@ -426,7 +491,7 @@ static int flash_npcm_nor_ex_exec_transceive(const struct device *dev,
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return flash_npcm_transceive (dev , & cfg , flag );
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}
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- static int flash_npcm_nor_ex_set_spi_spec (const struct device * dev ,
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+ RAMFUNC static int flash_npcm_nor_ex_set_spi_spec (const struct device * dev ,
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const struct npcm_ex_ops_qspi_oper_in * op_in )
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{
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struct flash_npcm_nor_data * data = dev -> data ;
@@ -440,7 +505,7 @@ static int flash_npcm_nor_ex_set_spi_spec(const struct device *dev,
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return 0 ;
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}
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- static int flash_npcm_nor_ex_get_spi_spec (const struct device * dev ,
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+ RAMFUNC static int flash_npcm_nor_ex_get_spi_spec (const struct device * dev ,
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struct npcm_ex_ops_qspi_oper_out * op_out )
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{
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struct flash_npcm_nor_data * data = dev -> data ;
@@ -449,7 +514,7 @@ static int flash_npcm_nor_ex_get_spi_spec(const struct device *dev,
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return 0 ;
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}
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- static int flash_npcm_nor_ex_op (const struct device * dev , uint16_t code ,
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+ RAMFUNC static int flash_npcm_nor_ex_op (const struct device * dev , uint16_t code ,
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const uintptr_t in , void * out )
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{
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#ifdef CONFIG_USERSPACE
@@ -542,7 +607,7 @@ static const struct flash_driver_api flash_npcm_nor_driver_api = {
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#endif
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};
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- static int flash_npcm_nor_init (const struct device * dev )
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+ RAMFUNC static int flash_npcm_nor_init (const struct device * dev )
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{
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const struct flash_npcm_nor_config * config = dev -> config ;
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int ret ;
@@ -611,7 +676,7 @@ BUILD_ASSERT(DT_INST_QUAD_EN_PROP_OR(n) == JESD216_DW15_QER_NONE || \
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DT_INST_STRING_TOKEN(n, rd_mode) == NPCM_RD_MODE_FAST_DUAL, \
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"Fast Dual IO read must be selected in Quad mode"); \
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PINCTRL_DT_INST_DEFINE(n); \
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- static const struct flash_npcm_nor_config flash_npcm_nor_config_##n = { \
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+ static struct flash_npcm_nor_config flash_npcm_nor_config_##n = { \
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.qspi_bus = DEVICE_DT_GET(DT_PARENT(DT_DRV_INST(n))), \
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.mapped_addr = DT_INST_PROP_OR(n, mapped_addr, MAPPED_ADDR_NOT_SUPPORT),\
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.flash_size = DT_INST_PROP(n, size) / 8, \
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