reset now correctly zeroes out all registers

The solution before could lead to UB as it zeroed out NUM_REGS registers of reg_t, even if the other registers were smaller

Author: EAlexJ

gen_input/templates/CORENAME.cpp.gtl

@@ -57,14 +57,10 @@ ${coreDef.name.toLowerCase()}::${coreDef.name.toLowerCase()}()  = default;
 ${coreDef.name.toLowerCase()}::~${coreDef.name.toLowerCase()}() = default;
 
 void ${coreDef.name.toLowerCase()}::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<${coreDef.name.toLowerCase()}>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<${coreDef.name.toLowerCase()}>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *${coreDef.name.toLowerCase()}::get_regs_base_ptr() {

src/iss/arch/rv32gc.cpp

@@ -50,14 +50,10 @@ rv32gc::rv32gc()  = default;
 rv32gc::~rv32gc() = default;
 
 void rv32gc::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32gc>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32gc>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32gc::get_regs_base_ptr() {

src/iss/arch/rv32gcv.cpp

@@ -50,14 +50,10 @@ rv32gcv::rv32gcv()  = default;
 rv32gcv::~rv32gcv() = default;
 
 void rv32gcv::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32gcv>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32gcv>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32gcv::get_regs_base_ptr() {

src/iss/arch/rv32i.cpp

@@ -50,14 +50,10 @@ rv32i::rv32i()  = default;
 rv32i::~rv32i() = default;
 
 void rv32i::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32i>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32i>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32i::get_regs_base_ptr() {

src/iss/arch/rv32imac.cpp

@@ -50,14 +50,10 @@ rv32imac::rv32imac()  = default;
 rv32imac::~rv32imac() = default;
 
 void rv32imac::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv32imac>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv32imac>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv32imac::get_regs_base_ptr() {

src/iss/arch/rv64gc.cpp

@@ -50,14 +50,10 @@ rv64gc::rv64gc()  = default;
 rv64gc::~rv64gc() = default;
 
 void rv64gc::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64gc>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64gc>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64gc::get_regs_base_ptr() {

src/iss/arch/rv64gcv.cpp

@@ -50,14 +50,10 @@ rv64gcv::rv64gcv()  = default;
 rv64gcv::~rv64gcv() = default;
 
 void rv64gcv::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64gcv>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64gcv>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64gcv::get_regs_base_ptr() {

src/iss/arch/rv64i.cpp

@@ -50,14 +50,10 @@ rv64i::rv64i()  = default;
 rv64i::~rv64i() = default;
 
 void rv64i::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64i>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64i>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64i::get_regs_base_ptr() {

src/iss/arch/rv64imac.cpp

@@ -50,14 +50,10 @@ rv64imac::rv64imac()  = default;
 rv64imac::~rv64imac() = default;
 
 void rv64imac::reset(uint64_t address) {
-    auto base_ptr = reinterpret_cast<traits<rv64imac>::reg_t*>(get_regs_base_ptr());
-    for(size_t i=0; i<traits<rv64imac>::NUM_REGS; ++i)
-        *(base_ptr+i)=0;
+    std::memset(&reg, 0, sizeof(reg));
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
-    reg.trap_state=0;
-    reg.icount=0;
 }
 
 uint8_t *rv64imac::get_regs_base_ptr() {