From 0c9888aa2373958ae38787ed84b803701f73f0a1 Mon Sep 17 00:00:00 2001 From: bsp-open Date: Wed, 7 Apr 2021 17:09:43 +0800 Subject: [PATCH] Kernel: Xiaomi kernel changes for Redmi POCO X3 Pro Android R The Patch based on QualComm release TAG:LA.UM.9.1.r1-07000-SMxxx0.0-1 The kernel config file used is vayu_user_defconfig Change-Id: Id4ea3f2df79fb7224acbb82bf25afc5b3b9d0c38 Signed-off-by: bsp-open --- AndroidKernel.mk | 52 +- .../devicetree/bindings/media/spi-ir.txt | 24 + .../bindings/trusty/trusty-fiq-debugger.txt | 8 + .../devicetree/bindings/trusty/trusty-fiq.txt | 8 + .../bindings/trusty/trusty-hee-irq.txt | 6 + .../devicetree/bindings/trusty/trusty-irq.txt | 67 + .../devicetree/bindings/trusty/trusty-log.txt | 6 + .../devicetree/bindings/trusty/trusty-smc.txt | 6 + .../bindings/trusty/trusty-virtio.txt | 6 + .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm64/Kconfig | 25 + arch/arm64/boot/dts/qcom/Makefile | 30 +- .../dts/qcom/andromeda-audio-overlay.dtsi | 75 + .../boot/dts/qcom/andromeda-pinctrl-p1.dtsi | 125 + .../boot/dts/qcom/andromeda-pinctrl-p1_1.dtsi | 2 + .../boot/dts/qcom/andromeda-pinctrl-p2.dtsi | 2 + .../boot/dts/qcom/andromeda-pinctrl-p2_1.dtsi | 2 + .../boot/dts/qcom/andromeda-pinctrl-p2_2.dtsi | 2 + .../dts/qcom/andromeda-pinctrl-p2_21.dtsi | 2 + .../dts/qcom/andromeda-pinctrl-p2_22.dtsi | 2 + .../boot/dts/qcom/andromeda-pinctrl.dtsi | 534 + .../qcom/andromeda-sm8150-camera-sensor.dtsi | 493 + .../dts/qcom/andromeda-sm8150-overlay.dts | 33 + .../dts/qcom/andromeda-sm8150-p1-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p1.dtsi | 39 + .../qcom/andromeda-sm8150-p1_1-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p1_1.dtsi | 9 + .../dts/qcom/andromeda-sm8150-p2-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p2.dtsi | 6 + .../qcom/andromeda-sm8150-p2_1-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p2_1.dtsi | 6 + .../qcom/andromeda-sm8150-p2_2-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p2_2.dtsi | 6 + .../qcom/andromeda-sm8150-p2_21-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p2_21.dtsi | 6 + .../qcom/andromeda-sm8150-p2_22-overlay.dts | 35 + .../boot/dts/qcom/andromeda-sm8150-p2_22.dtsi | 6 + .../arm64/boot/dts/qcom/andromeda-sm8150.dtsi | 685 + .../arm64/boot/dts/qcom/atoll-atp-overlay.dts | 5 - .../batterydata-E5G-coslight-3700mah.dtsi | 136 + .../boot/dts/qcom/davinci-audio-overlay.dtsi | 38 + arch/arm64/boot/dts/qcom/davinci-pinctrl.dtsi | 384 + .../qcom/davinci-sm8150-camera-sensor.dtsi | 506 + .../boot/dts/qcom/davinci-sm8150-overlay.dts | 28 + arch/arm64/boot/dts/qcom/davinci-sm8150.dtsi | 584 + .../dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi | 261 + .../dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi | 245 + .../dsi-panel-samsung-fhd-ea8076-cmd.dtsi | 252 + .../dts/qcom/dsi-panel-ss-fhd-ea8076-cmd.dtsi | 262 + .../dsi-panel-ss-fhd-ea8076-global-cmd.dtsi | 262 + .../dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi | 162 + .../dsi-panel-tianma-fhd-nt36672a-video.dtsi | 386 + .../fg-gen4-batterydata-alium-3600mah.dtsi | 42 +- ...fg-gen4-batterydata-alium-3600mah_E5G.dtsi | 157 + .../fg-gen4-batterydata-vayu-NVT-5160mah.dtsi | 153 + ...gen4-batterydata-vayu-sunwoda-5160mah.dtsi | 153 + arch/arm64/boot/dts/qcom/pm8150.dtsi | 27 +- arch/arm64/boot/dts/qcom/pm8150b.dtsi | 11 +- arch/arm64/boot/dts/qcom/pm8150l.dtsi | 31 +- .../arm64/boot/dts/qcom/sdmmagpie-camera.dtsi | 0 arch/arm64/boot/dts/qcom/sdmmagpie.dtsi | 214 + .../boot/dts/qcom/sm8150-audio-overlay.dtsi | 26 +- arch/arm64/boot/dts/qcom/sm8150-audio.dtsi | 8 +- .../dts/qcom/sm8150-camera-sensor-cdp.dtsi | 6 + .../dts/qcom/sm8150-camera-sensor-mtp.dtsi | 6 + .../dts/qcom/sm8150-camera-sensor-qrd.dtsi | 6 + arch/arm64/boot/dts/qcom/sm8150-camera.dtsi | 12 +- arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi | 15 + arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi | 10 +- arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi | 88 +- .../boot/dts/qcom/sm8150-pmic-overlay.dtsi | 21 + arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi | 30 +- .../arm64/boot/dts/qcom/sm8150-regulator.dtsi | 6 +- .../boot/dts/qcom/sm8150-sde-display.dtsi | 273 +- .../boot/dts/qcom/sm8150-sdx50m-qrd.dtsi | 28 + arch/arm64/boot/dts/qcom/sm8150.dtsi | 86 +- arch/arm64/boot/dts/qcom/smb1390.dtsi | 8 +- .../arm64/boot/dts/qcom/trusty.dtsi | 25 +- .../boot/dts/qcom/vayu-audio-overlay.dtsi | 47 + arch/arm64/boot/dts/qcom/vayu-pinctrl.dtsi | 617 + .../qcom/vayu-sm8150-camera-sensor-mtp.dtsi | 506 + .../boot/dts/qcom/vayu-sm8150-overlay.dts | 28 + arch/arm64/boot/dts/qcom/vayu-sm8150.dtsi | 1939 + .../dts/qcom/xiaomi-sdx50-sm8150-common.dtsi | 405 + .../boot/dts/qcom/xiaomi-sm8150-common.dtsi | 449 + arch/arm64/configs/vayu_user_defconfig | 768 + .../configs/vendor/sm8150-perf_defconfig | 1 + arch/arm64/configs/vendor/sm8150_defconfig | 1 + .../configs/vendor/trinket-perf_defconfig | 1 + arch/arm64/configs/vendor/trinket_defconfig | 1 + arch/arm64/include/asm/bootinfo.h | 94 + arch/arm64/include/asm/cpucaps.h | 2 +- arch/arm64/include/asm/hwconf_manager.h | 53 + arch/arm64/kernel/Makefile | 2 + arch/arm64/kernel/bootinfo.c | 312 + arch/arm64/kernel/cpu_errata.c | 2 +- arch/arm64/kernel/hwconf_manager.c | 524 + arch/arm64/kernel/setup.c | 9 + arch/arm64/kernel/stacktrace.c | 63 + arch/arm64/kernel/traps.c | 35 + arch/sparc/mm/fault_32.c | 18 + arch/x86/kernel/process.c | 28 +- block/blk-core.c | 2 + block/elevator.c | 25 +- disable_dbgfs.sh | 47 +- drivers/Kconfig | 4 + drivers/Makefile | 2 + drivers/android/binder.c | 24 +- drivers/android/binder_alloc.c | 5 + drivers/base/firmware_class.c | 2 + drivers/base/power/wakeup.c | 90 +- drivers/base/syscore.c | 10 +- drivers/bus/mhi/devices/mhi_netdev.c | 1 + drivers/char/Kconfig | 4 + drivers/char/Makefile | 1 + drivers/char/adsprpc.c | 7 +- drivers/char/adsprpc_compat.c | 0 drivers/char/adsprpc_shared.h | 0 drivers/char/diag/diag_dci.c | 6 +- drivers/char/diag/diagfwd_cntl.c | 2 + drivers/char/diag/diagfwd_mhi.c | 1 - drivers/char/xlogchar.c | 231 + drivers/char/xlogchar.h | 40 + drivers/clk/clk.c | 2 +- drivers/cpufreq/cpu-boost.c | 110 +- drivers/cpufreq/cpufreq.c | 4 + drivers/cpufreq/cpufreq_times.c | 329 + drivers/cpuidle/lpm-levels.c | 19 +- drivers/crypto/Kconfig | 10 + drivers/crypto/msm/ice.c | 280 +- drivers/crypto/msm/qce50.c | 5 + drivers/dma-buf/dma-buf-ref.c | 12 +- drivers/dma-buf/dma-buf.c | 3 +- drivers/esoc/esoc-mdm-drv.c | 6 +- drivers/firmware/qcom/Kconfig | 2 +- drivers/firmware/qcom/tz_log.c | 465 +- drivers/gpio/gpiolib.c | 71 +- drivers/gpu/drm/Makefile | 2 +- drivers/gpu/drm/drm_auth.c | 2 + drivers/gpu/drm/drm_bridge.c | 37 + drivers/gpu/drm/drm_ioctl.c | 35 +- drivers/gpu/drm/drm_mipi_dsi.c | 14 + drivers/gpu/drm/drm_mm.c | 2 +- drivers/gpu/drm/drm_notifier_mi.c | 56 + drivers/gpu/drm/drm_sysfs.c | 174 + drivers/gpu/drm/msm/Kconfig | 5 +- drivers/gpu/drm/msm/dsi-staging/dsi_defs.h | 54 + drivers/gpu/drm/msm/dsi-staging/dsi_display.c | 228 +- drivers/gpu/drm/msm/dsi-staging/dsi_display.h | 12 + drivers/gpu/drm/msm/dsi-staging/dsi_drm.c | 293 +- drivers/gpu/drm/msm/dsi-staging/dsi_drm.h | 1 + drivers/gpu/drm/msm/dsi-staging/dsi_panel.c | 1495 +- drivers/gpu/drm/msm/dsi-staging/dsi_panel.h | 74 + .../gpu/drm/msm/dsi-staging/dsi_panel_mi.h | 86 + drivers/gpu/drm/msm/msm_drv.c | 37 +- drivers/gpu/drm/msm/msm_drv.h | 5 + drivers/gpu/drm/msm/sde/sde_connector.c | 381 +- drivers/gpu/drm/msm/sde/sde_connector.h | 21 + drivers/gpu/drm/msm/sde/sde_crtc.c | 300 + drivers/gpu/drm/msm/sde/sde_crtc.h | 13 + drivers/gpu/drm/msm/sde/sde_encoder.c | 14 + drivers/gpu/drm/msm/sde/sde_kms.c | 13 +- drivers/gpu/drm/msm/sde/sde_kms.h | 2 + drivers/gpu/drm/msm/sde/sde_plane.c | 16 + drivers/gpu/drm/msm/sde/sde_plane.h | 2 + drivers/gpu/drm/msm/sde_dbg.c | 8 + drivers/gpu/msm/Kconfig | 8 + drivers/gpu/msm/adreno_drawctxt.c | 1 - drivers/gpu/msm/kgsl.c | 108 +- drivers/gpu/msm/kgsl_debugfs.c | 3 + drivers/halls/Kconfig | 12 + drivers/halls/Makefile | 2 + drivers/halls/halls.c | 324 + drivers/hid/hid-core.c | 15 +- drivers/hid/hid-input.c | 4 + drivers/hid/hid-multitouch.c | 2 + drivers/iio/adc/qcom-spmi-adc5.c | 12 +- drivers/iio/proximity/Kconfig | 8 + drivers/iio/proximity/Makefile | 1 + drivers/iio/proximity/us_prox.c | 335 + drivers/input/Kconfig | 16 + drivers/input/Makefile | 1 + drivers/input/fingerprint/Kconfig | 18 + drivers/input/fingerprint/Makefile | 8 + drivers/input/fingerprint/fpc_vayu/Kconfig | 10 + drivers/input/fingerprint/fpc_vayu/Makefile | 1 + .../input/fingerprint/fpc_vayu/fpc1020_tee.c | 840 + .../input/fingerprint/goodix_ta_vayu/Kconfig | 10 + .../input/fingerprint/goodix_ta_vayu/Makefile | 1 + .../input/fingerprint/goodix_ta_vayu/gf_spi.c | 1089 + .../input/fingerprint/goodix_ta_vayu/gf_spi.h | 164 + .../fingerprint/goodix_ta_vayu/netlink.c | 99 + .../fingerprint/goodix_ta_vayu/platform.c | 142 + drivers/input/input.c | 3 - drivers/input/keyboard/gpio_keys.c | 29 +- drivers/input/misc/Kconfig | 12 + drivers/input/misc/Makefile | 1 + drivers/input/misc/akm09970.c | 976 + drivers/input/misc/aw8697_haptic_xm/Kconfig | 15 + drivers/input/misc/aw8697_haptic_xm/Makefile | 2 + drivers/input/misc/aw8697_haptic_xm/aw8697.c | 4885 ++ drivers/input/misc/aw8697_haptic_xm/aw8697.h | 464 + .../misc/aw8697_haptic_xm/aw8697_config.h | 117 + .../input/misc/aw8697_haptic_xm/aw8697_reg.h | 539 + .../input/misc/aw8697_haptic_xm/ringbuffer.c | 231 + .../input/misc/aw8697_haptic_xm/ringbuffer.h | 37 + drivers/input/misc/qpnp-power-on.c | 309 +- drivers/input/misc/qti-haptics.c | 6 +- drivers/input/touchscreen/Kconfig | 22 + drivers/input/touchscreen/Makefile | 4 + drivers/input/touchscreen/ndt_core.c | 1301 + drivers/input/touchscreen/ndt_core.h | 3 + drivers/input/touchscreen/nt36672c/Kconfig | 15 + drivers/input/touchscreen/nt36672c/Makefile | 7 + drivers/input/touchscreen/nt36672c/nt36xxx.c | 3238 + drivers/input/touchscreen/nt36672c/nt36xxx.h | 272 + .../touchscreen/nt36672c/nt36xxx_ext_proc.c | 716 + .../touchscreen/nt36672c/nt36xxx_fw_update.c | 1136 + .../touchscreen/nt36672c/nt36xxx_mem_map.h | 275 + .../touchscreen/nt36672c/nt36xxx_mp_ctrlram.c | 2468 + .../touchscreen/nt36672c/nt36xxx_mp_ctrlram.h | 90 + .../nt36672c/nt36xxx_mp_ctrlram_data.c | 408 + drivers/input/touchscreen/spi-xiaomi-tp.c | 190 + drivers/input/touchscreen/spi-xiaomi-tp.h | 52 + drivers/input/touchscreen/xiaomi/Kconfig | 27 + drivers/input/touchscreen/xiaomi/Makefile | 1 + .../input/touchscreen/xiaomi/xiaomi_touch.c | 495 + .../input/touchscreen/xiaomi/xiaomi_touch.h | 155 + drivers/irqchip/irq-gic-v3.c | 3 +- drivers/irqchip/msm_show_resume_irq.c | 2 +- drivers/leds/led-class.c | 23 +- drivers/leds/leds-qpnp-flash-v2.c | 41 +- drivers/leds/leds-qti-tri-led.c | 255 +- drivers/md/dm-crypt.c | 3 +- drivers/md/dm-default-key.c | 7 +- drivers/media/platform/msm/Kconfig | 5 + .../platform/msm/ais/cam_sync/cam_sync_util.c | 8 + drivers/media/platform/msm/camera/Kconfig | 14 + .../msm/camera/cam_cdm/cam_cdm_core_common.c | 3 +- .../msm/camera/cam_cdm/cam_cdm_hw_core.c | 3 +- .../msm/camera/cam_cdm/cam_cdm_util.c | 149 +- .../msm/camera/cam_cdm/cam_cdm_util.h | 44 +- .../platform/msm/camera/cam_core/Makefile | 1 - .../msm/camera/cam_core/cam_context.c | 51 +- .../msm/camera/cam_core/cam_context.h | 55 +- .../msm/camera/cam_core/cam_context_utils.c | 134 +- .../msm/camera/cam_core/cam_context_utils.h | 5 +- .../msm/camera/cam_core/cam_hw_intf.h | 6 +- .../msm/camera/cam_core/cam_hw_mgr_intf.h | 50 +- .../platform/msm/camera/cam_core/cam_node.c | 121 +- .../platform/msm/camera/cam_core/cam_node.h | 5 +- .../msm/camera/cam_cpas/cam_cpas_hw.c | 65 +- .../camera/cam_cpas/cpas_top/cam_cpastop_hw.c | 26 +- .../cam_cpas/cpas_top/cpastop_v150_110.h | 537 - .../camera/cam_cpas/include/cam_cpas_api.h | 4 +- .../msm/camera/cam_fd/cam_fd_context.c | 17 +- .../camera/cam_fd/fd_hw_mgr/cam_fd_hw_mgr.c | 109 +- .../camera/cam_fd/fd_hw_mgr/cam_fd_hw_mgr.h | 9 +- .../cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c | 61 +- .../cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_intf.h | 33 +- .../cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_soc.c | 3 +- .../msm/camera/cam_hyp_intf/cam_hyp_intf.c | 14 +- .../msm/camera/cam_icp/cam_icp_context.c | 28 +- .../msm/camera/cam_icp/cam_icp_context.h | 5 +- .../msm/camera/cam_icp/fw_inc/hfi_intf.h | 4 +- .../msm/camera/cam_icp/fw_inc/hfi_reg.h | 7 +- .../media/platform/msm/camera/cam_icp/hfi.c | 10 +- .../msm/camera/cam_icp/icp_hw/a5_hw/a5_core.c | 52 +- .../camera/cam_icp/icp_hw/bps_hw/bps_core.c | 6 +- .../icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c | 361 +- .../icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h | 20 +- .../icp_hw_mgr/include/cam_a5_hw_intf.h | 3 +- .../icp_hw/include/cam_icp_hw_mgr_intf.h | 28 - .../camera/cam_icp/icp_hw/ipe_hw/ipe_core.c | 7 +- .../msm/camera/cam_isp/cam_isp_context.c | 1456 +- .../msm/camera/cam_isp/cam_isp_context.h | 147 +- .../msm/camera/cam_isp/isp_hw_mgr/Makefile | 1 - .../cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c | 969 +- .../cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h | 2 - .../hw_utils/cam_isp_packet_parser.c | 67 +- .../isp_hw_mgr/hw_utils/cam_tasklet_util.c | 7 +- .../hw_utils/include/cam_isp_packet_parser.h | 8 - .../irq_controller/cam_irq_controller.c | 4 +- .../isp_hw_mgr/include/cam_isp_hw_mgr_intf.h | 47 +- .../isp_hw_mgr/isp_hw/ife_csid_hw/Makefile | 1 - .../isp_hw/ife_csid_hw/cam_csid_ppi170.c | 58 - .../isp_hw/ife_csid_hw/cam_csid_ppi170.h | 32 - .../isp_hw/ife_csid_hw/cam_csid_ppi_core.c | 396 - .../isp_hw/ife_csid_hw/cam_csid_ppi_core.h | 103 - .../isp_hw/ife_csid_hw/cam_csid_ppi_dev.c | 147 - .../isp_hw/ife_csid_hw/cam_ife_csid170.h | 6 +- .../isp_hw/ife_csid_hw/cam_ife_csid175.h | 6 +- .../isp_hw/ife_csid_hw/cam_ife_csid175_200.h | 6 +- .../isp_hw/ife_csid_hw/cam_ife_csid_core.c | 764 +- .../isp_hw/ife_csid_hw/cam_ife_csid_core.h | 68 +- .../isp_hw/ife_csid_hw/cam_ife_csid_soc.c | 28 +- .../isp_hw/include/cam_ife_csid_hw_intf.h | 27 - .../isp_hw_mgr/isp_hw/include/cam_isp_hw.h | 46 - .../isp_hw/include/cam_vfe_hw_intf.h | 13 - .../isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c | 26 +- .../isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_soc.c | 1 - .../isp_hw/vfe_hw/vfe17x/cam_vfe170.h | 189 - .../isp_hw/vfe_hw/vfe17x/cam_vfe175.h | 199 - .../isp_hw/vfe_hw/vfe17x/cam_vfe175_130.h | 200 - .../isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c | 241 +- .../isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.h | 34 - .../vfe_hw/vfe_top/cam_vfe_camif_lite_ver2.c | 3 +- .../vfe_hw/vfe_top/cam_vfe_camif_ver2.c | 26 +- .../isp_hw/vfe_hw/vfe_top/cam_vfe_rdi.c | 24 - .../isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.c | 224 +- .../isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver2.h | 31 +- .../msm/camera/cam_jpeg/cam_jpeg_context.c | 17 +- .../camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c | 321 +- .../camera/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.h | 12 +- .../jpeg_hw/include/cam_jpeg_hw_intf.h | 18 +- .../cam_jpeg_dma_hw_info_ver_4_2_0.h | 53 - .../jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c | 243 +- .../jpeg_hw/jpeg_dma_hw/jpeg_dma_core.h | 41 +- .../jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c | 17 +- .../cam_jpeg_enc_hw_info_ver_4_2_0.h | 8 +- .../jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c | 102 +- .../jpeg_hw/jpeg_enc_hw/jpeg_enc_core.h | 8 +- .../jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c | 4 +- .../msm/camera/cam_lrme/cam_lrme_context.c | 19 +- .../cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c | 131 +- .../lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.c | 135 +- .../lrme_hw_mgr/lrme_hw/cam_lrme_hw_core.h | 18 +- .../lrme_hw_mgr/lrme_hw/cam_lrme_hw_dev.c | 16 +- .../lrme_hw_mgr/lrme_hw/cam_lrme_hw_intf.h | 21 +- .../lrme_hw_mgr/lrme_hw/cam_lrme_hw_soc.c | 3 +- .../platform/msm/camera/cam_req_mgr/Makefile | 1 - .../msm/camera/cam_req_mgr/cam_mem_mgr.c | 3 +- .../msm/camera/cam_req_mgr/cam_req_mgr_core.c | 449 +- .../msm/camera/cam_req_mgr/cam_req_mgr_core.h | 38 +- .../msm/camera/cam_req_mgr/cam_req_mgr_dev.c | 25 - .../cam_req_mgr/cam_req_mgr_interface.h | 32 +- .../cam_actuator/cam_actuator_core.c | 207 + .../cam_actuator/cam_actuator_dev.h | 7 +- .../camera/cam_sensor_module/cam_cci/Makefile | 2 - .../cam_sensor_module/cam_cci/cam_cci_core.c | 6 +- .../cam_sensor_module/cam_cci/cam_cci_dev.c | 3 +- .../cam_sensor_module/cam_cci/cam_cci_dev.h | 2 +- .../cam_sensor_module/cam_cci/cam_cci_soc.c | 7 +- .../cam_sensor_module/cam_csiphy/Makefile | 1 - .../cam_csiphy/cam_csiphy_core.c | 57 +- .../cam_csiphy/cam_csiphy_dev.c | 7 +- .../cam_csiphy/cam_csiphy_dev.h | 6 +- .../cam_csiphy/cam_csiphy_soc.c | 32 +- .../cam_csiphy/include/cam_csiphy_1_1_hwreg.h | 88 +- .../include/cam_csiphy_1_1_hwreg_vayu.h | 556 + .../include/cam_csiphy_1_2_2_hwreg.h | 476 - .../cam_csiphy/include/cam_csiphy_1_2_hwreg.h | 2 +- .../cam_csiphy/include/cam_csiphy_2_0_hwreg.h | 28 - .../cam_sensor_module/cam_eeprom/Makefile | 2 - .../cam_eeprom/cam_eeprom_core.c | 26 +- .../cam_eeprom/cam_eeprom_dev.h | 7 +- .../cam_flash/cam_flash_dev.c | 4 +- .../cam_flash/cam_flash_dev.h | 5 +- .../cam_ir_led/cam_ir_led_dev.c | 22 +- .../camera/cam_sensor_module/cam_ois/Makefile | 1 - .../cam_sensor_module/cam_ois/cam_ois_core.c | 100 +- .../cam_sensor_module/cam_ois/cam_ois_dev.h | 7 +- .../cam_sensor/cam_sensor_core.c | 117 +- .../cam_sensor/cam_sensor_dev.h | 7 +- .../cam_sensor_utils/Makefile | 1 - .../cam_sensor_utils/cam_sensor_util.c | 19 +- .../msm/camera/cam_smmu/cam_smmu_api.c | 57 +- .../msm/camera/cam_smmu/cam_smmu_api.h | 14 +- .../platform/msm/camera/cam_sync/Makefile | 1 - .../platform/msm/camera/cam_sync/cam_sync.c | 34 +- .../msm/camera/cam_sync/cam_sync_api.h | 11 +- .../msm/camera/cam_sync/cam_sync_private.h | 4 +- .../msm/camera/cam_sync/cam_sync_util.c | 8 + .../msm/camera/cam_utils/cam_common_util.c | 21 +- .../msm/camera/cam_utils/cam_common_util.h | 24 +- .../msm/camera/cam_utils/cam_debug_util.h | 46 +- .../msm/camera/cam_utils/cam_io_util.c | 4 +- .../msm/camera/cam_utils/cam_packet_util.c | 170 +- .../msm/camera/cam_utils/cam_packet_util.h | 16 - .../msm/camera/cam_utils/cam_soc_util.c | 23 +- .../msm/camera/cam_utils/cam_soc_util.h | 7 +- .../platform/msm/camera/cam_utils/cam_trace.h | 30 +- drivers/media/platform/msm/sde/Kconfig | 5 + .../msm/sde/rotator/sde_rotator_debug.c | 8 + drivers/media/platform/ti-vpe/vpdma_priv.h | 2 +- drivers/media/rc/ir-spi.c | 325 +- drivers/mfd/Makefile | 2 + drivers/mfd/spk-id.c | 208 + drivers/misc/Kconfig | 58 +- drivers/misc/Makefile | 8 + drivers/misc/akm09970.c | 837 + drivers/misc/drv8846.c | 709 + drivers/misc/gpio-testing-mode.c | 197 + drivers/misc/qseecom.c | 6 + drivers/misc/simtray.c | 84 + drivers/misc/uid_sys_stats.c | 167 +- drivers/misc/xiaomi/Kconfig | 7 + drivers/misc/xiaomi/Makefile | 1 + drivers/misc/xiaomi/sched/Kconfig | 8 + drivers/misc/xiaomi/sched/Makefile | 15 + drivers/misc/xiaomi/sched/usf_eas.c | 399 + drivers/mmc/host/cmdq_hci-crypto-qti.c | 122 +- drivers/mmc/host/cmdq_hci-crypto-qti.h | 6 + .../ethernet/aquantia/atlantic-fwd/atl_fwd.c | 2 + drivers/net/wireless/cnss2/pci.c | 3 +- drivers/nfc/nq-nci.c | 123 +- drivers/of/fdt.c | 18 + drivers/of/of_batterydata.c | 11 +- drivers/pci/host/pci-msm.c | 6 + drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4.c | 14 +- drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4.h | 2 + drivers/pinctrl/qcom/pinctrl-msm.c | 35 +- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 35 +- .../msm/ipa/ipa_v3/ethernet/ipa_eth.c | 16 + drivers/platform/msm/ipa/ipa_v3/ipa_odl.c | 4 + drivers/power/reset/msm-poweroff.c | 19 +- drivers/power/supply/Kconfig | 7 + drivers/power/supply/Makefile | 3 + drivers/power/supply/maxim/Kconfig | 13 + drivers/power/supply/maxim/Makefile | 2 + drivers/power/supply/maxim/ds28e16.c | 1844 + drivers/power/supply/maxim/ds28e16.h | 116 + drivers/power/supply/maxim/onewire_gpio.c | 595 + drivers/power/supply/maxim/onewire_gpio.h | 10 + drivers/power/supply/maxim/sha384_software.c | 108 + drivers/power/supply/maxim/sha384_software.h | 29 + drivers/power/supply/maxim/ucl_hash.h | 53 + drivers/power/supply/maxim/ucl_retdefs.h | 240 + drivers/power/supply/maxim/ucl_sha3.c | 407 + drivers/power/supply/maxim/ucl_sha3.h | 261 + drivers/power/supply/power_supply_core.c | 2 +- drivers/power/supply/power_supply_leds.c | 3 + drivers/power/supply/power_supply_sysfs.c | 158 +- drivers/power/supply/qcom/Kconfig | 94 +- drivers/power/supply/qcom/Makefile | 8 + drivers/power/supply/qcom/battery.c | 23 + drivers/power/supply/qcom/fg-alg.c | 23 +- drivers/power/supply/qcom/fg-alg.h | 1 + drivers/power/supply/qcom/fg-core.h | 62 + drivers/power/supply/qcom/fg-util.c | 17 +- drivers/power/supply/qcom/halo_7221_cp.c | 747 + drivers/power/supply/qcom/pmic-voter.c | 21 +- drivers/power/supply/qcom/qpnp-fg-gen4-vayu.c | 7607 +++ drivers/power/supply/qcom/qpnp-fg-gen4.c | 665 +- drivers/power/supply/qcom/qpnp-qg.c | 7 + drivers/power/supply/qcom/qpnp-smb5-vayu.c | 4347 ++ drivers/power/supply/qcom/qpnp-smb5.c | 764 +- drivers/power/supply/qcom/rx1619_trim.c | 169 + drivers/power/supply/qcom/smb1390-charger.c | 114 +- drivers/power/supply/qcom/smb5-lib-vayu.c | 10580 ++++ drivers/power/supply/qcom/smb5-lib.c | 2239 +- drivers/power/supply/qcom/smb5-lib.h | 426 +- drivers/power/supply/qcom/smb5-reg.h | 34 +- .../power/supply/qcom/step-chg-jeita-vayu.c | 1233 + drivers/power/supply/qcom/step-chg-jeita.c | 167 +- drivers/power/supply/qcom/step-chg-jeita.h | 23 +- drivers/power/supply/rx1618.c | 1550 + drivers/power/supply/rx1618.h | 31 + drivers/power/supply/ti/Kconfig | 12 + drivers/power/supply/ti/Makefile | 1 + drivers/power/supply/ti/bq25970_reg.h | 791 + drivers/power/supply/ti/bq2597x_charger.c | 2447 + drivers/power/supply/ti/cp_qc30.c | 1211 + drivers/power/supply/ti/cp_qc30.h | 231 + drivers/power/supply/ti/pd_policy_manager.c | 1512 + drivers/power/supply/ti/pd_policy_manager.h | 239 + drivers/pwm/pwm-qti-lpg.c | 177 + drivers/regulator/core.c | 106 +- drivers/regulator/qpnp-lcdb-regulator.c | 11 + drivers/rpmsg/qcom_glink_native.c | 6 +- drivers/rtc/qpnp-rtc.c | 46 +- drivers/scsi/sd.c | 2 + drivers/scsi/ufs/Makefile | 3 +- drivers/scsi/ufs/WDC_256GB_1322.h | 48900 ++++++++++++++++ drivers/scsi/ufs/ufs-debugfs.c | 3 +- drivers/scsi/ufs/ufs-qcom.c | 4 +- drivers/scsi/ufs/ufs.h | 1 - drivers/scsi/ufs/ufs_quirks.h | 9 + drivers/scsi/ufs/ufshcd-crypto-qti.c | 65 +- drivers/scsi/ufs/ufshcd-crypto-qti.h | 3 + drivers/scsi/ufs/ufshcd-crypto.c | 1 - drivers/scsi/ufs/ufshcd.c | 131 +- drivers/scsi/ufs/ufshcd.h | 1 - drivers/sensors/sensors_ssc.c | 14 +- drivers/slimbus/slimbus.c | 2 + drivers/soc/qcom/dfc_qmi.c | 1 - drivers/soc/qcom/fsa4480-i2c.c | 1 + drivers/soc/qcom/microdump_collector.c | 116 +- drivers/soc/qcom/qmi_interface.c | 5 +- drivers/soc/qcom/rpm_stats.c | 28 +- drivers/soc/qcom/rpmh_master_stat.c | 31 + drivers/soc/qcom/socinfo.c | 62 +- drivers/soc/qcom/watchdog_v2.c | 25 +- drivers/spi/spi-geni-qcom.c | 3 +- drivers/spmi/spmi-pmic-arb.c | 151 +- drivers/staging/android/Makefile | 1 - drivers/staging/android/ion/ion.c | 105 +- drivers/staging/android/ion/ion.h | 11 + drivers/staging/android/ion/ion_system_heap.h | 2 +- drivers/staging/android/lowmemorykiller.c | 9 +- drivers/thermal/cpu_cooling.c | 51 +- drivers/thermal/thermal_core.c | 284 + drivers/trusty/Kconfig | 68 + drivers/trusty/Makefile | 17 + drivers/trusty/trusty-fiq-arm.c | 42 + drivers/trusty/trusty-fiq-arm64-glue.S | 59 + drivers/trusty/trusty-fiq-arm64.c | 172 + drivers/trusty/trusty-fiq.c | 85 + drivers/trusty/trusty-fiq.h | 16 + drivers/trusty/trusty-hee-irqs.c | 99 + drivers/trusty/trusty-ipc.c | 2462 + drivers/trusty/trusty-irq.c | 599 + drivers/trusty/trusty-link-shbuf.c | 677 + drivers/trusty/trusty-link-shbuf.h | 59 + drivers/trusty/trusty-log.c | 275 + drivers/trusty/trusty-log.h | 18 + drivers/trusty/trusty-mem.c | 161 + drivers/trusty/trusty-shm.c | 206 + drivers/trusty/trusty-virq.c | 238 + drivers/trusty/trusty-virq.h | 54 + drivers/trusty/trusty-virtio.c | 766 + drivers/trusty/trusty.c | 658 + drivers/tty/vt/selection.c | 14 +- drivers/usb/core/hub.c | 3 +- drivers/usb/dwc3/dwc3-msm.c | 9 +- drivers/usb/dwc3/gadget.c | 5 + drivers/usb/gadget/Kconfig | 1 - drivers/usb/gadget/configfs.c | 54 + drivers/usb/gadget/function/f_fs.c | 2 +- drivers/usb/gadget/function/f_mass_storage.c | 1 - drivers/usb/gadget/function/f_mtp.c | 1 + drivers/usb/pd/policy_engine.c | 736 +- drivers/usb/pd/usbpd.h | 51 + drivers/usb/phy/phy-msm-snps-hs.c | 46 +- drivers/video/backlight/backlight.c | 49 + firmware/Makefile | 66 +- firmware/j20s_novatek_ts_fw01.bin.ihex | 8707 +++ firmware/j20s_novatek_ts_fw02.bin.ihex | 8707 +++ firmware/j20s_novatek_ts_mp01.bin.ihex | 8707 +++ firmware/j20s_novatek_ts_mp02.bin.ihex | 8707 +++ firmware/ndt_fw.bin.ihex | 1249 + firmware/st_fts.ftb.ihex | 6813 +++ fs/binfmt_elf.c | 2 +- fs/crypto/crypto.c | 15 +- fs/crypto/fscrypt_private.h | 1 + fs/crypto/inline_crypt.c | 34 + fs/crypto/keysetup.c | 15 +- fs/crypto/keysetup_v1.c | 1 + fs/eventpoll.c | 32 +- fs/ext4/ext4.h | 13 +- fs/ext4/extents.c | 49 +- fs/ext4/inode.c | 146 +- fs/ext4/page-io.c | 109 +- fs/ext4/super.c | 19 +- fs/f2fs/checkpoint.c | 8 + fs/f2fs/debug.c | 10 +- fs/f2fs/f2fs.h | 1 + fs/f2fs/inline.c | 6 +- fs/f2fs/node.c | 52 +- fs/f2fs/segment.c | 9 - fs/f2fs/sysfs.c | 2 +- fs/fuse/Makefile | 1 + fs/fuse/dev.c | 43 +- fs/fuse/dir.c | 1 + fs/fuse/file.c | 102 +- fs/fuse/fuse_i.h | 30 + fs/fuse/inode.c | 23 +- fs/fuse/passthrough.c | 257 + fs/jbd2/commit.c | 53 + fs/jbd2/journal.c | 2 + fs/jbd2/transaction.c | 24 + fs/proc/base.c | 60 +- fs/proc/task_mmu.c | 19 +- fs/pstore/Kconfig | 8 + fs/pstore/inode.c | 39 + fs/pstore/ram.c | 44 + gen_headers_arm.bp | 3 + gen_headers_arm64.bp | 3 + include/crypto/ice.h | 8 +- include/drm/drm_bridge.h | 7 + include/drm/drm_device.h | 13 + include/drm/drm_mipi_dsi.h | 2 + include/drm/drm_notifier.h | 38 + include/linux/backing-dev-defs.h | 2 + include/linux/backlight.h | 7 + include/linux/bio-crypt-ctx.h | 2 + include/linux/bug.h | 2 + include/linux/cJSON.h | 72 + include/linux/cpu_cooling.h | 1 + include/linux/cpufreq.h | 1 + include/linux/delayacct.h | 44 + include/linux/fs.h | 2 + include/linux/fscrypt.h | 1 + include/linux/gfp.h | 9 +- include/linux/gpio_keys.h | 1 + include/linux/halls.h | 6 + include/linux/hid.h | 42 +- include/linux/input.h | 5 + include/linux/input/qpnp-power-on.h | 13 +- include/linux/input/touch_common_info.h | 41 + include/linux/jbd2.h | 32 + include/linux/leds.h | 1 + include/linux/mfd/spk-id.h | 32 + include/linux/mhi.h | 0 include/linux/mi_iolimit.h | 52 + include/linux/mm.h | 2 + include/linux/of_fdt.h | 2 + include/linux/pm_wakeup.h | 2 + include/linux/power/ln2702.h | 41 + include/linux/power/ln8282.h | 42 + include/linux/power_supply.h | 101 +- include/linux/psi_types.h | 5 + include/linux/pstore.h | 5 +- include/linux/sched.h | 1 - include/linux/stackdepot.h | 2 +- include/linux/trusty/hvcall.h | 131 + include/linux/trusty/sm_err.h | 43 + include/linux/trusty/smcall.h | 135 + include/linux/trusty/trusty.h | 91 + include/linux/trusty/trusty_ipc.h | 89 + include/linux/trusty/trusty_shm.h | 25 + include/linux/usb/gadget_configfs.h | 14 + include/net/sock.h | 1 + include/net/tcp.h | 3 + include/soc/qcom/socinfo.h | 26 + include/uapi/linux/akm09970.h | 98 + include/uapi/linux/bpf.h | 13 + include/uapi/linux/fs.h | 6 +- include/uapi/linux/fuse.h | 13 +- include/uapi/linux/input-event-codes.h | 7 + include/uapi/linux/virtio_ids.h | 1 + include/uapi/media/cam_defs.h | 28 +- include/uapi/media/cam_isp.h | 19 - include/uapi/media/cam_isp_ife.h | 3 +- include/uapi/media/cam_req_mgr.h | 19 +- include/uapi/media/cam_sensor.h | 1 + include/uapi/media/cam_sync.h | 19 - include/uapi/media/msm_cam_sensor.h | 2 - include/uapi/media/msmb_isp.h | 4 +- include/uapi/misc/akm09970.h | 70 + include/uapi/misc/drv8846.h | 47 + include/uapi/scsi/ufs/ufs.h | 1 - kernel/bpf/syscall.c | 29 + kernel/cred.c | 3 + kernel/delayacct.c | 59 + kernel/exit.c | 1 + kernel/irq/pm.c | 14 + kernel/mi_throttle.c | 329 + kernel/panic.c | 6 + kernel/power/main.c | 74 + kernel/power/power.h | 10 + kernel/power/process.c | 3 +- kernel/power/suspend.c | 11 +- kernel/sched/core.c | 16 + kernel/sched/cpufreq_schedutil.c | 8 +- kernel/sched/deadline.c | 1 - kernel/sched/fair.c | 2 +- kernel/sched/psi.c | 55 +- kernel/sched/rt.c | 1 - kernel/sched/sched.h | 10 +- kernel/sched/stop_task.c | 1 - kernel/signal.c | 1 - kernel/time/alarmtimer.c | 106 + kernel/time/sched_clock.c | 47 +- kernel/time/timekeeping.c | 32 +- kernel/trace/ring_buffer.c | 2 + lib/Kconfig | 5 + lib/Kconfig.debug | 15 + lib/Makefile | 2 + lib/cJSON.c | 870 + lib/kobject_uevent.c | 173 + lib/lzo/lzo1x_compress.c | 14 +- lib/stackdepot.c | 5 +- mm/compaction.c | 2 +- mm/filemap.c | 1 - mm/internal.h | 3 +- mm/page_alloc.c | 59 +- mm/page_owner.c | 4 +- net/core/filter.c | 41 + net/core/sock.c | 1 + net/ipv4/Kconfig | 6 +- net/ipv4/netfilter.c | 5 + net/qrtr/mhi.c | 3 +- net/qrtr/qrtr.c | 52 +- security/commoncap.c | 4 + sound/soc/soc-pcm.c | 2 + 686 files changed, 191603 insertions(+), 11338 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/spi-ir.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-fiq-debugger.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-fiq.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-hee-irq.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-irq.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-log.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-smc.txt create mode 100644 Documentation/devicetree/bindings/trusty/trusty-virtio.txt create mode 100644 arch/arm64/boot/dts/qcom/andromeda-audio-overlay.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1_1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_2.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_21.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_22.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-camera-sensor.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22.dtsi create mode 100644 arch/arm64/boot/dts/qcom/andromeda-sm8150.dtsi create mode 100644 arch/arm64/boot/dts/qcom/batterydata-E5G-coslight-3700mah.dtsi create mode 100755 arch/arm64/boot/dts/qcom/davinci-audio-overlay.dtsi create mode 100755 arch/arm64/boot/dts/qcom/davinci-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/qcom/davinci-sm8150-camera-sensor.dtsi create mode 100755 arch/arm64/boot/dts/qcom/davinci-sm8150-overlay.dts create mode 100755 arch/arm64/boot/dts/qcom/davinci-sm8150.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-samsung-fhd-ea8076-cmd.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-cmd.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi create mode 100755 arch/arm64/boot/dts/qcom/dsi-panel-tianma-fhd-nt36672a-video.dtsi create mode 100644 arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah_E5G.dtsi create mode 100644 arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi create mode 100644 arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi mode change 100644 => 100755 arch/arm64/boot/dts/qcom/sdmmagpie-camera.dtsi mode change 100644 => 100755 arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi rename drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_dev.h => arch/arm64/boot/dts/qcom/trusty.dtsi (57%) create mode 100644 arch/arm64/boot/dts/qcom/vayu-audio-overlay.dtsi create mode 100644 arch/arm64/boot/dts/qcom/vayu-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/qcom/vayu-sm8150-camera-sensor-mtp.dtsi create mode 100644 arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts create mode 100644 arch/arm64/boot/dts/qcom/vayu-sm8150.dtsi create mode 100644 arch/arm64/boot/dts/qcom/xiaomi-sdx50-sm8150-common.dtsi create mode 100644 arch/arm64/boot/dts/qcom/xiaomi-sm8150-common.dtsi create mode 100755 arch/arm64/configs/vayu_user_defconfig create mode 100644 arch/arm64/include/asm/bootinfo.h create mode 100644 arch/arm64/include/asm/hwconf_manager.h create mode 100644 arch/arm64/kernel/bootinfo.c create mode 100644 arch/arm64/kernel/hwconf_manager.c mode change 100644 => 100755 arch/arm64/kernel/stacktrace.c mode change 100644 => 100755 drivers/char/adsprpc.c mode change 100644 => 100755 drivers/char/adsprpc_compat.c mode change 100644 => 100755 drivers/char/adsprpc_shared.h create mode 100644 drivers/char/xlogchar.c create mode 100644 drivers/char/xlogchar.h mode change 100644 => 100755 drivers/dma-buf/dma-buf-ref.c mode change 100644 => 100755 drivers/esoc/esoc-mdm-drv.c mode change 100644 => 100755 drivers/gpu/drm/drm_ioctl.c create mode 100644 drivers/gpu/drm/drm_notifier_mi.c mode change 100644 => 100755 drivers/gpu/drm/msm/dsi-staging/dsi_panel.c create mode 100644 drivers/gpu/drm/msm/dsi-staging/dsi_panel_mi.h mode change 100644 => 100755 drivers/gpu/drm/msm/sde/sde_connector.c create mode 100644 drivers/halls/Kconfig create mode 100644 drivers/halls/Makefile create mode 100644 drivers/halls/halls.c create mode 100644 drivers/iio/proximity/us_prox.c create mode 100755 drivers/input/fingerprint/Kconfig create mode 100755 drivers/input/fingerprint/Makefile create mode 100644 drivers/input/fingerprint/fpc_vayu/Kconfig create mode 100644 drivers/input/fingerprint/fpc_vayu/Makefile create mode 100644 drivers/input/fingerprint/fpc_vayu/fpc1020_tee.c create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/Kconfig create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/Makefile create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/gf_spi.c create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/gf_spi.h create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/netlink.c create mode 100644 drivers/input/fingerprint/goodix_ta_vayu/platform.c create mode 100644 drivers/input/misc/akm09970.c create mode 100755 drivers/input/misc/aw8697_haptic_xm/Kconfig create mode 100755 drivers/input/misc/aw8697_haptic_xm/Makefile create mode 100755 drivers/input/misc/aw8697_haptic_xm/aw8697.c create mode 100755 drivers/input/misc/aw8697_haptic_xm/aw8697.h create mode 100755 drivers/input/misc/aw8697_haptic_xm/aw8697_config.h create mode 100755 drivers/input/misc/aw8697_haptic_xm/aw8697_reg.h create mode 100755 drivers/input/misc/aw8697_haptic_xm/ringbuffer.c create mode 100755 drivers/input/misc/aw8697_haptic_xm/ringbuffer.h mode change 100644 => 100755 drivers/input/touchscreen/Kconfig mode change 100644 => 100755 drivers/input/touchscreen/Makefile create mode 100644 drivers/input/touchscreen/ndt_core.c create mode 100644 drivers/input/touchscreen/ndt_core.h create mode 100755 drivers/input/touchscreen/nt36672c/Kconfig create mode 100755 drivers/input/touchscreen/nt36672c/Makefile create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx.c create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx.h create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx_ext_proc.c create mode 100644 drivers/input/touchscreen/nt36672c/nt36xxx_fw_update.c create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx_mem_map.h create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx_mp_ctrlram.c create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx_mp_ctrlram.h create mode 100755 drivers/input/touchscreen/nt36672c/nt36xxx_mp_ctrlram_data.c create mode 100755 drivers/input/touchscreen/spi-xiaomi-tp.c create mode 100755 drivers/input/touchscreen/spi-xiaomi-tp.h create mode 100755 drivers/input/touchscreen/xiaomi/Kconfig create mode 100644 drivers/input/touchscreen/xiaomi/Makefile create mode 100644 drivers/input/touchscreen/xiaomi/xiaomi_touch.c create mode 100644 drivers/input/touchscreen/xiaomi/xiaomi_touch.h create mode 100644 drivers/media/platform/msm/camera/Kconfig delete mode 100644 drivers/media/platform/msm/camera/cam_cpas/cpas_top/cpastop_v150_110.h delete mode 100644 drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi170.c delete mode 100644 drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi170.h delete mode 100644 drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_core.c delete mode 100644 drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_core.h delete mode 100644 drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_dev.c delete mode 100644 drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/cam_jpeg_dma_hw_info_ver_4_2_0.h create mode 100644 drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_1_hwreg_vayu.h delete mode 100644 drivers/media/platform/msm/camera/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_2_hwreg.h mode change 100644 => 100755 drivers/media/rc/ir-spi.c create mode 100644 drivers/mfd/spk-id.c mode change 100644 => 100755 drivers/misc/Kconfig mode change 100644 => 100755 drivers/misc/Makefile create mode 100644 drivers/misc/akm09970.c create mode 100644 drivers/misc/drv8846.c create mode 100755 drivers/misc/gpio-testing-mode.c create mode 100644 drivers/misc/simtray.c create mode 100644 drivers/misc/xiaomi/Kconfig create mode 100644 drivers/misc/xiaomi/Makefile create mode 100644 drivers/misc/xiaomi/sched/Kconfig create mode 100644 drivers/misc/xiaomi/sched/Makefile create mode 100644 drivers/misc/xiaomi/sched/usf_eas.c create mode 100644 drivers/power/supply/maxim/Kconfig create mode 100644 drivers/power/supply/maxim/Makefile create mode 100644 drivers/power/supply/maxim/ds28e16.c create mode 100644 drivers/power/supply/maxim/ds28e16.h create mode 100644 drivers/power/supply/maxim/onewire_gpio.c create mode 100644 drivers/power/supply/maxim/onewire_gpio.h create mode 100644 drivers/power/supply/maxim/sha384_software.c create mode 100644 drivers/power/supply/maxim/sha384_software.h create mode 100644 drivers/power/supply/maxim/ucl_hash.h create mode 100644 drivers/power/supply/maxim/ucl_retdefs.h create mode 100644 drivers/power/supply/maxim/ucl_sha3.c create mode 100644 drivers/power/supply/maxim/ucl_sha3.h create mode 100644 drivers/power/supply/qcom/halo_7221_cp.c create mode 100644 drivers/power/supply/qcom/qpnp-fg-gen4-vayu.c create mode 100644 drivers/power/supply/qcom/qpnp-smb5-vayu.c create mode 100644 drivers/power/supply/qcom/rx1619_trim.c create mode 100644 drivers/power/supply/qcom/smb5-lib-vayu.c create mode 100644 drivers/power/supply/qcom/step-chg-jeita-vayu.c create mode 100644 drivers/power/supply/rx1618.c create mode 100644 drivers/power/supply/rx1618.h create mode 100644 drivers/power/supply/ti/Kconfig create mode 100644 drivers/power/supply/ti/Makefile create mode 100644 drivers/power/supply/ti/bq25970_reg.h create mode 100644 drivers/power/supply/ti/bq2597x_charger.c create mode 100644 drivers/power/supply/ti/cp_qc30.c create mode 100644 drivers/power/supply/ti/cp_qc30.h create mode 100644 drivers/power/supply/ti/pd_policy_manager.c create mode 100644 drivers/power/supply/ti/pd_policy_manager.h mode change 100644 => 100755 drivers/regulator/qpnp-lcdb-regulator.c create mode 100644 drivers/scsi/ufs/WDC_256GB_1322.h mode change 100644 => 100755 drivers/sensors/sensors_ssc.c create mode 100644 drivers/trusty/Kconfig create mode 100644 drivers/trusty/Makefile create mode 100644 drivers/trusty/trusty-fiq-arm.c create mode 100644 drivers/trusty/trusty-fiq-arm64-glue.S create mode 100644 drivers/trusty/trusty-fiq-arm64.c create mode 100644 drivers/trusty/trusty-fiq.c create mode 100644 drivers/trusty/trusty-fiq.h create mode 100644 drivers/trusty/trusty-hee-irqs.c create mode 100644 drivers/trusty/trusty-ipc.c create mode 100644 drivers/trusty/trusty-irq.c create mode 100644 drivers/trusty/trusty-link-shbuf.c create mode 100644 drivers/trusty/trusty-link-shbuf.h create mode 100644 drivers/trusty/trusty-log.c create mode 100644 drivers/trusty/trusty-log.h create mode 100644 drivers/trusty/trusty-mem.c create mode 100644 drivers/trusty/trusty-shm.c create mode 100644 drivers/trusty/trusty-virq.c create mode 100644 drivers/trusty/trusty-virq.h create mode 100644 drivers/trusty/trusty-virtio.c create mode 100644 drivers/trusty/trusty.c create mode 100644 firmware/j20s_novatek_ts_fw01.bin.ihex create mode 100644 firmware/j20s_novatek_ts_fw02.bin.ihex create mode 100644 firmware/j20s_novatek_ts_mp01.bin.ihex create mode 100644 firmware/j20s_novatek_ts_mp02.bin.ihex create mode 100644 firmware/ndt_fw.bin.ihex create mode 100644 firmware/st_fts.ftb.ihex create mode 100644 fs/fuse/passthrough.c create mode 100644 include/drm/drm_notifier.h create mode 100644 include/linux/cJSON.h create mode 100644 include/linux/halls.h create mode 100644 include/linux/input/touch_common_info.h create mode 100644 include/linux/mfd/spk-id.h mode change 100644 => 100755 include/linux/mhi.h create mode 100644 include/linux/mi_iolimit.h create mode 100644 include/linux/power/ln2702.h create mode 100644 include/linux/power/ln8282.h mode change 100644 => 100755 include/linux/stackdepot.h create mode 100644 include/linux/trusty/hvcall.h create mode 100644 include/linux/trusty/sm_err.h create mode 100644 include/linux/trusty/smcall.h create mode 100644 include/linux/trusty/trusty.h create mode 100644 include/linux/trusty/trusty_ipc.h create mode 100644 include/linux/trusty/trusty_shm.h create mode 100644 include/uapi/linux/akm09970.h create mode 100644 include/uapi/misc/akm09970.h create mode 100644 include/uapi/misc/drv8846.h create mode 100644 kernel/mi_throttle.c create mode 100644 lib/cJSON.c mode change 100644 => 100755 lib/stackdepot.c diff --git a/AndroidKernel.mk b/AndroidKernel.mk index 73a2232be4a2e..a86cd76d2ad8d 100644 --- a/AndroidKernel.mk +++ b/AndroidKernel.mk @@ -36,7 +36,7 @@ KERNEL_HEADER_ARCH := $(TARGET_KERNEL_HEADER_ARCH) endif ifeq ($(shell echo $(KERNEL_DEFCONFIG) | grep vendor),) -KERNEL_DEFCONFIG := vendor/$(KERNEL_DEFCONFIG) +KERNEL_DEFCONFIG := $(KERNEL_DEFCONFIG) endif KERNEL_HEADER_DEFCONFIG := $(strip $(KERNEL_HEADER_DEFCONFIG)) @@ -51,6 +51,15 @@ KERNEL_CONFIG_OVERRIDE := CONFIG_ANDROID_BINDER_IPC_32BIT=y endif endif +ifeq ($(FACTORY_BUILD),1) +KERNEL_CONFIG_OVERRIDE_FACTORY := CONFIG_FACTORY_BUILD=y +KERNEL_CONFIG_OVERRIDE_DEVMEM := CONFIG_DEVMEM=y +endif + +ifeq ($(ENABLE_MIUI_DEBUGGING),true) +OVERRIDE_DEBUG_FS := true +endif + TARGET_KERNEL_CROSS_COMPILE_PREFIX := $(strip $(TARGET_KERNEL_CROSS_COMPILE_PREFIX)) ifeq ($(TARGET_KERNEL_CROSS_COMPILE_PREFIX),) KERNEL_CROSS_COMPILE := arm-eabi- @@ -176,35 +185,38 @@ $(KERNEL_USR): $(KERNEL_HEADERS_INSTALL) $(TARGET_PREBUILT_INT_KERNEL): $(KERNEL_USR) endif +$(KERNEL_OUT): + mkdir -p $(KERNEL_OUT) + $(KERNEL_CONFIG): $(KERNEL_OUT) - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_DEFCONFIG) + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_DEFCONFIG) $(hide) if [ ! -z "$(KERNEL_CONFIG_OVERRIDE)" ]; then \ echo "Overriding kernel config with '$(KERNEL_CONFIG_OVERRIDE)'"; \ echo $(KERNEL_CONFIG_OVERRIDE) >> $(KERNEL_OUT)/.config; \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi ifeq ($(TARGET_KERNEL_APPEND_DTB), true) TARGET_PREBUILT_INT_KERNEL_IMAGE := $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/Image $(TARGET_PREBUILT_INT_KERNEL_IMAGE): $(KERNEL_USR) $(TARGET_PREBUILT_INT_KERNEL_IMAGE): $(KERNEL_OUT) $(KERNEL_HEADERS_INSTALL) $(hide) echo "Building kernel modules..." - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) Image - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) modules - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) INSTALL_MOD_PATH=$(BUILD_ROOT_LOC)../$(KERNEL_MODULES_INSTALL) INSTALL_MOD_STRIP=1 $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) modules_install + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) Image + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) modules + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) INSTALL_MOD_PATH=$(BUILD_ROOT_LOC)../$(KERNEL_MODULES_INSTALL) INSTALL_MOD_STRIP=1 $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) modules_install $(mv-modules) $(clean-module-folder) $(TARGET_PREBUILT_INT_KERNEL): $(TARGET_PREBUILT_INT_KERNEL_IMAGE) $(hide) echo "Building kernel..." $(hide) rm -rf $(KERNEL_OUT)/arch/$(KERNEL_ARCH)/boot/dts - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) else TARGET_PREBUILT_INT_KERNEL_IMAGE := $(TARGET_PREBUILT_INT_KERNEL) $(TARGET_PREBUILT_INT_KERNEL): $(KERNEL_OUT) $(KERNEL_HEADERS_INSTALL) $(hide) echo "Building kernel..." - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) modules - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) INSTALL_MOD_PATH=$(BUILD_ROOT_LOC)../$(KERNEL_MODULES_INSTALL) INSTALL_MOD_STRIP=1 $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) modules_install + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_CFLAGS) modules + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) INSTALL_MOD_PATH=$(BUILD_ROOT_LOC)../$(KERNEL_MODULES_INSTALL) INSTALL_MOD_STRIP=1 $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) modules_install $(mv-modules) $(clean-module-folder) endif @@ -216,6 +228,7 @@ $(KERNEL_DEBUGFS): ARCH=$(KERNEL_ARCH) \ CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) \ DISABLE_DEBUGFS=$(KERNEL_DISABLE_DEBUGFS) \ + ENABLE_DEBUG_FS=$(OVERRIDE_DEBUG_FS) \ $(TARGET_KERNEL_SOURCE)/disable_dbgfs.sh \ $(real_cc) \ $(TARGET_KERNEL_MAKE_ARGS) @@ -223,8 +236,8 @@ $(KERNEL_DEBUGFS): $(KERNEL_HEADERS_INSTALL): $(KERNEL_OUT) $(hide) if [ ! -z "$(KERNEL_HEADER_DEFCONFIG)" ]; then \ rm -f $(BUILD_ROOT_LOC)$(KERNEL_CONFIG) && \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_HEADER_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_HEADER_DEFCONFIG) && \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_HEADER_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) headers_install && \ + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_HEADER_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_HEADER_DEFCONFIG) && \ + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_HEADER_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) headers_install && \ if [ -d "$(KERNEL_HEADERS_INSTALL)/include/bringup_headers" ]; then \ cp -Rf $(KERNEL_HEADERS_INSTALL)/include/bringup_headers/* $(KERNEL_HEADERS_INSTALL)/include/ ;\ fi ;\ @@ -232,11 +245,16 @@ $(KERNEL_HEADERS_INSTALL): $(KERNEL_OUT) $(hide) if [ "$(KERNEL_HEADER_DEFCONFIG)" != "$(KERNEL_DEFCONFIG)" ]; then \ echo "Used a different defconfig for header generation"; \ rm -f $(BUILD_ROOT_LOC)$(KERNEL_CONFIG); \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_DEFCONFIG); fi + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) $(KERNEL_DEFCONFIG); fi $(hide) if [ ! -z "$(KERNEL_CONFIG_OVERRIDE)" ]; then \ echo "Overriding kernel config with '$(KERNEL_CONFIG_OVERRIDE)'"; \ echo $(KERNEL_CONFIG_OVERRIDE) >> $(KERNEL_OUT)/.config; \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi + $(hide) if [ ! -z "$(KERNEL_CONFIG_OVERRIDE_FACTORY)" ]; then \ + echo "Overriding kernel config with '$(KERNEL_CONFIG_OVERRIDE_FACTORY)'"; \ + echo $(KERNEL_CONFIG_OVERRIDE_FACTORY) >> $(KERNEL_OUT)/.config; \ + echo $(KERNEL_CONFIG_OVERRIDE_DEVMEM) >>$(KERNEL_OUT)/.config; \ + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) oldconfig; fi # RTIC DTS to DTB (if MPGen enabled; # and make sure we don't break the build if rtic_mp.dts missing) @@ -255,14 +273,14 @@ $(INSTALLED_DTBIMAGE_TARGET): $(TARGET_PREBUILT_INT_KERNEL) $(INSTALLED_KERNEL_T .PHONY: kerneltags kerneltags: $(KERNEL_OUT) $(KERNEL_CONFIG) - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) tags + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) tags .PHONY: kernelconfig kernelconfig: $(KERNEL_OUT) $(KERNEL_CONFIG) env KCONFIG_NOTIMESTAMP=true \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) menuconfig + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) menuconfig env KCONFIG_NOTIMESTAMP=true \ - $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) savedefconfig + TZ=$(TZ) $(MAKE) -C $(TARGET_KERNEL_SOURCE) O=$(BUILD_ROOT_LOC)$(KERNEL_OUT) $(KERNEL_MAKE_ENV) ARCH=$(KERNEL_ARCH) CROSS_COMPILE=$(KERNEL_CROSS_COMPILE) $(real_cc) savedefconfig cp $(KERNEL_OUT)/defconfig $(TARGET_KERNEL_SOURCE)/arch/$(KERNEL_ARCH)/configs/$(KERNEL_DEFCONFIG) endif diff --git a/Documentation/devicetree/bindings/media/spi-ir.txt b/Documentation/devicetree/bindings/media/spi-ir.txt new file mode 100644 index 0000000000000..2232d92bcc002 --- /dev/null +++ b/Documentation/devicetree/bindings/media/spi-ir.txt @@ -0,0 +1,24 @@ +Device tree bindings for IR LED connected through SPI bus which is used as +remote controller. + +The IR LED switch is connected to the MOSI line of the SPI device and the data +are delivered thourgh that. + +Required properties: + - compatible: should be "ir-spi" + +Optional properties: + - irled,switch: specifies the gpio switch which enables the irled + +Example: + + irled@0 { + compatible = "ir-spi"; + reg = <0x0>; + spi-max-frequency = <5000000>; + irled,switch = <&gpr3 3 0>; + + controller-data { + samsung,spi-feedback-delay = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/trusty/trusty-fiq-debugger.txt b/Documentation/devicetree/bindings/trusty/trusty-fiq-debugger.txt new file mode 100644 index 0000000000000..18329d39487eb --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-fiq-debugger.txt @@ -0,0 +1,8 @@ +Trusty fiq debugger interface + +Provides a single fiq for the fiq debugger. + +Required properties: +- compatible: compatible = "android,trusty-fiq-v1-*"; where * is a serial port. + +Must be a child of the node that provides fiq support ("android,trusty-fiq-v1"). diff --git a/Documentation/devicetree/bindings/trusty/trusty-fiq.txt b/Documentation/devicetree/bindings/trusty/trusty-fiq.txt new file mode 100644 index 0000000000000..de810b955bc93 --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-fiq.txt @@ -0,0 +1,8 @@ +Trusty fiq interface + +Trusty provides fiq emulation. + +Required properties: +- compatible: "android,trusty-fiq-v1" + +Must be a child of the node that provides the trusty std/fast call interface. diff --git a/Documentation/devicetree/bindings/trusty/trusty-hee-irq.txt b/Documentation/devicetree/bindings/trusty/trusty-hee-irq.txt new file mode 100644 index 0000000000000..6227d10e5611d --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-hee-irq.txt @@ -0,0 +1,6 @@ +Trusty virq simulation interface + +Trusty is running in secure mode on the same (arm) cpu(s) as the current os. + +Required properties: +- compatible: "nbl,hee-irqs" diff --git a/Documentation/devicetree/bindings/trusty/trusty-irq.txt b/Documentation/devicetree/bindings/trusty/trusty-irq.txt new file mode 100644 index 0000000000000..5aefeb8e536fa --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-irq.txt @@ -0,0 +1,67 @@ +Trusty irq interface + +Trusty requires non-secure irqs to be forwarded to the secure OS. + +Required properties: +- compatible: "android,trusty-irq-v1" + +Optional properties: + +- interrupt-templates: is an optional property that works together + with "interrupt-ranges" to specify secure side to kernel IRQs mapping. + + It is a list of entries, each one of which defines a group of interrupts + having common properties, and has the following format: + < phandle irq_id_pos [templ_data]> + phandle - phandle of interrupt controller this template is for + irq_id_pos - the position of irq id in interrupt specifier array + for interrupt controller referenced by phandle. + templ_data - is an array of u32 values (could be empty) in the same + format as interrupt specifier for interrupt controller + referenced by phandle but with omitted irq id field. + +- interrupt-ranges: list of entries that specifies secure side to kernel + IRQs mapping. + + Each entry in the "interrupt-ranges" list has the following format: + + beg - first entry in this range + end - last entry in this range + templ_idx - index of entry in "interrupt-templates" property + that must be used as a template for all interrupts + in this range + +Example: +{ + gic: interrupt-controller@50041000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + ... + }; + ... + IPI: interrupt-controller { + compatible = "android,CustomIPI"; + #interrupt-cells = <1>; + interrupt-controller; + }; + ... + trusty { + compatible = "android,trusty-smc-v1"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + irq { + compatible = "android,trusty-irq-v1"; + interrupt-templates = <&IPI 0>, + <&gic 1 GIC_PPI 0>, + <&gic 1 GIC_SPI 0>; + interrupt-ranges = < 0 15 0>, + <16 31 1>, + <32 223 2>; + }; + } +} + +Must be a child of the node that provides the trusty std/fast call interface. diff --git a/Documentation/devicetree/bindings/trusty/trusty-log.txt b/Documentation/devicetree/bindings/trusty/trusty-log.txt new file mode 100644 index 0000000000000..1320125ea0d7f --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-log.txt @@ -0,0 +1,6 @@ +Trusty log interface + +Trusty log is service to print logs from secure world.. + +Required properties: +- compatible: "android,trusty-log-v1" diff --git a/Documentation/devicetree/bindings/trusty/trusty-smc.txt b/Documentation/devicetree/bindings/trusty/trusty-smc.txt new file mode 100644 index 0000000000000..1b39ad317c678 --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-smc.txt @@ -0,0 +1,6 @@ +Trusty smc interface + +Trusty is running in secure mode on the same (arm) cpu(s) as the current os. + +Required properties: +- compatible: "android,trusty-smc-v1" diff --git a/Documentation/devicetree/bindings/trusty/trusty-virtio.txt b/Documentation/devicetree/bindings/trusty/trusty-virtio.txt new file mode 100644 index 0000000000000..66b21d551e898 --- /dev/null +++ b/Documentation/devicetree/bindings/trusty/trusty-virtio.txt @@ -0,0 +1,6 @@ +Trusty virtio interface + +Trusty virtio is communication channel between secure and non-secure world.. + +Required properties: +- compatible: "android,trusty-virtio-v1" diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index f2cd95f3de3a9..13c017eccb844 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -230,6 +230,7 @@ murata Murata Manufacturing Co., Ltd. mxicy Macronix International Co., Ltd. myir MYIR Tech Limited national National Semiconductor +nbl Nebula OS, developed by GoldenRiver Technology Co., Ltd. nec NEC LCD Technologies, Ltd. neonode Neonode Inc. netgear NETGEAR diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 981b4dd47205f..f1187c17a5769 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -145,6 +145,7 @@ config ARM64 select SYSCTL_EXCEPTION_TRACE select THREAD_INFO_IN_TASK select ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT + select USER_STACKTRACE_SUPPORT help ARM 64-bit (AArch64) Linux support. @@ -1386,6 +1387,13 @@ config BUILD_ARM64_UNCOMPRESSED_KERNEL concatenated dtb. endchoice +config BOOT_INFO + bool "Boot information from bootloader" + default y + help + On embedded linux device, we try to collect more information from + bootloader to kernel. eg. powerup reason. + config KRYO_PMU_WORKAROUND bool "Workaround for PMU IRQ burst" default n @@ -1480,3 +1488,20 @@ source "arch/arm64/crypto/Kconfig" endif source "lib/Kconfig" + +config HWCONF_MANAGER + bool "Hardware configuration and monitor information" + default y + depends on CJSON + help + It provides all kinds of components configuration information and + monitor values. + + +config FACTORY_BUILD + bool "distiguish factory version from dev version" + default n + help + This macro will be defined when build factory version. It is used to + distinguish factory and dev codes in kernel. + diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6dcaa99ed2c5f..caafe6d707d95 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -80,13 +80,6 @@ endif else # TARGET_BOARD_TYPE != auto -dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb -dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb -dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb -dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb dtb-$(CONFIG_ARCH_QCS403) += qcs403-iot-sku1.dtb \ qcs403-iot-sku3.dtb \ qcs403-iot-sku5.dtb \ @@ -125,15 +118,10 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_SM8150) += \ sm8150-cdp-overlay.dtbo \ sm8150-mtp-overlay.dtbo \ + vayu-sm8150-overlay.dtbo \ sm8150-rumi-overlay.dtbo \ sm8150-qrd-overlay.dtbo \ sm8150-qrd-dvt-overlay.dtbo \ - sa8155-adp-star-overlay.dtbo \ - sa8155p-adp-star-overlay.dtbo \ - sa8155-v2-adp-air-overlay.dtbo \ - sa8155p-v2-adp-air-overlay.dtbo \ - sa8155-adp-alcor-overlay.dtbo \ - sa8155p-adp-alcor-overlay.dtbo \ sm8150-sdx50m-cdp-overlay.dtbo \ sm8150-sdx50m-mtp-overlay.dtbo \ sm8150-sdx50m-mtp-2.5k-panel-overlay.dtbo \ @@ -147,18 +135,22 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) sm8150-marmot-mtp-overlay.dtbo \ sm8150-hdk-overlay.dtbo + sm8150-cdp-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-mtp-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +vayu-sm8150-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p1-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p1_1-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p2-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p2_1-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p2_2-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p2_21-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb +andromeda-sm8150-p2_22-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-rumi-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-qrd-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-hdk-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-qrd-dvt-overlay.dtbo-base := sm8150-v2.dtb sm8150p-v2.dtb -sa8155-adp-star-overlay.dtbo-base := sa8155.dtb sa8155-v2.dtb -sa8155p-adp-star-overlay.dtbo-base := sa8155p.dtb sa8155p-v2.dtb -sa8155-v2-adp-air-overlay.dtbo-base := sa8155.dtb sa8155-v2.dtb -sa8155p-v2-adp-air-overlay.dtbo-base := sa8155p.dtb sa8155p-v2.dtb -sa8155-adp-alcor-overlay.dtbo-base := sa8155.dtb sa8155-v2.dtb -sa8155p-adp-alcor-overlay.dtbo-base := sa8155p.dtb sa8155p-v2.dtb sm8150-sdx50m-cdp-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-sdx50m-mtp-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb sm8150-sdx50m-mtp-2.5k-panel-overlay.dtbo-base := sm8150.dtb sm8150-v2.dtb sm8150p.dtb sm8150p-v2.dtb diff --git a/arch/arm64/boot/dts/qcom/andromeda-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/andromeda-audio-overlay.dtsi new file mode 100644 index 0000000000000..e5d72bdccb2c2 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-audio-overlay.dtsi @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "sm8150-audio-overlay.dtsi" + + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "MIC BIAS2", "Headset Mic", + "AMIC2_EXT_0", "MIC BIAS2", + "MIC BIAS4", "ANCLeft Headset Mic", + "AMIC2_EXT_1", "MIC BIAS4", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS1", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS4", + "MIC BIAS4", "ANCLeft Headset Mic"; + + qcom,uart-audio-sw-gpio = <&sbu_uart_en>; + qcom,adc2-switch-gpio = <&adc2_switch_gpio>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,fsa4476-gpio-support = <1>; + qcom,usbc-analog-en1-gpio = <&wcd_usbc_analog_en1_gpio>; + qcom,usbc-analog-en2-gpio = <&tlmm 35 0>; + + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable", + "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; + pinctrl-4 = <&wcd_usbc_analog_en2_active>; + pinctrl-5 = <&wcd_usbc_analog_en2_idle>; +}; + +&soc { + sbu_uart_en: msm_cdc_pinctrl@25 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&sbu_uart_en_active>; + pinctrl-1 = <&sbu_uart_en_idle>; + }; + + adc2_switch_gpio: msm_cdc_pinctrl@130 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&adc2_switch_gpio_active>; + pinctrl-1 = <&adc2_switch_gpio_idle>; + }; + + wcd_usbc_analog_en1_gpio: msm_cdc_pinctrl@152 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en1_active>; + pinctrl-1 = <&wcd_usbc_analog_en1_idle>; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1.dtsi new file mode 100644 index 0000000000000..8608642bee991 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1.dtsi @@ -0,0 +1,125 @@ +/*for E5 5G pinctrl*/ + +&tlmm { + + nfc { + nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + ai_key_ctrl { + ai_key_active { + mux { + pins = "gpio41"; + function = "gpio"; + }; + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + + }; + + ai_key_idle { + mux { + pins = "gpio41"; + function = "gpio"; + }; + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1_1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1_1.dtsi new file mode 100644 index 0000000000000..b7a31e8b2aae2 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p1_1.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2.dtsi new file mode 100644 index 0000000000000..549da08e5a9b9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p1_1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_1.dtsi new file mode 100644 index 0000000000000..b81dd3abfcd4d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_1.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_2.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_2.dtsi new file mode 100644 index 0000000000000..b81dd3abfcd4d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_2.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_21.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_21.dtsi new file mode 100644 index 0000000000000..b81dd3abfcd4d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_21.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_22.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_22.dtsi new file mode 100644 index 0000000000000..b81dd3abfcd4d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl-p2_22.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/andromeda-pinctrl.dtsi new file mode 100644 index 0000000000000..6bf9122c3e6c7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-pinctrl.dtsi @@ -0,0 +1,534 @@ +/*for E5 5G pinctrl*/ + +&tlmm { + + /* GPIO_119 : FP_RESET_N */ + msm_gpio_119: msm_gpio_119 { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_119 : FP_RESET_N, state device active*/ + msm_gpio_119_output_high: msm_gpio_119_output_high { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + cam_sensor_active_wide: cam_sensor_active_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio21"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_wide: cam_sensor_suspend_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio21"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_tele: cam_sensor_active_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio29"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_tele: cam_sensor_suspend_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio29"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_front: cam_sensor_active_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio32"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio32"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_front: cam_sensor_suspend_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio32"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio32"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_ultra: cam_sensor_active_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio33"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio33"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_ultra: cam_sensor_suspend_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio33"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio33"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_actuator_wide_en: cam_actuator_wide_en { + mux { + pins = "gpio26"; + function = "gpio"; + }; + + config { + pins = "gpio26"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_actuator_tele_en: cam_actuator_tele_en { + mux { + pins = "gpio31"; + function = "gpio"; + }; + + config { + pins = "gpio31"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_viodd_en: cam_sensor_viodd_en { + mux { + pins = "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio34"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio41", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio41", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio41", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio41", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + ai_key_ctrl { + ai_key_active_default: ai_key_active { + mux { + pins = "gpio36"; + function = "gpio"; + }; + config { + pins = "gpio36"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + + }; + + ai_key_idle_default: ai_key_idle { + mux { + pins = "gpio36"; + function = "gpio"; + }; + config { + pins = "gpio36"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + + wcd_usbc_analog_en1 { + wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { + mux { + pins = "gpio152"; + function = "gpio"; + }; + config { + pins = "gpio152"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { + mux { + pins = "gpio152"; + function = "gpio"; + }; + config { + pins = "gpio152"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + wcd_usbc_analog_en2 { + wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + +}; + +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-camera-sensor.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-camera-sensor.dtsi new file mode 100644 index 0000000000000..d151ee5a26feb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-camera-sensor.dtsi @@ -0,0 +1,493 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&pm8150l_switch0 { + label = "switch"; + qcom,led-name = "led:switch_0"; + qcom,led-mask = <3>; + qcom,default-led-trigger = "switch0_trigger"; +}; + +&pm8150l_switch1 { + label = "switch"; + qcom,led-name = "led:switch_1"; + qcom,led-mask = <4>; + com,default-led-trigger = "switch1_trigger"; +}; + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash2>; + torch-source = <&pm8150l_torch2>; + switch-source = <&pm8150l_switch1>; + status = "ok"; + }; + + led_flash_front_aux: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash2>; + torch-source = <&pm8150l_torch2>; + switch-source = <&pm8150l_switch1>; + status = "ok"; + }; + + wide_actuator_regulator: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 26 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_wide_en>; + vin-supply = <&pm8150l_bob>; + }; + + tele_actuator_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 31 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_tele_en>; + vin-supply = <&pm8150l_bob>; + }; + + camera_viodd_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 34 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_sensor_viodd_en>; + vin-supply = <&pm8150_s4>; + }; + + camera_ois_regulator: gpio-regulator@3 { + compatible = "regulator-fixed"; + reg = <0x03 0x00>; + regulator-name = "camera_ois_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150_s4>; + }; +}; + +&cam_cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&wide_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&tele_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + ois_rear: qcom,ois@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,ois"; + cci-master = <0>; + cam_vaf-supply = <&camera_ois_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + status = "ok"; + }; + + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0 >; + rgltr-max-voltage = <1800000 0 >; + rgltr-load-current = <1000 0 >; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front_aux: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x03>; + compatible = "qcom,eeprom"; + slave-addr = <0xA2>; + i2c-freq-mode = <1>; + cam_vio-supply = <&camera_viodd_ldo>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + ois-src = <&ois_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 10000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>, + <&tlmm 28 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET_W", + "CAM_VDD0_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET_T", + "CAM_VDD1_EN"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + led-flash-src = <&led_flash_front>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 12 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET_F", + "CAM_VDD2_EN"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + led-flash-src = <&led_flash_front_aux>; + eeprom-src = <&eeprom_front_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <1000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>, + <&tlmm 23 0>, + <&tlmm 33 0>; + gpio-standby = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_PWD_U", + "CAM_VDD3_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts new file mode 100644 index 0000000000000..0e17d817f3579 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts @@ -0,0 +1,33 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-sm8150.dtsi" +#include "andromeda-audio-overlay.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x27 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts new file mode 100644 index 0000000000000..5fa21e13de052 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p1.dtsi" +#include "andromeda-pinctrl-p1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x28 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1.dtsi new file mode 100644 index 0000000000000..075fad8a03718 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1.dtsi @@ -0,0 +1,39 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150.dtsi" +&soc { + gpio_keys { + pinctrl-0 = <&ai_key_active_default>; + ai_key { + label = "ai_key"; + gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <39>; + }; + }; +}; +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 36 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts new file mode 100644 index 0000000000000..efdf2e64d2182 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p1_1.dtsi" +#include "andromeda-pinctrl-p1_1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2b 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1.dtsi new file mode 100644 index 0000000000000..3c441a515ab53 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1.dtsi @@ -0,0 +1,9 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p1.dtsi" +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts new file mode 100644 index 0000000000000..6d6cbe20cf44e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p2.dtsi" +#include "andromeda-pinctrl-p2.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x29 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2.dtsi new file mode 100644 index 0000000000000..5e907d4f7f5a9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p1_1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts new file mode 100644 index 0000000000000..0da30b641d714 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p2_1.dtsi" +#include "andromeda-pinctrl-p2_1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2c 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1.dtsi new file mode 100644 index 0000000000000..d6ab8778539fe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts new file mode 100644 index 0000000000000..ee6381ca95370 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p2_2.dtsi" +#include "andromeda-pinctrl-p2_2.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2d 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2.dtsi new file mode 100644 index 0000000000000..d6ab8778539fe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts new file mode 100644 index 0000000000000..051489bdee677 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p2_21.dtsi" +#include "andromeda-pinctrl-p2_21.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2e 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21.dtsi new file mode 100644 index 0000000000000..d6ab8778539fe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts new file mode 100644 index 0000000000000..14d18d0b6851f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts @@ -0,0 +1,35 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "andromeda-audio-overlay.dtsi" + +#include "andromeda-sm8150-p2_22.dtsi" +#include "andromeda-pinctrl-p2_22.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2f 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22.dtsi new file mode 100644 index 0000000000000..d6ab8778539fe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150.dtsi b/arch/arm64/boot/dts/qcom/andromeda-sm8150.dtsi new file mode 100644 index 0000000000000..b2870c2ab0add --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150.dtsi @@ -0,0 +1,685 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-pinctrl.dtsi" +#include "xiaomi-sdx50-sm8150-common.dtsi" + +#include "andromeda-sm8150-camera-sensor.dtsi" + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 37 0>; + }; + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 7 0>; + }; + + dsi_amoled_panel_pwr_external_supply: dsi_amoled_panel_pwr_external_supply { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + //qcom,supply-post-on-sleep = <20>; + }; + + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vcie"; + qcom,supply-min-voltage = <3000000>; + qcom,supply-max-voltage = <3000000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-pre-off-sleep = <10>; + }; + }; + + fp_vdd_vreg: fp_vdd_vreg { + compatible = "regulator-fixed"; + regulator-name = "fp_vdd_vreg"; + startup-delay-us = <4000>; + enable-active-high; + gpio = <&tlmm 92 0>; + regulator-always-on; + }; + fingerprint_fpc { + status = "ok"; + compatible = "fpc,fpc1020"; + interrupt-parent = <&tlmm>; + interrupts = <118 0x0>; + fpc,gpio_irq = <&tlmm 118 0x0>; + /* fpc,enable-on-boot; */ + /* fpc,enable-wakeup; */ + + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active"; + + pinctrl-0 = <&msm_gpio_119>; + pinctrl-1 = <&msm_gpio_119_output_high>; + }; + pcie0: qcom,pcie@1c00000 { + status = "disabled"; + }; + + gpio_keys { + pinctrl-0 = <&ai_key_active_default>; + ai_key { + label = "ai_key"; + gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <39>; + }; + }; + +}; + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 1 1 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <400>; + qcom,ramp-pause-hi-count = <0>; + qcom,ramp-pause-lo-count = <0>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <5>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&qcom_qbt1000 { + status = "disabled"; +}; + +&qcom_seecom { + reg = <0x87900000 0x3E00000>; +}; + +&qcom_smcinvoke { + reg = <0x87900000 0x3E00000>; +}; + +&qupv3_se4_i2c { + status = "ok"; + + fsa4480@42 { + status = "disabled"; + }; +}; + +&qupv3_se8_i2c { + status = "ok"; + /*smart PA*/ + tas2557@4c{ + compatible = "ti,tas2557"; + reg = <0x4c>; + ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 115 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + fts@49 { + compatible = "st,fts"; + reg = <0x49>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2008>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + vdd-supply = <&pm8150l_l1>; + avdd-supply = <&touch_vddio_vreg>; + fts,pwr-reg-name = "avdd"; + fts,bus-reg-name = "vdd"; + fts,irq-gpio = <&tlmm 122 0x2008>; + fts,irq-gpio-name = "fts_irq"; + fts,reset-gpio-enable; + fts,reset-gpio = <&tlmm 54 0x00>; + fts,reset-gpio-name = "fts_rst"; + fts,irq-flags = <0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ + fts,x-max = <1080>; + fts,y-max = <2340>; + fts,default-fw-name = "st_fts_e5.ftb"; + fts,config-array-size = <1>; + fts,dump-click-count; + fts,disable-fw-update; + fts,touch-up-threshold-min = <40>; + fts,touch-up-threshold-max = <120>; + fts,touch-up-threshold-def = <80>; + fts,touch-tolerance-min = <5>; + fts,touch-tolerance-max = <35>; + fts,touch-tolerance-def = <25>; + fts,touch-wgh-min-def = <1>; + fts,touch-wgh-min-max = <15>; + fts,touch-wgh-min-min = <0>; + fts,touch-wgh-max-def = <5>; + fts,touch-wgh-max-max = <15>; + fts,touch-wgh-max-min = <0>; + fts,touch-wgh-step-def = <1>; + fts,touch-wgh-step-max = <2>; + fts,touch-wgh-step-min = <0>; + fts,edgefilter-leftrigt-def = <45>; + fts,edgefilter-topbottom-def = <0>; + fts,edgefilter-top-ingamemode = <0>; + fts,edgefilter-bottom-ingamemode = <0>; + fts,edgefilter-area-step1 = <100>; + fts,edgefilter-area-step2 = <170>; + fts,edgefilter-area-step3 = <250>; + fts,cfg_0 { + fts,tp-vendor = <0x52>; + fts,fw-name = "st_fts_e5.ftb"; + fts,limit-name = "stm_fts_production_limits.csv"; + fts,clicknum-file-name = "fts+sdc"; + }; + }; +}; + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "batterydata-E5G-coslight-3700mah.dtsi" + #include "fg-gen4-batterydata-alium-3600mah_E5G.dtsi" + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <1>; + qcom,usb-icl-ua = <2800000>; + qcom,fcc-max-ua = <3700000>; + qcom,fv-max-uv = <4450000>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-220)>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 1800000 1800000 1800000 1700000 1600000 1500000 1300000 + 1000000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3500000 3400000 3300000 3200000 3200000 3200000 + 3200000 3200000 2800000 2400000 2200000 2000000 1300000 + 750000 700000>; + qcom,thermal-fcc-qc3-classb-cp + = <3700000 3700000 3700000 3700000 3700000 3700000 3700000 + 3700000 3700000 3600000 3400000 3200000 3000000 2200000 + 2000000 700000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2400000 2200000 2000000 1800000 + 1600000 1600000 1400000 1200000 1100000 1050000 1000000 + 950000 500000>; + qcom,thermal-fcc-pps-cp + = <3700000 3700000 3700000 3700000 3700000 3700000 3700000 + 3700000 3700000 3600000 3400000 3200000 3000000 2200000 + 2000000 700000>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&ext_5v_boost { + status = "ok"; +}; + +&pm8150b_pdphy { + vbus-supply = <&ext_5v_boost>; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x33 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l10>; + vcc-voltage-level = <2950000 2960000>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <750000>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l9>; + qcom,vddp-ref-clk-max-microamp = <100>; + + status = "ok"; +}; + diff --git a/arch/arm64/boot/dts/qcom/atoll-atp-overlay.dts b/arch/arm64/boot/dts/qcom/atoll-atp-overlay.dts index 48efdc53dbc1e..28d6d79ddfbd0 100644 --- a/arch/arm64/boot/dts/qcom/atoll-atp-overlay.dts +++ b/arch/arm64/boot/dts/qcom/atoll-atp-overlay.dts @@ -16,7 +16,6 @@ #include #include "atoll-atp.dtsi" -#include "atoll-audio-overlay.dtsi" / { model = "ATP"; @@ -24,7 +23,3 @@ qcom,msm-id = <407 0x0>; qcom,board-id = <33 0>; }; - -&dsi_rm69299_visionox_amoled_vid_display { - qcom,dsi-display-active; -}; diff --git a/arch/arm64/boot/dts/qcom/batterydata-E5G-coslight-3700mah.dtsi b/arch/arm64/boot/dts/qcom/batterydata-E5G-coslight-3700mah.dtsi new file mode 100644 index 0000000000000..0e2a81b1e1921 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/batterydata-E5G-coslight-3700mah.dtsi @@ -0,0 +1,136 @@ + +qcom,3811462_xiaomi_bm3gcos_3700mah_slave_jan3rd2019 { + qcom,profile-revision = <24>; + /* #3811462_Xiaomi_BM3Gcos_3700mAh_Slave_Jan3rd2019*/ + qcom,fastchg-current-ma = <3700>; + qcom,jeita-fcc-ranges = <0 50 370000 + 51 100 1110000 + 101 150 1850000 + 151 450 3700000 + 451 580 1850000>; + qcom,jeita-fv-ranges = <0 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4450000 + 451 580 4100000>; + qcom,max-voltage-uv = <4450000>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,nom-batt-capacity-mah = <3800>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "e5g_cos"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x4a 0x15 0x95 0x12>; + qcom,rslow-low-coeffs = <0x9f 0x06 0x70 0x1a>; + qcom,checksum = <0xB9FD>; + qcom,gui-version = "PM855GUI - 1.0.0.13"; + qcom,fg-profile-data = [ + 09 00 99 EA + EF ED 05 F2 + B6 07 00 00 + 69 BD 45 83 + 01 80 15 8C + 8C 80 09 80 + 13 00 4A 15 + 95 12 1B 06 + EB F3 CE 07 + 32 00 76 EA + 01 E4 5B DA + D1 02 95 E5 + 67 BD 1E 2A + 26 0B 64 D3 + 60 00 4C 00 + 4F 00 43 00 + 2F 00 31 00 + 35 00 3E 00 + 40 00 48 00 + 43 00 60 00 + 42 00 4F 00 + 58 00 52 00 + 4F 00 9C 00 + 6C 64 5B 00 + 5E 00 74 00 + 60 F0 57 00 + 5F 00 83 10 + 67 10 67 00 + AD 20 76 40 + 68 60 64 09 + 71 00 D8 00 + C3 1E 6D 0E + C1 03 23 04 + 82 1C 36 0B + 8E 0D F4 22 + E4 1A 5B 42 + 23 5C 46 02 + 5A 11 33 1F + ED 05 61 0A + 6C FE C8 1C + 49 FA 24 05 + 69 03 2B 17 + FE 23 76 44 + 26 52 6A 13 + 40 1F F7 ED + 4C E2 0F ED + DE 1C 4D E3 + FB 04 C5 BB + A7 17 66 83 + 37 85 1F A3 + 7C A8 09 80 + 54 FA BF 0D + 8F FA 91 04 + 00 00 D7 D5 + 66 EA 02 10 + 5D E2 7B CC + 41 01 0F F0 + BF BC 91 03 + CD 04 E6 00 + CE 07 32 00 + 81 01 A3 02 + 2F 05 29 02 + F7 02 F3 05 + C3 06 AA 02 + F0 03 50 00 + 3F 00 41 00 + 40 64 40 00 + 3D 08 40 10 + 3C 08 3F 00 + 54 00 79 08 + 5C 08 48 00 + 58 28 58 50 + 61 70 6F 07 + 4F 00 57 00 + 57 08 67 00 + FF 00 57 00 + 51 10 5F 10 + 61 00 78 28 + 91 48 5D 58 + 5D 0D 50 00 + 5B 00 FF 08 + D8 00 B5 22 + 03 05 BD 12 + A2 15 3F 1D + 60 22 F4 4C + 6D 5B 93 18 + D0 03 03 04 + D6 02 7D 0E + 3F 0A 43 20 + D8 04 34 03 + 96 05 D3 1C + 04 03 E9 05 + 58 02 74 18 + 0A 02 AF 05 + A5 03 6B 00 + A0 1F 54 05 + 16 03 80 05 + A6 1C 56 03 + 7F 05 03 03 + 7E 18 C6 03 + F2 05 1D 03 + 5F 00 88 01 + C0 00 FA 00 + 67 0F 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/davinci-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/davinci-audio-overlay.dtsi new file mode 100755 index 0000000000000..af5598183004d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/davinci-audio-overlay.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,wsa-max-devs = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-usbc-audio-supported = <0>; +}; diff --git a/arch/arm64/boot/dts/qcom/davinci-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/davinci-pinctrl.dtsi new file mode 100755 index 0000000000000..4c1f9a30c62cf --- /dev/null +++ b/arch/arm64/boot/dts/qcom/davinci-pinctrl.dtsi @@ -0,0 +1,384 @@ +/*for xiaomi pinctrl*/ +&tlmm { + idt { + idt_int_active: idt_int_active { + /* active state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_int_suspend: idt_int_suspend { + /* sleep state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_enable_active: idt_enable_active { + /* active state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + idt_enable_suspend: idt_enable_suspend { + /* sleep state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + fp_mux { + fp_active: fp_active { + mux { + pins = "gpio118"; + function = "gpio"; + }; + config { + pins = "gpio118"; + drive-strength = <8>; + bias-disable; + }; + }; + + fp_suspend: fp_suspend { + mux { + pins = "gpio118"; + function = "gpio"; + }; + config { + pins = "gpio118"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + + /* GPIO_37 : FP_RESET_N */ + msm_gpio_37: msm_gpio_37 { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_37 : FP_RESET_N, state device active*/ + msm_gpio_37_output_high: msm_gpio_37_output_high { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_118 : FP_INT_N */ + msm_gpio_118: msm_gpio_118 { + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + smartpa_int_active: smartpa_int_active { + /* active state */ + mux { + /* GPIO 60 Interrupt */ + pins = "gpio60"; + function = "gpio"; + }; + + config { + pins = "gpio60"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + smartpa_int_suspend: smartpa_int_suspend { + /* sleep state */ + mux { + /* GPIO 60 Interrupt */ + pins = "gpio60"; + function = "gpio"; + }; + + config { + pins = "gpio60"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + smartpa_enable_active: smartpa_enable_active { + /* active state */ + mux { + /* GPIO 59 rst pin */ + pins = "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio59"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + smartpa_enable_suspend: smartpa_enable_suspend { + /* sleep state */ + mux { + /* GPIO 59 rst pin */ + pins = "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio59"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + }; + + cam_sensor_active_wide: cam_sensor_active_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio89", "gpio90", "gpio91"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio89", "gpio90", "gpio91"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_wide: cam_sensor_suspend_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio89", "gpio90", "gpio91"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio89", "gpio90", "gpio91"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_tele: cam_sensor_active_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio92", "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio92", "gpio93"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_tele: cam_sensor_suspend_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio92", "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio92", "gpio93"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_ultra: cam_sensor_active_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio29", "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29", "gpio34"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_ultra: cam_sensor_suspend_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio29", "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29", "gpio34"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_front: cam_sensor_active_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio94", "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio94", "gpio95"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_front: cam_sensor_suspend_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio94", "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio94", "gpio95"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_actuator_wide_en: cam_actuator_wide_en { + mux { + pins = "gpio83"; + function = "gpio"; + }; + + config { + pins = "gpio83"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_actuator_tele_en: cam_actuator_tele_en { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_viodd_en: cam_sensor_viodd_en { + mux { + pins = "gpio97"; + function = "gpio"; + }; + + config { + pins = "gpio97"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sde_dsi_active: sde_dsi_active { + mux { + pins = "gpio6", "gpio7", "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio7", "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable = <0>; /* no pull */ + }; + }; + sde_dsi_suspend: sde_dsi_suspend { + mux { + pins = "gpio6", "gpio7", "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio7", "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/davinci-sm8150-camera-sensor.dtsi b/arch/arm64/boot/dts/qcom/davinci-sm8150-camera-sensor.dtsi new file mode 100644 index 0000000000000..da9effbe2d5f1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/davinci-sm8150-camera-sensor.dtsi @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_iris: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash1>; + torch-source = <&pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + wide_actuator_regulator: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 83 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_wide_en>; + vin-supply = <&pm8150l_bob>; + }; + + tele_actuator_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 84 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_tele_en>; + vin-supply = <&pm8150l_bob>; + }; + + camera_viodd_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 97 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_sensor_viodd_en>; + vin-supply = <&pm8150_s4>; + }; +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&wide_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&tele_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vaf-supply = <&wide_actuator_regulator>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vaf", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 0>; + rgltr-max-voltage = <1800000 2800000 0>; + rgltr-load-current = <1000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vaf-supply = <&tele_actuator_regulator>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vaf", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 0>; + rgltr-max-voltage = <1800000 2800000 0>; + rgltr-load-current = <1000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK1"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 12 0>, + <&tlmm 95 0>, + <&tlmm 94 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET_F", + "CAM_VANAF_EN", + "CAM_VDIGF_EN"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_s5>; + cam_v_custom2-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1", "cam_v_custom2"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 1904000 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 2040000 3008000>; + rgltr-load-current = <1000 80000 1200000 0 10000 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>, + <&tlmm 28 0>, + <&tlmm 90 0>, + <&tlmm 89 0>, + <&tlmm 91 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-custom1 = <4>; + gpio-req-tbl-num = <0 1 2 3 4>; + gpio-req-tbl-flags = <1 0 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET_W", + "CAM_VANA0_EN", + "CAM_VDIG0_EN", + "CAM_VANA1_8_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 93 0>, + <&tlmm 92 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET_T", + "CAM_VANA1_EN", + "CAM_VDIG1_EN"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <0>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 12 0>, + <&tlmm 95 0>, + <&tlmm 94 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET_F", + "CAM_VANAF_EN", + "CAM_VDIGF_EN"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + status = "ok"; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 32 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + eeprom_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>, + <&tlmm 23 0>, + <&tlmm 34 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET_U", + "CAM_VANAU_EN", + "CAM_VDIGU_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_ultra>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>, + <&tlmm 23 0>, + <&tlmm 34 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-vdig = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET_U", + "CAM_VANAU_EN", + "CAM_VDIGU_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/davinci-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/davinci-sm8150-overlay.dts new file mode 100755 index 0000000000000..f7bd688dfadd2 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/davinci-sm8150-overlay.dts @@ -0,0 +1,28 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "davinci-sm8150.dtsi" +#include "davinci-audio-overlay.dtsi" + +/ { + model = "DAVINCI"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <38 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/davinci-sm8150.dtsi b/arch/arm64/boot/dts/qcom/davinci-sm8150.dtsi new file mode 100755 index 0000000000000..8e340f6ae9800 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/davinci-sm8150.dtsi @@ -0,0 +1,584 @@ +/* +this file is for attribution only of davinci +And public attribution of xiaomi platforms +*/ +#include "davinci-pinctrl.dtsi" +#include "xiaomi-sm8150-common.dtsi" + +#include "davinci-sm8150-camera-sensor.dtsi" + +&qupv3_se4_i2c { +#include "smb1355.dtsi" +}; + + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "fg-gen4-batterydata-alium-3600mah_F10.dtsi" + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-force-load-profile; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <2>; + qcom,usb-icl-ua = <2800000>; + qcom,fcc-max-ua = <3000000>; + qcom,fv-max-uv = <4400000>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-200)>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 1800000 1700000 1700000 1600000 1500000 1400000 1300000 + 950000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 3800000 + 3600000 3200000 2800000 2400000 2200000 2000000 1300000 + 750000 700000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2500000 2300000 2200000 2100000 + 1900000 1800000 1600000 1500000 1400000 1200000 1000000 + 950000 500000>; + qcom,thermal-fcc-pps-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 3800000 + 3600000 3200000 2800000 2400000 2200000 2000000 1300000 + 750000 750000>; + qcom,thermal-mitigation-dc + = <2200000 2000000 1800000 1600000 1400000 1200000 1100000 + 1000000 900000 800000 700000 600000 500000 400000 + 300000 200000>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,sw-jeita-enable; +}; + +&qupv3_se9_i2c { + status = "ok"; + tfa98xx@34 { + compatible = "nxp,tfa98xx"; + reset-gpio = <&tlmm 59 0>; + irq-gpio = <&tlmm 60 0>; + interrupt-parent = <&tlmm>; + interrupts = <60 0>; + interrupt-names = "smartpa_irq"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&smartpa_int_active &smartpa_enable_active>; + pinctrl-1 = <&smartpa_int_suspend &smartpa_enable_suspend>; + reg = <0x34>; + status = "ok"; + }; +}; + +&qupv3_se4_i2c { + status = "ok"; + fsa4480@42 { + status = "disabled"; + }; + +}; + +&smb1355 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1355_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "charger_temp"; + status = "ok"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x85 0x70 + 0x2d 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 99 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + fp_vdd_vreg: fp_vdd_vreg { + compatible = "regulator-fixed"; + regulator-name = "fp_vdd_vreg"; + startup-delay-us = <4000>; + enable-active-high; + gpio = <&tlmm 125 0>; + regulator-always-on; + }; + + fingerprint_fpc { + status = "ok"; + compatible = "fpc,fpc1020"; + interrupt-parent = <&tlmm>; + interrupts = <118 0x0>; + fpc,gpio_irq = <&tlmm 118 0x0>; + /* fpc,enable-on-boot; */ + /* fpc,enable-wakeup; */ + + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active"; + + pinctrl-0 = <&msm_gpio_37>; + pinctrl-1 = <&msm_gpio_37_output_high>; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 118 0x0>; + fp-gpio-pwr = <&tlmm 125 0>; + status = "ok"; + }; + + gpio_keys { + hall_key { + label = "hall_key"; + gpios = <&tlmm 120 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; + linux,code = <0>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; +}; + +&qupv3_se19_i2c { + status = "ok"; + novatek@62 { + compatible = "novatek,NVT-ts"; + reg = <0x62>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2001>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + avdd-supply = <&pm8150l_l1>; + novatek,vddio-reg-name = "avdd"; + novatek,irq-gpio = <&tlmm 122 0x2001>; + novatek,reset-gpio = <&tlmm 54 0x00>; + novatek,reset-tddi = <&tlmm 6 0x00>; + novatek,config-array-size = <1>; + novatek,dump-click-count; + novatek,cfg_0 { + novatek,tp-vendor = <0x46>; + novatek,hw-version = <0x1>; + novatek,fw-name = "novatek_nt36672_f10.fw"; + novatek,clicknum-file-name = "nvt+tianma"; + }; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + idtp9220: idtp9220@3b { + compatible = "idt,p9220"; + reg = <0x3b>; + idt,irq = <&tlmm 114 0x00>; + idt,enable = <&tlmm 115 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <114 0>; + interrupt-names = "idt_irq"; + pinctrl-names = "idt_active", "idt_suspend"; + pinctrl-0 = <&idt_int_active &idt_enable_active>; + pinctrl-1 = <&idt_int_suspend &idt_enable_suspend>; + }; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "camera_flash_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "skin_msm_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2545>; + qcom,play-rate-us = <4878>; + qcom,lra-resonance-sig-shape = "sine"; + qcom,lra-auto-resonance-mode = "qwd"; + qcom,lra-allow-variable-play-rate; +}; + +&pm8150l_lpg { + qcom,lut-patterns = <0 10 20 30 40 50 60 70 80 90 100 + 90 80 70 60 50 40 30 20 10 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&pm8150l_wled { + qcom,string-cfg= <15>;// if use 2 string, the number is 3 + qcom,leds-per-string = <5>; + status = "ok"; +}; + diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi new file mode 100644 index 0000000000000..c7c0423deb4da --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi @@ -0,0 +1,261 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_j20s_36_02_0a_video: qcom,mdss_dsi_j20s_36_02_0a_dsc_video { + qcom,mdss-dsi-panel-name = "xiaomi 36 02 0a video mode dsc dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 36 02 0a VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,ulps-enabled; + qcom,mdss-dsi-reset-sequence = <1 5>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <70>; + qcom,mdss-pan-physical-height-dimension = <154>; + qcom,mdss-dsi-tx-eot-append; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,disp-panel-offon-mode-enabled; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + /* qcom,mdss-dsi-qsync-min-refresh-rate = <60>; */ + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 90 60 50 48 30>; + + qcom,dispparam-enabled; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2400>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-front-porch = <67>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-v-back-porch = <30>; + qcom,mdss-dsi-v-front-porch = <33>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* DDIC Initical Code */ + 15 00 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 4D 02 + 15 00 00 00 00 00 02 4E 30 + 15 00 00 00 00 00 02 4F 30 + 15 00 00 00 00 00 02 53 30 + 15 00 00 00 00 00 02 7A 01 + 15 00 00 00 00 00 02 7B 8C + 15 00 00 00 00 00 02 7D 05 + 15 00 00 00 00 00 02 80 05 + 15 00 00 00 00 00 02 81 05 + 15 00 00 00 00 00 02 A0 0C + 15 00 00 00 00 00 02 A2 0C + 15 00 00 00 00 00 02 A3 01 + 15 00 00 00 00 00 02 A4 05 + 15 00 00 00 00 00 02 A5 05 + 15 00 00 00 00 00 02 C4 80 + 15 00 00 00 00 00 02 C6 C0 + 15 01 00 00 00 00 02 E9 02 + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 DA 00 + 15 00 00 00 00 00 02 E0 00 + 15 01 00 00 00 00 02 F1 04 + 15 00 00 00 00 00 02 FF 2B + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B7 08 + 15 00 00 00 00 00 02 B8 1A + 15 01 00 00 00 00 02 C0 04 + 15 00 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1C 01 + 15 01 00 00 00 00 02 33 01 + /* CABC Setting */ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 95 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 0B + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 00 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 00 00 00 00 00 02 54 66 + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 01 00 00 00 00 02 67 B2 + /* ESD Setting */ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 40 20 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C0 03 + 39 00 00 00 00 00 03 51 0D B5 + 15 01 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 29 00 + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3F 01 + 15 00 00 00 00 00 02 43 08 + 15 00 00 00 00 00 02 40 25 + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-post-off-command = [ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 3F 00 + 15 00 00 00 00 00 02 FF 10 + 05 00 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-post-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + + + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0E A0]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 FF FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0D B5]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-version = <0x11>; + qcom,mdss-dsc-scr-version = <0x0>; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <2>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi new file mode 100644 index 0000000000000..b7fc26a3ce382 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi @@ -0,0 +1,245 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_j20s_42_02_0b_video: qcom,mdss_dsi_j20s_42_02_0b_dsc_video { + qcom,mdss-dsi-panel-name = "xiaomi 42 02 0b video mode dsc dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 42 02 0b VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,ulps-enabled; + qcom,mdss-dsi-reset-sequence = <1 5>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <70>; + qcom,mdss-pan-physical-height-dimension = <154>; + qcom,mdss-dsi-tx-eot-append; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,disp-panel-offon-mode-enabled; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + /* qcom,mdss-dsi-qsync-min-refresh-rate = <60>; */ + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 90 60 50 48 30>; + + qcom,dispparam-enabled; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2400>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-front-porch = <67>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-v-back-porch = <30>; + qcom,mdss-dsi-v-front-porch = <33>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* DDIC Initical Code */ + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 EE 60 + 15 01 00 00 00 00 02 EF 06 + /* CABC Setting */ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 95 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 0B + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 00 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 00 00 00 00 00 02 54 66 + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 01 00 00 00 00 02 67 B2 + + /*decrease MUX EQ for desense*/ + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1F C0 + 15 00 00 00 00 00 02 20 C0 + + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 D6 80 + 15 00 00 00 00 00 02 D7 02 + 15 00 00 00 00 00 02 DD 02 + + /* ESD Setting */ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 40 20 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C0 03 + 39 00 00 00 00 00 03 51 0D B5 + 15 01 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 29 00 + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3F 01 + 15 00 00 00 00 00 02 43 08 + 15 00 00 00 00 00 02 40 25 + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-post-off-command = [ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 3F 00 + 15 00 00 00 00 00 02 FF 10 + 05 00 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-post-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + + + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0E A0]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 FF FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0D B5]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-version = <0x11>; + qcom,mdss-dsc-scr-version = <0x0>; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <2>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-samsung-fhd-ea8076-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-samsung-fhd-ea8076-cmd.dtsi new file mode 100644 index 0000000000000..57b8a4bf6c901 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-samsung-fhd-ea8076-cmd.dtsi @@ -0,0 +1,252 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,disp-doze-backlight-threshold = <8>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 27 0x2002>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + /* delay 2ms for VCI1 power */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 00 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 01 00 03 FC A5 A5 + /* Sleep Out */ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + /* TE OUT(Vsync On) */ + 39 00 00 00 00 00 02 35 00 + /* DBV Smooth Transition */ + 39 00 00 00 00 00 03 B7 01 4B + /* Timing set */ + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 03 D9 88 2E + /* Edge Dimming */ + 39 00 00 00 00 00 02 B0 09 + 39 00 00 00 00 00 02 D8 00 + 39 01 00 00 00 00 03 F0 A5 A5 + /* Page Address Set */ + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + /* ERR_FG Setting */ + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + /* OFC Setting 82.6Mhz*/ + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B8 BB 2A 00 1A B8 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + /* Brightness Control */ + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + /* Display On */ + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + /* AOD ON Sequence (Normal To AOD HBM) */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 00 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + /* AOD ON Sequence (Normal To AOD LBM) */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 00 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + /* AOD OFF Sequence (AOD To Normal) */ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 39 01 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 C9 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 01 00 02 53 E0 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 43 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-cmd.dtsi new file mode 100644 index 0000000000000..2635b3183a062 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-cmd.dtsi @@ -0,0 +1,262 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_fhd_ea8076_cmd: qcom,mdss_dsi_ss_fhd_ea8076_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,mdss-dsi-panel-fod-dimlayer-enabled; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,mdss-dsi-panel-dc-threshold = <610>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + /* trig-flags: falling-0x0002 rasing-0x0001 */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-hbm-on-command = [ + 39 01 00 00 00 00 02 53 22 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-lbm-on-command = [ + 39 01 00 00 00 00 02 53 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-lbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 39 01 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 00 00 00 00 00 03 B7 01 43 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 01 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A /* esd */ + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 //osc + 39 00 00 00 00 00 02 D1 0F + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B9 A1 4A 00 1A B8 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 10 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 D2 0A 05 1A E6 00 04 07 F5 0C DC DB E8 0F DD EE E9 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi new file mode 100644 index 0000000000000..d5f6750b638e3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi @@ -0,0 +1,262 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_fhd_ea8076_global_cmd: qcom,mdss_dsi_ss_fhd_ea8076_global_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,mdss-dsi-panel-fod-dimlayer-enabled; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,mdss-dsi-panel-dc-threshold = <610>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + /* trig-flags: falling-0x0002 rasing-0x0001 */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-hbm-on-command = [ + 39 01 00 00 00 00 02 53 22 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-lbm-on-command = [ + 39 01 00 00 00 00 02 53 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-doze-lbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 39 01 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 49 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 03 + 39 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 00 00 00 00 00 03 B7 01 43 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 01 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <27>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1103000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A /* esd */ + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 //osc + 39 00 00 00 00 00 02 D1 11 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B9 A1 4A 00 1A B8 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 10 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 D2 0A 05 1A E6 00 04 07 F5 0C DC DB E8 0F DD EE E9 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi new file mode 100644 index 0000000000000..2ba61cd9cabd6 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi @@ -0,0 +1,162 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_notch_fhd_ea8074_cmd: qcom,mdss_dsi_ss_notch_fhd_ea8074_cmd { + qcom,mdss-dsi-panel-name = "ss notch fhd cmd dsi panel"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-model = "SS NOTCH FHD EA8074 CMD PANEL"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <1 1>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <142>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + //qcom,esd-err-irq-gpio = <&tlmm 52 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2248>; + qcom,mdss-dsi-h-front-porch = <56>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <18>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <24>; + qcom,mdss-dsi-v-front-porch = <26>; + qcom,mdss-dsi-v-pulse-width = <12>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0a 00 02 11 00 + 39 00 00 00 00 00 05 2B 00 00 08 c7 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 05 + 39 00 00 00 00 00 02 B1 10 + 39 00 00 00 00 00 02 B0 02 + 39 00 00 00 00 00 05 D5 02 17 54 14 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 51 00 00 + 39 00 00 00 00 00 02 53 20 + 39 01 00 00 6E 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 ef b0 + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 00 00 00 + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 ef b0 + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 00 00 00 + 39 01 00 00 01 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 51 00 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 86 80 01 + 39 00 00 00 00 00 02 53 28 + 39 01 00 00 00 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 e8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 10 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 00 + 39 00 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 02 53 e0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-tianma-fhd-nt36672a-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-tianma-fhd-nt36672a-video.dtsi new file mode 100755 index 0000000000000..cdb0e56fd6954 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/dsi-panel-tianma-fhd-nt36672a-video.dtsi @@ -0,0 +1,386 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_tianma_fhd_nt36672a_video: qcom,mdss_dsi_tianma_fhd_nt36672a_video { + qcom,mdss-dsi-panel-name = "tianma fhd vide dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "TIANMA FHD NT36672A VIDE PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + +// + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <0 10>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <136>; + qcom,cont-splash-enabled; + qcom,mdss-dsi-tx-eot-append; + qcom,esd-err-irq-gpio = <&tlmm 5 0x2001>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <40>; + qcom,mdss-dsi-h-back-porch = <44>;//debug + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <8>; + qcom,mdss-dsi-v-front-porch = <15>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* skin enhancement mode */ + 15 01 00 00 00 00 02 FF 22 + 15 00 00 00 00 00 02 00 40 + 15 00 00 00 00 00 02 01 C0 + 15 00 00 00 00 00 02 02 40 + 15 00 00 00 00 00 02 03 40 + 15 00 00 00 00 00 02 04 40 + 15 00 00 00 00 00 02 05 40 + 15 00 00 00 00 00 02 06 40 + 15 00 00 00 00 00 02 07 40 + 15 00 00 00 00 00 02 08 40 + 15 00 00 00 00 00 02 09 40 + 15 00 00 00 00 00 02 0A 40 + 15 00 00 00 00 00 02 0B 40 + 15 00 00 00 00 00 02 0C 40 + 15 00 00 00 00 00 02 0D 40 + 15 00 00 00 00 00 02 0E 40 + 15 00 00 00 00 00 02 0F 40 + 15 00 00 00 00 00 02 10 40 + 15 00 00 00 00 00 02 11 50 + 15 00 00 00 00 00 02 12 60 + 15 00 00 00 00 00 02 13 70 + 15 00 00 00 00 00 02 14 58 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 78 + 15 01 00 00 00 00 02 17 77 + 15 00 00 00 00 00 02 18 39 + 15 00 00 00 00 00 02 19 2D + 15 00 00 00 00 00 02 1A 2E + 15 00 00 00 00 00 02 1B 32 + 15 00 00 00 00 00 02 1C 37 + 15 00 00 00 00 00 02 1D 3A + 15 00 00 00 00 00 02 1E 40 + 15 00 00 00 00 00 02 1F 40 + 15 00 00 00 00 00 02 20 40 + 15 00 00 00 00 00 02 21 40 + 15 00 00 00 00 00 02 22 40 + 15 00 00 00 00 00 02 23 40 + 15 00 00 00 00 00 02 24 40 + 15 00 00 00 00 00 02 25 40 + 15 00 00 00 00 00 02 26 40 + 15 00 00 00 00 00 02 27 40 + 15 00 00 00 00 00 02 28 40 + 15 00 00 00 00 00 02 2D 00 + 15 00 00 00 00 00 02 2F 40 + 15 00 00 00 00 00 02 30 40 + 15 00 00 00 00 00 02 31 40 + 15 00 00 00 00 00 02 32 40 + 15 00 00 00 00 00 02 33 40 + 15 00 00 00 00 00 02 34 40 + 15 01 00 00 00 00 02 35 40 + 15 00 00 00 00 00 02 36 40 + 15 00 00 00 00 00 02 37 40 + 15 00 00 00 00 00 02 38 40 + 15 00 00 00 00 00 02 39 40 + 15 00 00 00 00 00 02 3A 40 + 15 00 00 00 00 00 02 3B 40 + 15 00 00 00 00 00 02 3D 40 + 15 00 00 00 00 00 02 3F 40 + 15 00 00 00 00 00 02 40 40 + 15 00 00 00 00 00 02 41 40 + 15 00 00 00 00 00 02 42 40 + 15 00 00 00 00 00 02 43 40 + 15 00 00 00 00 00 02 44 40 + 15 00 00 00 00 00 02 45 40 + 15 00 00 00 00 00 02 46 40 + 15 00 00 00 00 00 02 47 40 + 15 00 00 00 00 00 02 48 40 + 15 00 00 00 00 00 02 49 40 + 15 00 00 00 00 00 02 4A 40 + 15 00 00 00 00 00 02 4B 40 + 15 00 00 00 00 00 02 4C 40 + 15 00 00 00 00 00 02 4D 40 + 15 00 00 00 00 00 02 4E 40 + 15 00 00 00 00 00 02 4F 40 + 15 01 00 00 00 00 02 50 40 + 15 00 00 00 00 00 02 51 40 + 15 00 00 00 00 00 02 52 40 + 15 00 00 00 00 00 02 53 01 + 15 00 00 00 00 00 02 54 01 + 15 00 00 00 00 00 02 55 FE + 15 00 00 00 00 00 02 56 77 + 15 00 00 00 00 00 02 58 CD + 15 00 00 00 00 00 02 59 D0 + 15 00 00 00 00 00 02 5A D0 + 15 00 00 00 00 00 02 5B 50 + 15 00 00 00 00 00 02 5C 50 + 15 00 00 00 00 00 02 5D 50 + 15 00 00 00 00 00 02 5E 50 + 15 00 00 00 00 00 02 5F 50 + 15 00 00 00 00 00 02 60 50 + 15 00 00 00 00 00 02 61 50 + 15 00 00 00 00 00 02 62 50 + 15 00 00 00 00 00 02 63 50 + 15 00 00 00 00 00 02 64 50 + 15 00 00 00 00 00 02 65 50 + 15 00 00 00 00 00 02 66 50 + 15 00 00 00 00 00 02 67 50 + 15 00 00 00 00 00 02 68 50 + 15 00 00 00 00 00 02 69 50 + 15 01 00 00 00 00 02 6A 50 + 15 00 00 00 00 00 02 6B 50 + 15 00 00 00 00 00 02 6C 50 + 15 00 00 00 00 00 02 6D 50 + 15 00 00 00 00 00 02 6E 50 + 15 00 00 00 00 00 02 6F 50 + 15 00 00 00 00 00 02 70 07 + 15 00 00 00 00 00 02 71 00 + 15 00 00 00 00 00 02 72 00 + 15 00 00 00 00 00 02 73 00 + 15 00 00 00 00 00 02 74 06 + 15 00 00 00 00 00 02 75 0C + 15 00 00 00 00 00 02 76 03 + 15 00 00 00 00 00 02 77 09 + 15 00 00 00 00 00 02 78 0F + 15 00 00 00 00 00 02 79 68 + 15 00 00 00 00 00 02 7A 88 + 15 00 00 00 00 00 02 7C 80 + 15 00 00 00 00 00 02 7D 80 + 15 00 00 00 00 00 02 7E 80 + 15 00 00 00 00 00 02 7F 00 + 15 00 00 00 00 00 02 80 00 + 15 00 00 00 00 00 02 81 00 + 15 00 00 00 00 00 02 83 01 + 15 00 00 00 00 00 02 84 00 + 15 01 00 00 00 00 02 85 80 + 15 00 00 00 00 00 02 86 80 + 15 00 00 00 00 00 02 87 80 + 15 00 00 00 00 00 02 88 40 + 15 00 00 00 00 00 02 89 91 + 15 00 00 00 00 00 02 8A 98 + 15 00 00 00 00 00 02 8B 80 + 15 00 00 00 00 00 02 8C 80 + 15 00 00 00 00 00 02 8D 80 + 15 00 00 00 00 00 02 8E 80 + 15 00 00 00 00 00 02 8F 80 + 15 00 00 00 00 00 02 90 80 + 15 00 00 00 00 00 02 91 80 + 15 00 00 00 00 00 02 92 80 + 15 00 00 00 00 00 02 93 80 + 15 00 00 00 00 00 02 94 80 + 15 00 00 00 00 00 02 95 80 + 15 00 00 00 00 00 02 96 80 + 15 00 00 00 00 00 02 97 80 + 15 00 00 00 00 00 02 98 80 + 15 00 00 00 00 00 02 99 80 + 15 00 00 00 00 00 02 9A 80 + 15 00 00 00 00 00 02 9B 80 + 15 00 00 00 00 00 02 9C 80 + 15 00 00 00 00 00 02 9D 80 + 15 01 00 00 00 00 02 9E 80 + 15 00 00 00 00 00 02 9F 80 + 15 00 00 00 00 00 02 A0 8A + 15 00 00 00 00 00 02 A2 80 + 15 00 00 00 00 00 02 A6 80 + 15 00 00 00 00 00 02 A7 80 + 15 00 00 00 00 00 02 A9 80 + 15 00 00 00 00 00 02 AA 80 + 15 00 00 00 00 00 02 AB 80 + 15 00 00 00 00 00 02 AC 80 + 15 00 00 00 00 00 02 AD 80 + 15 00 00 00 00 00 02 AE 80 + 15 00 00 00 00 00 02 AF 80 + 15 00 00 00 00 00 02 B7 76 + 15 00 00 00 00 00 02 B8 76 + 15 00 00 00 00 00 02 B9 05 + 15 00 00 00 00 00 02 BA 0D + 15 00 00 00 00 00 02 BB 14 + 15 00 00 00 00 00 02 BC 0F + 15 00 00 00 00 00 02 BD 18 + 15 00 00 00 00 00 02 BE 1F + 15 00 00 00 00 00 02 BF 05 + 15 00 00 00 00 00 02 C0 0D + 15 00 00 00 00 00 02 C1 14 + 15 00 00 00 00 00 02 C2 03 + 15 01 00 00 00 00 02 C3 07 + 15 00 00 00 00 00 02 C4 0A + 15 00 00 00 00 00 02 C5 A0 + 15 00 00 00 00 00 02 C6 55 + 15 00 00 00 00 00 02 C7 FF + 15 00 00 00 00 00 02 C8 39 + 15 00 00 00 00 00 02 C9 44 + 15 00 00 00 00 00 02 CA 12 + 15 00 00 00 00 00 02 CD 80 + 15 00 00 00 00 00 02 DB 80 + 15 00 00 00 00 00 02 DC 80 + 15 00 00 00 00 00 02 DD 80 + 15 00 00 00 00 00 02 E0 80 + 15 00 00 00 00 00 02 E1 80 + 15 00 00 00 00 00 02 E2 80 + 15 00 00 00 00 00 02 E3 80 + 15 00 00 00 00 00 02 E4 80 + 15 00 00 00 00 00 02 E5 40 + 15 00 00 00 00 00 02 E6 40 + 15 00 00 00 00 00 02 E7 40 + 15 00 00 00 00 00 02 E8 40 + 15 00 00 00 00 00 02 E9 40 + 15 00 00 00 00 00 02 EA 40 + 15 00 00 00 00 00 02 EB 40 + 15 00 00 00 00 00 02 EC 40 + 15 00 00 00 00 00 02 ED 40 + 15 00 00 00 00 00 02 EE 40 + 15 00 00 00 00 00 02 EF 40 + 15 00 00 00 00 00 02 F0 40 + 15 00 00 00 00 00 02 F1 40 + 15 00 00 00 00 00 02 F2 40 + 15 00 00 00 00 00 02 F3 40 + 15 00 00 00 00 00 02 F4 40 + 15 00 00 00 00 00 02 F5 40 + 15 00 00 00 00 00 02 F6 40 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + /* dimming enable */ + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + /* resolution 1080*2246 */ + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 7B + 15 00 00 00 00 00 02 15 6F + 15 00 00 00 00 00 02 16 0B + /* UI mode */ + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FF + 15 00 00 00 00 00 02 32 FF + 15 00 00 00 00 00 02 33 FF + 15 00 00 00 00 00 02 34 FF + 15 00 00 00 00 00 02 35 FF + 15 00 00 00 00 00 02 36 FF + 15 00 00 00 00 00 02 37 FF + 15 00 00 00 00 00 02 38 FC + 15 01 00 00 00 00 02 39 F8 + 15 00 00 00 00 00 02 3A F4 + 15 00 00 00 00 00 02 3B F1 + 15 00 00 00 00 00 02 3D EE + 15 00 00 00 00 00 02 3F EB + 15 00 00 00 00 00 02 40 E8 + 15 00 00 00 00 00 02 41 E5 + /* STILL mode */ + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 FF + 15 00 00 00 00 00 02 47 FF + 15 00 00 00 00 00 02 48 FF + 15 00 00 00 00 00 02 49 FF + 15 00 00 00 00 00 02 4A FF + 15 00 00 00 00 00 02 4B FF + 15 00 00 00 00 00 02 4C FF + 15 00 00 00 00 00 02 4D ED + 15 00 00 00 00 00 02 4E D5 + 15 00 00 00 00 00 02 4F BF + 15 00 00 00 00 00 02 50 A6 + 15 01 00 00 00 00 02 51 96 + 15 00 00 00 00 00 02 52 86 + 15 00 00 00 00 00 02 53 76 + 15 00 00 00 00 00 02 54 66 + /* MOVING mode */ + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FF + 15 00 00 00 00 00 02 5A FF + 15 00 00 00 00 00 02 5B FF + 15 00 00 00 00 00 02 5C FF + 15 00 00 00 00 00 02 5D FF + 15 00 00 00 00 00 02 5E FF + 15 00 00 00 00 00 02 5F FF + 15 00 00 00 00 00 02 60 F6 + 15 00 00 00 00 00 02 61 EA + 15 00 00 00 00 00 02 62 E1 + 15 00 00 00 00 00 02 63 D8 + 15 00 00 00 00 00 02 64 CE + 15 00 00 00 00 00 02 65 C3 + 15 00 00 00 00 00 02 66 BA + 15 01 00 00 00 00 02 67 B3 + 15 01 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 05 04 + 15 01 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1C AF + 15 01 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 51 FF + 15 00 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 55 00 + 05 01 00 00 00 00 02 29 00 + 05 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C3 01 + 15 00 00 00 00 00 02 C4 55 + 15 00 00 00 00 00 02 C5 55 + 15 01 00 00 00 00 02 FF 10 + ]; + + qcom,mdss-dsi-off-command = [ + 15 01 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C3 00 + 15 01 00 00 00 00 02 FF 10 + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 3C 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah.dtsi b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah.dtsi index 64977c7c9653e..cf398ae46599a 100644 --- a/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah.dtsi +++ b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah.dtsi @@ -11,33 +11,39 @@ * GNU General Public License for more details. */ + qcom,alium_860_89032_0000_3600mah_averaged_masterslave_sep24th2018 { /* #Alium_860_89032_0000_3600mAh_averaged_MasterSlave_Sept24th2018*/ - qcom,max-voltage-uv = <4350000>; - qcom,fastchg-current-ma = <5400>; - qcom,jeita-fcc-ranges = <0 100 2500000 - 101 400 3600000 - 401 450 2500000>; - qcom,jeita-fv-ranges = <0 100 4250000 - 101 400 4350000 - 401 450 4250000>; - qcom,step-chg-ranges = <3600000 3800000 5400000 - 3800001 4300000 3600000 - 4300001 4350000 2500000>; + qcom,max-voltage-uv = <4400000>; + qcom,fastchg-current-ma = <4800>; + qcom,jeita-fcc-ranges = <0 50 300000 + 51 100 1600000 + 101 150 3200000 + 151 450 4800000 + 451 580 1600000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3600000 4200000 3000000 + 4201000 4300000 3000000 + 4301000 4340000 2500000>; + qcom,nom-batt-capacity-mah = <3300>; + qcom,batt-id-kohm = <300>; /* COLD = 0 DegC, HOT = 45 DegC */ - qcom,jeita-hard-thresholds = <0x58cd 0x20b8>; + /* qcom,jeita-hard-thresholds = <0x58cd 0x20b8>; */ /* COOL = 10 DegC, WARM = 40 DegC */ - qcom,jeita-soft-thresholds = <0x4ccc 0x25e3>; + /* qcom,jeita-soft-thresholds = <0x4ccc 0x25e3>; */ /* COLD hys = 13 DegC, WARM hys = 37 DegC */ - qcom,jeita-soft-hys-thresholds = <0x48d4 0x2943>; + /*qcom,jeita-soft-hys-thresholds = <0x48d4 0x2943>; qcom,jeita-soft-fcc-ua = <2500000 2500000>; - qcom,jeita-soft-fv-uv = <4250000 4250000>; + qcom,jeita-soft-fv-uv = <4250000 4250000>;*/ qcom,ocv-based-step-chg; - qcom,batt-id-kohm = <107>; qcom,battery-beta = <4250>; qcom,therm-room-temp = <100000>; - qcom,fg-cc-cv-threshold-mv = <4340>; - qcom,battery-type = "alium_860_89032_0000_3600mah_sept24th2018"; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,battery-type = "itech_3000mah"; qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; qcom,therm-center-offset = <0x70>; qcom,therm-pull-up = <100>; diff --git a/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah_E5G.dtsi b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah_E5G.dtsi new file mode 100644 index 0000000000000..34a94a15da43c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-alium-3600mah_E5G.dtsi @@ -0,0 +1,157 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +qcom,alium_860_89032_0000_3600mah_averaged_masterslave_sep24th2018 { + /* #Alium_860_89032_0000_3600mAh_averaged_MasterSlave_Sept24th2018*/ + qcom,max-voltage-uv = <4450000>; + qcom,fastchg-current-ma = <3700>; + qcom,jeita-fcc-ranges = <0 50 370000 + 51 100 1110000 + 101 150 1850000 + 151 450 3700000 + 451 580 1850000>; + qcom,jeita-fv-ranges = <0 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4450000 + 451 580 4100000>; + qcom,nom-batt-capacity-mah = <3800>; + qcom,batt-id-kohm = <100>; + /* COLD = 0 DegC, HOT = 45 DegC */ + /* qcom,jeita-hard-thresholds = <0x58cd 0x20b8>; */ + /* COOL = 10 DegC, WARM = 40 DegC */ + /* qcom,jeita-soft-thresholds = <0x4ccc 0x25e3>; */ + /* COLD hys = 13 DegC, WARM hys = 37 DegC */ + /*qcom,jeita-soft-hys-thresholds = <0x48d4 0x2943>; + qcom,jeita-soft-fcc-ua = <2500000 2500000>; + qcom,jeita-soft-fv-uv = <4250000 4250000>;*/ + qcom,ocv-based-step-chg; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,battery-type = "itech_3700mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>; + qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>; + qcom,checksum = <0x1538>; + qcom,gui-version = "PM855GUI - 1.0.0.10"; + qcom,fg-profile-data = [ + 09 00 C7 EA + C4 DC 8E E2 + 3A DD 00 00 + 15 BC A5 8A + 02 80 D1 92 + AB 9D 47 80 + 10 00 DF 02 + 77 1A 85 EC + E1 FD CE 07 + 32 00 75 EB + AA ED F3 CD + 0C 0A 7A E4 + ED C5 40 1B + D0 02 1F CA + FF 00 52 00 + 4D 00 4A 00 + 3C 00 35 00 + 38 00 39 00 + 48 00 43 00 + 3F 00 FF 00 + 38 00 40 00 + 46 00 50 00 + 45 00 5C 00 + 7E 64 60 00 + 50 08 50 10 + FF 00 6A 00 + 5F 00 63 00 + 6E 00 60 00 + 7D 20 96 40 + 75 50 6B 13 + 63 00 D8 00 + 14 22 7E 0D + 21 02 AA 04 + ED 1C D4 09 + 64 0C D3 23 + A4 18 D3 42 + B5 55 91 02 + 90 12 2A 1F + 02 06 1F 0A + A3 06 AE 1C + 8D 02 96 04 + D2 03 D1 17 + 51 23 3F 45 + 28 53 69 14 + 93 20 8E EC + 18 CB C8 C5 + DB 1C 7B C9 + 7C 05 E6 C2 + B9 17 2C 93 + 87 85 A2 92 + 91 A8 09 80 + 92 F2 1A 0D + F4 FC 5E EB + 00 F8 FB ED + 15 E2 F6 0F + 75 02 72 05 + 49 01 10 00 + FA E5 E2 03 + 8D 05 85 02 + CE 07 32 00 + 23 03 46 02 + 9C 04 03 02 + 48 07 0A 00 + BA 03 97 02 + 65 05 50 00 + 3A 00 41 00 + 43 64 45 00 + 45 10 45 18 + 46 08 44 00 + 47 00 3A 08 + 4B 08 37 00 + 47 20 4E 40 + 54 58 60 10 + 57 00 5F 00 + 57 08 55 00 + 4B 00 50 00 + 3E 08 52 08 + 52 00 5C 20 + 6F 40 7D 58 + 67 10 63 00 + 69 08 4F 10 + D8 00 8C 2A + DB 04 28 02 + AD 04 0B 1D + 50 22 A7 45 + 0D 52 A2 18 + 74 03 AD 04 + 35 02 AE 13 + 3F 0A 5A 20 + DD 04 F1 02 + D8 05 C7 1C + DD 02 3D 04 + EB 03 97 18 + 52 03 D5 04 + 19 02 72 00 + 14 22 7E 05 + 21 02 AA 04 + ED 1C D4 01 + 64 04 D3 03 + A4 18 D3 02 + B5 05 91 02 + 90 00 7C 01 + C0 00 FA 00 + 04 0E 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi new file mode 100644 index 0000000000000..732853672c91a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi @@ -0,0 +1,153 @@ +qcom,xiaomi_j20s_nvt_5160mah_averaged_masterslave_aug26th2019 { + qcom,profile-revision = <24>; + /* #4174016_Xiaomi_J20S_5160mAh_averaged_MasterSlave_Aug26th2019*/ + qcom,max-voltage-uv = <4475000>; + qcom,fastchg-current-ma = <5900>; + qcom,jeita-fcc-ranges = <(-100) 0 500000 + 1 50 1000000 + 51 100 2500000 + 101 150 4000000 + 151 450 5900000 + 451 580 2500000>; + qcom,jeita-fv-ranges = <(-100) 0 4450000 + 1 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4475000 + 451 600 4100000>; + qcom,step-chg-ranges = <3001000 4150000 5900000 + 4150001 4230000 5900000 + 4230001 4350000 5400000 + 4350001 4400000 5400000 + 4400001 4430000 5400000 + 4430001 4475000 4000000>; + qcom,taper-fcc; + qcom,jeita-too-hot = <590>; + qcom,jeita-too-cold = <(-100)>; + qcom,jeita-warm-th= <450>; + qcom,jeita-cool-th= <150>; + qcom,use-bq-pump; + mi,six-pin-battery; + qcom,ffc-low-temp-term-current-ma = <(-723)>; + qcom,ffc-high-temp-term-current-ma = <(-774)>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,fg-ffc-cc-cv-threshold-mv = <4490>; + qcom,nom-batt-capacity-mah = <5160>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "J20S_nvt_5160mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x3c 0x05 0x2a 0x0b>; + qcom,rslow-low-coeffs = <0xe7 0x00 0x6a 0x12>; + qcom,checksum = <0x65B6>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 6B E2 + D8 DD C7 DB + FD DD 00 00 + FD B4 92 83 + FA 87 9C 80 + 06 8D 19 80 + 20 00 3C 05 + 2A 0B BF 04 + 44 02 CE 07 + 32 00 6C EA + 29 E4 A4 DB + C8 03 54 DD + 9F 86 4B 23 + 4D 0A 88 D5 + 60 00 41 00 + 45 00 3D 00 + 2E 00 30 00 + 39 00 43 00 + 40 00 44 00 + 3D 00 60 00 + 39 00 36 00 + 47 00 40 00 + 3A 00 79 00 + 52 64 45 00 + 46 00 47 10 + 60 00 47 00 + 4C 08 71 10 + 5C 10 53 00 + 99 28 6A 48 + 5B 60 53 0C + 4E 00 D8 08 + 7D 20 0B 14 + 03 0A AD FC + 36 1C 0D 02 + F5 0C 66 23 + FA 17 3F 42 + 28 5D 83 02 + 66 11 41 22 + 2B 0D 96 12 + D2 05 F0 1C + 6B 03 B5 04 + 05 02 B4 17 + CD 23 83 44 + 2F 5A 8A 11 + 0C 21 DE E5 + 15 C2 8D AC + E2 1C A2 C1 + 2C 05 92 B3 + 63 17 DF 83 + 8C 84 1A A2 + 87 A0 09 80 + 3C 02 5B 04 + 1C 05 54 FB + 00 00 5C BD + FC E2 FC 07 + 1D E2 D3 C5 + 10 18 19 00 + A7 E6 33 03 + 9A 05 1F 03 + CE 07 32 00 + 96 01 BE 05 + 0F 05 27 03 + 67 04 6E 03 + AE 02 2B 03 + 38 05 55 00 + 3A 00 42 00 + 44 64 46 00 + 4C 00 42 08 + 43 00 46 00 + 47 08 3B 10 + 43 10 3E 00 + 52 28 54 50 + 5A 68 64 0A + 47 00 4C 00 + 56 10 55 00 + 46 00 4B 00 + 45 10 59 10 + 52 00 62 20 + 77 40 4C 58 + 59 0E 5B 00 + 50 08 2E 10 + D8 08 83 20 + B0 04 4E 0B + 6B 0D 9F 1C + 02 22 0F 45 + 34 53 23 18 + D1 02 D7 05 + 4D 02 66 11 + 3F 0A D1 20 + 08 04 02 02 + 9E 04 C4 1C + 33 03 C8 05 + 7B 02 86 18 + B6 03 18 04 + DB 02 6C 00 + 04 22 59 05 + 7E 02 DD 05 + F3 1C 02 02 + F2 05 61 02 + 98 18 34 03 + 17 05 A4 03 + 85 00 C2 00 + C0 00 FA 00 + 64 14 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi new file mode 100644 index 0000000000000..165a4be41364c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi @@ -0,0 +1,153 @@ +qcom,xiaomi_j20s_sunwoda_5160mah_averaged_masterslave_aug26th2019 { + qcom,profile-revision = <24>; + /* #4174016_Xiaomi_J20S_5160mAh_averaged_MasterSlave_Aug26th2019*/ + qcom,max-voltage-uv = <4475000>; + qcom,fastchg-current-ma = <5900>; + qcom,jeita-fcc-ranges = <(-100) 0 500000 + 1 50 1000000 + 51 100 2500000 + 101 150 4000000 + 151 450 5900000 + 451 580 2500000>; + qcom,jeita-fv-ranges = <(-100) 0 4450000 + 1 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4475000 + 451 600 4100000>; + qcom,step-chg-ranges = <3001000 4150000 5900000 + 4150001 4230000 5900000 + 4230001 4350000 5400000 + 4350001 4400000 5400000 + 4400001 4430000 5400000 + 4430001 4475000 4000000>; + qcom,taper-fcc; + qcom,jeita-too-hot = <590>; + qcom,jeita-too-cold = <(-100)>; + qcom,jeita-warm-th= <450>; + qcom,jeita-cool-th= <150>; + qcom,use-bq-pump; + mi,six-pin-battery; + qcom,ffc-low-temp-term-current-ma = <(-723)>; + qcom,ffc-high-temp-term-current-ma = <(-774)>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,fg-ffc-cc-cv-threshold-mv = <4490>; + qcom,nom-batt-capacity-mah = <5160>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "J20S_sunwoda_5160mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x71 0x04 0x9c 0x12>; + qcom,rslow-low-coeffs = <0x9d 0x15 0x4c 0x02>; + qcom,checksum = <0x7304>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 8B E2 + 99 D4 2B DB + 9D D4 00 00 + 95 B4 2D 83 + FD 87 E3 9D + 61 86 4B 80 + 24 00 71 04 + 9C 12 05 FC + EE F3 CE 07 + 32 00 B1 EA + FC ED 33 DA + 2E 12 37 DB + 8B BC 31 12 + E8 01 63 C5 + 60 00 49 00 + 4B 00 48 00 + 31 00 2F 00 + 37 00 40 00 + 3E 00 43 00 + 38 00 60 00 + 35 00 3B 00 + 4D 00 44 00 + 3A 00 71 00 + 57 64 49 00 + 44 08 40 10 + 60 08 47 00 + 43 08 58 10 + 55 10 45 00 + 8B 28 62 48 + 4E 60 44 0C + 41 00 D8 08 + 16 21 97 15 + 60 0A F9 FD + 1A 1C 20 02 + DF 04 70 23 + 0E 17 A9 42 + 9D 54 FF 02 + 69 15 B0 23 + 63 0C 28 13 + 48 05 F3 1C + 15 03 66 05 + 5F 03 EA 16 + 8C 23 5D 45 + AD 52 93 14 + 22 21 C4 E5 + 35 C2 3A B4 + D6 1C A9 C9 + 27 05 A1 B3 + 49 17 70 8B + 53 85 D9 9A + 86 A0 09 80 + 77 FA 99 FC + 29 FC 27 F2 + 00 F8 42 DC + 29 E2 FA F7 + B1 E2 77 BD + 44 18 1A 00 + 6D D4 D9 03 + 11 05 C3 02 + CE 07 32 00 + 01 03 C7 02 + 68 04 86 02 + 87 02 E1 05 + 38 02 43 01 + 69 04 46 00 + 38 00 44 00 + 44 64 48 00 + 4F 08 46 10 + 46 00 47 00 + 46 00 41 08 + 41 10 3D 00 + 53 20 52 40 + 5D 58 69 0F + 48 00 52 08 + 5E 10 62 00 + 4E 00 44 00 + 42 10 54 10 + 4B 00 5E 20 + 75 40 46 50 + 56 10 5E 00 + 5A 08 3B 10 + D8 08 3E 22 + 5A FD 5D 02 + 1E 0C C9 1C + 26 23 02 44 + 08 52 66 18 + 98 03 77 04 + 6B 02 7C 13 + 3F 0A CD 20 + F7 05 19 02 + 5E 04 A6 1C + 74 03 8E 05 + C0 02 65 18 + 4F 03 F7 04 + E4 03 6A 00 + EF 22 CB 04 + F1 02 67 05 + EB 1C E7 03 + 3E 04 34 02 + 89 18 E4 02 + A8 05 A0 02 + 8A 00 BF 00 + C0 00 FA 00 + 22 14 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 4f780f07ecb8d..d6b8eb94dd941 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -42,17 +42,24 @@ compatible = "qcom,qpnp-power-on"; reg = <0x800 0x100>; interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, - <0x0 0x8 0x1 IRQ_TYPE_NONE>; - interrupt-names = "kpdpwr", "resin"; - qcom,pon-dbc-delay = <15625>; + <0x0 0x8 0x1 IRQ_TYPE_NONE>, + <0x0 0x8 0x4 IRQ_TYPE_NONE>, + <0x0 0x8 0x5 IRQ_TYPE_NONE>; + interrupt-names = "kpdpwr", "resin", + "resin-bark", "kpdpwr-resin-bark"; + qcom,pon-dbc-delay = <62500>; qcom,kpdpwr-sw-debounce; qcom,system-reset; qcom,store-hard-reset-reason; qcom,pon_1 { qcom,pon-type = ; - qcom,pull-up; + qcom,support-reset = <1>; + qcom,pull-up = <1>; linux,code = ; + qcom,s1-timer = <4480>; + qcom,s2-timer = <2000>; + qcom,s2-type = <0x7>; }; qcom,pon_2 { @@ -60,6 +67,16 @@ qcom,pull-up; linux,code = ; }; + + qcom,pon_3 { + qcom,pon-type = ; + qcom,support-reset = <1>; + qcom,pull-up = <1>; + qcom,s1-timer = <1352>; + qcom,s2-timer = <2000>; + qcom,s2-type = <0x1>; + qcom,use-bark; + }; }; pm8150_clkdiv: clock-controller@5b00 { @@ -78,7 +95,7 @@ #address-cells = <1>; #size-cells = <1>; qcom,qpnp-rtc-write = <0>; - qcom,qpnp-rtc-alarm-pwrup = <0>; + qcom,qpnp-rtc-alarm-pwrup = <1>; qcom,pm8150_rtc_rw@6000 { reg = <0x6000 0x100>; diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi index e1ff572b262d5..35365dc3b6e99 100644 --- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi @@ -74,6 +74,7 @@ <0x2 0xc1 0 IRQ_TYPE_NONE>, <0x2 0xc4 0 IRQ_TYPE_NONE>, <0x2 0xc5 0 IRQ_TYPE_NONE>, + <0x2 0xc6 0 IRQ_TYPE_NONE>, <0x2 0xc7 0 IRQ_TYPE_NONE>, <0x2 0xc8 0 IRQ_TYPE_NONE>, <0x2 0xc9 0 IRQ_TYPE_NONE>, @@ -81,12 +82,12 @@ <0x2 0xcb 0 IRQ_TYPE_NONE>; interrupt-names = "pm8150b_gpio1", "pm8150b_gpio2", "pm8150b_gpio5", "pm8150b_gpio6", - "pm8150b_gpio8", "pm8150b_gpio9", - "pm8150b_gpio10", "pm8150b_gpio11", - "pm8150b_gpio12"; + "pm8150b_gpio7", "pm8150b_gpio8", + "pm8150b_gpio9", "pm8150b_gpio10", + "pm8150b_gpio11", "pm8150b_gpio12"; gpio-controller; #gpio-cells = <2>; - qcom,gpios-disallowed = <3 4 7>; + qcom,gpios-disallowed = <3 4>; }; pm8150b_vadc: vadc@3100 { @@ -736,7 +737,7 @@ thermal-sensors = <&bcl_soc>; wake-capable-sensor; tracks-low; - + disable-thermal-zone; trips { soc_trip:soc-trip { temperature = <10>; diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi index 3586af695f4f9..9858bcff9bb07 100644 --- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi @@ -233,7 +233,7 @@ qcom,ires-ua = <12500>; qcom,hdrm-voltage-mv = <325>; qcom,hdrm-vol-hi-lo-win-mv = <100>; - status = "disabled"; +// status = "disabled"; }; pm8150l_torch0: qcom,torch_0 { @@ -270,7 +270,7 @@ qcom,ires-ua = <12500>; qcom,hdrm-voltage-mv = <325>; qcom,hdrm-vol-hi-lo-win-mv = <100>; - status = "disabled"; + //status = "disabled"; }; pm8150l_switch0: qcom,led_switch_0 { @@ -293,6 +293,19 @@ qcom,led-mask = <3>; qcom,default-led-trigger = "switch2_trigger"; }; + + pm8150l_flashlight: qcom,flashlight { + label = "flash"; + qcom,led-name = "flashlight"; + qcom,max-current = <750>; + qcom,default-led-trigger = "flashlight_trigger"; + qcom,id = <3>; + qcom,current-ma = <500>; + qcom,duration-ms = <1280>; + qcom,ires-ua = <12500>; + qcom,hdrm-voltage-mv = <325>; + qcom,hdrm-vol-hi-lo-win-mv = <100>; + }; }; pm8150l_wled: qcom,wled@d800 { @@ -334,7 +347,7 @@ qcom,num-lpg-channels = <3>; qcom,lut-patterns = <0 10 20 30 40 50 60 70 80 90 100 90 80 70 60 50 40 30 20 10 0>; - lpg1 { + pwm_lpg1: lpg1 { qcom,lpg-chan-id = <1>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -345,7 +358,7 @@ qcom,ramp-pattern-repeat; }; - lpg2 { + pwm_lpg2: lpg2 { qcom,lpg-chan-id = <2>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -356,7 +369,7 @@ qcom,ramp-pattern-repeat; }; - lpg3 { + pwm_lpg3: lpg3 { qcom,lpg-chan-id = <3>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -374,24 +387,24 @@ reg-names = "lpg-base"; #pwm-cells = <2>; qcom,num-lpg-channels = <2>; + status = "disabled"; }; pm8150l_rgb_led: qcom,leds@d000 { compatible = "qcom,tri-led"; reg = <0xd000 0x100>; - red { + red_led: red { label = "red"; pwms = <&pm8150l_lpg 0 1000000>; led-sources = <0>; - linux,default-trigger = "timer"; }; - green { + green_led: green { label = "green"; pwms = <&pm8150l_lpg 1 1000000>; led-sources = <1>; linux,default-trigger = "timer"; }; - blue { + blue_led: blue { label = "blue"; pwms = <&pm8150l_lpg 2 1000000>; led-sources = <2>; diff --git a/arch/arm64/boot/dts/qcom/sdmmagpie-camera.dtsi b/arch/arm64/boot/dts/qcom/sdmmagpie-camera.dtsi old mode 100644 new mode 100755 diff --git a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi index da9805d4cd816..4185695742cc9 100644 --- a/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +++ b/arch/arm64/boot/dts/qcom/sdmmagpie.dtsi @@ -2818,6 +2818,220 @@ }; }; + ipa_smmu_ap: ipa_smmu_ap { + compatible = "qcom,ipa-smmu-ap-cb"; + qcom,smmu-s1-bypass; + iommus = <&apps_smmu 0x520 0x0>; + qcom,iova-mapping = <0x20000000 0x40000000>; + /* modem tables in IMEM */ + qcom,additional-mapping = <0x146bd000 0x146bd000 0x2000>; + }; + + ipa_smmu_wlan: ipa_smmu_wlan { + compatible = "qcom,ipa-smmu-wlan-cb"; + qcom,smmu-s1-bypass; + iommus = <&apps_smmu 0x521 0x0>; + /* ipa-uc ram */ + qcom,additional-mapping = <0x1e60000 0x1e60000 0x80000>; + }; + + ipa_smmu_uc: ipa_smmu_uc { + compatible = "qcom,ipa-smmu-uc-cb"; + qcom,smmu-s1-bypass; + iommus = <&apps_smmu 0x522 0x0>; + qcom,iova-mapping = <0x40400000 0x1fc00000>; + }; + + qcom,ipa_fws { + compatible = "qcom,pil-tz-generic"; + qcom,pas-id = <0xf>; + qcom,firmware-name = "ipa_fws"; + qcom,pil-force-shutdown; + memory-region = <&pil_ipa_fw_mem>; + }; + +}; + +#include "sdmmagpie-gdsc.dtsi" +#include "sdmmagpie-bus.dtsi" +#include "sdmmagpie-qupv3.dtsi" +#include "sdmmagpie-vidc.dtsi" +#include "sdmmagpie-sde-pll.dtsi" +#include "sdmmagpie-sde.dtsi" +#include "sdmmagpie-camera.dtsi" + +&pcie_0_gdsc { + status = "ok"; +}; + +&pcie_tbu_gdsc { + status = "ok"; +}; + +&usb30_prim_gdsc { + status = "ok"; +}; + +&ufs_phy_gdsc { + status = "ok"; +}; + +&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc { + status = "ok"; +}; + +&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc { + status = "ok"; +}; + +&hlos1_vote_aggre_noc_mmu_tbu1_gdsc { + status = "ok"; +}; + +&hlos1_vote_aggre_noc_mmu_tbu2_gdsc { + status = "ok"; +}; + +&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc { + status = "ok"; +}; + +&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc { + status = "ok"; +}; + +&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc { + status = "ok"; +}; + +&bps_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + qcom,support-hw-trigger; + status = "ok"; +}; + +&ife_0_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + status = "ok"; +}; + +&ife_1_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + status = "ok"; +}; + +&ipe_0_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + qcom,support-hw-trigger; + status = "ok"; +}; + +&ipe_1_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + qcom,support-hw-trigger; + status = "ok"; +}; + +&titan_top_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; + status = "ok"; +}; + +&mdss_core_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_DISP_AHB_CLK>; + status = "ok"; +}; + +&gpu_cx_gdsc { + parent-supply = <&VDD_CX_LEVEL>; + status = "ok"; +}; + +&gpu_gx_gdsc { + clock-names = "core_root_clk"; + clocks = <&clock_gpucc GPU_CC_GX_GFX3D_CLK_SRC>; + qcom,force-enable-root-clk; + parent-supply = <&VDD_GFX_LEVEL>; + qcom,reset-aon-logic; + status = "ok"; +}; + +&mvsc_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; + status = "ok"; +}; + +&mvs0_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; + qcom,support-hw-trigger; + status = "ok"; +}; + +&mvs1_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; + qcom,support-hw-trigger; + status = "ok"; +}; + +&npu_core_gdsc { + clock-names = "ahb_clk"; + clocks = <&clock_gcc GCC_NPU_CFG_AHB_CLK>; + status = "ok"; +}; + +#include "sdmmagpie-ion.dtsi" +#include "msm-arm-smmu-sdmmagpie.dtsi" +#include "sdmmagpie-pm.dtsi" +#include "pm6150.dtsi" +#include "pm6150l.dtsi" +#include "sdmmagpie-pinctrl.dtsi" +#include "pm8009.dtsi" +#include "sdmmagpie-regulator.dtsi" +#include "sdmmagpie-camera.dtsi" +#include "sdmmagpie-coresight.dtsi" +#include "sdmmagpie-usb.dtsi" +#include "sdmmagpie-thermal.dtsi" +#include "sdmmagpie-audio.dtsi" + +&usb0 { + extcon = <&pm6150_pdphy>, <&pm6150_charger>, <&eud>; +}; + +&pm6150_vadc { + rf_pa0_therm { + reg = ; + label = "rf_pa0_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + rf_pa1_therm { + reg = ; + label = "rf_pa1_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + llcc_pmu: llcc-pmu@90cc000 { compatible = "qcom,qcom-llcc-pmu"; reg = <0x090cc000 0x300>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/sm8150-audio-overlay.dtsi index 980a8bf9763ea..6af6feb50540b 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-audio-overlay.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-audio-overlay.dtsi @@ -16,6 +16,7 @@ #include &snd_9360 { + status = "disabled"; qcom,ext-disp-audio-rx = <1>; qcom,wcn-btfm = <1>; qcom,mi2s-audio-intf = <1>; @@ -72,9 +73,10 @@ "MADINPUT", "MCLK", "hifi amp", "LINEOUT1", "hifi amp", "LINEOUT2", + "AMIC1", "MIC BIAS1", "AMIC2", "MIC BIAS2", "MIC BIAS2", "Headset Mic", - "AMIC3", "MIC BIAS2", + "AMIC3", "MIC BIAS3", "MIC BIAS2", "ANCRight Headset Mic", "AMIC4", "MIC BIAS2", "MIC BIAS2", "ANCLeft Headset Mic", @@ -95,8 +97,8 @@ "SpkrLeft IN", "SPK1 OUT", "SpkrRight IN", "SPK2 OUT"; - qcom,msm-mbhc-hphl-swh = <1>; - qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1700>; qcom,msm-mbhc-hs-mic-min-threshold-mv = <50>; qcom,hph-en0-gpio = <&tavil_hph_en0>; @@ -107,11 +109,21 @@ asoc-codec-names = "msm-stub-codec.1", "msm-ext-disp-audio-codec-rx"; - qcom,wsa-max-devs = <2>; + qcom,wsa-max-devs = <0>; qcom,wsa-devs = <&wsa881x_70211>, <&wsa881x_70212>, <&wsa881x_70213>, <&wsa881x_70214>; qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight", "SpkrLeft", "SpkrRight"; + + /* pinctrl-names = "quat-mi2s-active", "quat-mi2s-sleep"; */ + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active + &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep + &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; }; &soc { @@ -290,10 +302,10 @@ "cdc-vddpx-1", "cdc-vdd-3v3"; - qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias1-mv = <2700>; qcom,cdc-micbias2-mv = <1800>; - qcom,cdc-micbias3-mv = <1800>; - qcom,cdc-micbias4-mv = <1800>; + qcom,cdc-micbias3-mv = <2700>; + qcom,cdc-micbias4-mv = <2700>; qcom,cdc-mclk-clk-rate = <9600000>; qcom,cdc-slim-ifd = "tavil-slim-ifd"; diff --git a/arch/arm64/boot/dts/qcom/sm8150-audio.dtsi b/arch/arm64/boot/dts/qcom/sm8150-audio.dtsi index 4a83abba1e22f..5088b1d6517c1 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-audio.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-audio.dtsi @@ -96,6 +96,7 @@ compatible = "qcom,sm8150-asoc-snd-tavil"; qcom,model = "sm8150-tavil-snd-card"; + qcom,msm-mbhc-usbc-audio-supported = <1>; asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, <&loopback>, <&compress>, <&hostless>, <&afe>, <&lsm>, <&routing>, <&compr>, @@ -155,15 +156,16 @@ "msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913", "msm-dai-q6-tdm.36914", "msm-dai-q6-tdm.36928", "msm-dai-q6-tdm.36929"; - fsa4480-i2c-handle = <&fsa4480>; + + /*fsa4480-i2c-handle = <&fsa4480>;*/ }; }; &qupv3_se4_i2c { status = "ok"; - fsa4480: fsa4480@43 { + fsa4480: fsa4480@42 { compatible = "qcom,fsa4480-i2c"; - reg = <0x43>; + reg = <0x42>; pinctrl-names = "default"; pinctrl-0 = <&fsa_usbc_ana_en>; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-cdp.dtsi b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-cdp.dtsi index 5c6893b2df643..2fb674231bcf7 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-cdp.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-cdp.dtsi @@ -215,8 +215,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -352,8 +355,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-mtp.dtsi index b33f73a9a2e39..4a187e2fa84c2 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-mtp.dtsi @@ -216,8 +216,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -353,8 +356,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-qrd.dtsi b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-qrd.dtsi index 51751d45d9478..78c48962b6969 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-qrd.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-camera-sensor-qrd.dtsi @@ -213,8 +213,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; @@ -352,8 +355,11 @@ &cam_sensor_active_front>; pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_front>; + /* gpios = <&tlmm 15 0>, <&tlmm 12 0>; + */ + gpios = <&tlmm 15 0>; gpio-reset = <1>; gpio-req-tbl-num = <0 1>; gpio-req-tbl-flags = <1 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-camera.dtsi b/arch/arm64/boot/dts/qcom/sm8150-camera.dtsi index 666fa3ffa8182..2c08330b15bc7 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-camera.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-camera.dtsi @@ -168,7 +168,7 @@ hw-thd-dat = <22>; hw-thd-sta = <162>; hw-tbuf = <227>; - hw-scl-stretch-en = <0>; + hw-scl-stretch-en = <1>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; @@ -183,7 +183,7 @@ hw-thd-dat = <22>; hw-thd-sta = <35>; hw-tbuf = <62>; - hw-scl-stretch-en = <0>; + hw-scl-stretch-en = <1>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; @@ -198,7 +198,7 @@ hw-thd-dat = <22>; hw-thd-sta = <35>; hw-tbuf = <62>; - hw-scl-stretch-en = <1>; + hw-scl-stretch-en = <0>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; @@ -263,7 +263,7 @@ hw-thd-dat = <22>; hw-thd-sta = <162>; hw-tbuf = <227>; - hw-scl-stretch-en = <0>; + hw-scl-stretch-en = <1>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; @@ -278,7 +278,7 @@ hw-thd-dat = <22>; hw-thd-sta = <35>; hw-tbuf = <62>; - hw-scl-stretch-en = <0>; + hw-scl-stretch-en = <1>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; @@ -293,7 +293,7 @@ hw-thd-dat = <22>; hw-thd-sta = <35>; hw-tbuf = <62>; - hw-scl-stretch-en = <1>; + hw-scl-stretch-en = <0>; hw-trdhld = <6>; hw-tsp = <3>; cci-clk-src = <37500000>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi b/arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi index a922eb219c17c..f1d9bf10b19cc 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi @@ -250,6 +250,21 @@ qcom,platform-reset-gpio = <&tlmm 6 0>; }; +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd_display { + qcom,dsi-display-active; +}; + &qupv3_se9_i2c { status = "ok"; diff --git a/arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi b/arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi index a771977a5bf87..e3041545665db 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi @@ -147,12 +147,12 @@ 0x0844 0x03 0x0>; pinctrl-names = "default"; - pinctrl-0 = <&pcie0_clkreq_default - &pcie0_perst_default - &pcie0_wake_default>; + pinctrl-0 = <&pcie0_clkreq_default>; + /* &pcie0_perst_default>; */ + /*&pcie0_wake_default>;*/ - perst-gpio = <&tlmm 35 0>; - wake-gpio = <&tlmm 37 0>; + /*perst-gpio = <&tlmm 35 0>;*/ + /*wake-gpio = <&tlmm 37 0>;*/ gdsc-vdd-supply = <&pcie_0_gdsc>; vreg-1.8-supply = <&pm8150l_l3>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi old mode 100644 new mode 100755 index bb06cbca433e0..35401f18edbf3 --- a/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi @@ -400,6 +400,7 @@ pins = "gpio122"; drive-strength = <2>; bias-pull-down; + input-enable; }; }; }; @@ -413,7 +414,8 @@ config { pins = "gpio54"; drive-strength = <2>; - bias-pull-down; + bias-disable; + output-low; }; }; }; @@ -432,6 +434,7 @@ }; }; + /* pcie0_perst_default: pcie0_perst_default { mux { pins = "gpio35"; @@ -444,8 +447,9 @@ bias-pull-down; }; }; + */ - pcie0_wake_default: pcie0_wake_default { +/* pcie0_wake_default: pcie0_wake_default { mux { pins = "gpio37"; function = "gpio"; @@ -457,6 +461,7 @@ bias-pull-up; }; }; +*/ }; pcie1 { @@ -1274,12 +1279,12 @@ /* active state */ mux { /* 41: NFC ENABLE 42:ESE Enable */ - pins = "gpio41", "gpio42", "gpio48"; + pins = "gpio41", "gpio48"; function = "gpio"; }; config { - pins = "gpio41", "gpio42", "gpio48"; + pins = "gpio41", "gpio48"; drive-strength = <2>; /* 2 MA */ bias-pull-up; }; @@ -1289,12 +1294,12 @@ /* sleep state */ mux { /* 41: NFC ENABLE 42:ESE Enable */ - pins = "gpio41", "gpio42", "gpio48"; + pins = "gpio41", "gpio48"; function = "gpio"; }; config { - pins = "gpio41", "gpio42", "gpio48"; + pins = "gpio41", "gpio48"; drive-strength = <2>; /* 2 MA */ bias-disable; }; @@ -2592,6 +2597,20 @@ }; tert_tdm { + + cs35l41_int_default: cs35l41_int_default { + mux { + pins = "gpio10"; + function = "gpio"; + }; + config { + pins = "gpio10"; + bias-pull-up; + drive-strength = <8>; + input-enable; + }; + }; + tert_tdm_sleep: tert_tdm_sleep { mux { pins = "gpio133", "gpio134"; @@ -3852,6 +3871,63 @@ }; }; + /* USB C analog configuration */ + wcd_usbc_analog_en1 { + wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + wcd_usbc_analog_en2 { + wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle { + mux { + pins = "gpio58"; + function = "gpio"; + }; + config { + pins = "gpio58"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active { + mux { + pins = "gpio58"; + function = "gpio"; + }; + config { + pins = "gpio58"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + fsa_usbc_ana_en_n@100 { fsa_usbc_ana_en: fsa_usbc_ana_en { mux { diff --git a/arch/arm64/boot/dts/qcom/sm8150-pmic-overlay.dtsi b/arch/arm64/boot/dts/qcom/sm8150-pmic-overlay.dtsi index f1c4666aa1a32..18ccdc3bd4f85 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-pmic-overlay.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-pmic-overlay.dtsi @@ -130,6 +130,27 @@ power-source = <0>; }; }; + + otg_vbus_boost { + otg_vbus_boost_default: otg_vbus_boost_default { + pins = "gpio12"; + function = "normal"; + output-low; + power-source = <0>; + }; + }; + + power_good { + /*Get the DC Power Good signal*/ + power_good_default: power_good_default { + pins = "gpio7"; + function = "normal"; + qcom,drive-strength = <2>; /* 2 MA */ + bias-disable; /* NO pull */ + power-source = <1>; + input-enable; + }; + }; }; &usb0 { diff --git a/arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi b/arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi index ddb7d6adc4937..23c488063cb67 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi @@ -95,6 +95,19 @@ pinctrl-0 = <&key_home_default>; qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; }; + + display_panel_avdd_eldo: display-gpio-regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "display_panel_avdd_eldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <233>; + gpio = <&tlmm 130 0>; + enable-active-high; + regulator-boot-on; + pinctrl-names = "default"; + pintctrl-0 = <&display_panel_avdd_eldo_default>; + }; }; &qupv3_se17_i2c { @@ -114,7 +127,7 @@ pinctrl-0 = <&ts_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; st,irq-gpio = <&tlmm 122 0x2008>; - st,reset-gpio = <&tlmm 54 0x00>; + //st,reset-gpio = <&tlmm 54 0x00>; st,regulator_dvdd = "vdd"; st,regulator_avdd = "avdd"; }; @@ -224,6 +237,21 @@ vdd-supply = <&display_panel_avdd_eldo>; }; +&tlmm { + display_panel_avdd_eldo_default: display_panel_avdd_eldo_default { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <8>; + bias-disable = <0>; + output-high; + }; + }; +}; + &qupv3_se12_2uart { status = "ok"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150-regulator.dtsi b/arch/arm64/boot/dts/qcom/sm8150-regulator.dtsi index f0912aaa0c5a9..fcaf5e808a2ca 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-regulator.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-regulator.dtsi @@ -389,9 +389,9 @@ L13A: pm8150_l13: regulator-pm8150-l13 { regulator-name = "pm8150_l13"; qcom,set = ; - regulator-min-microvolt = <2704000>; - regulator-max-microvolt = <2704000>; - qcom,init-voltage = <2704000>; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + qcom,init-voltage = <3000000>; qcom,init-mode = ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi index ddcd25ac12730..228af2f626b6c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi @@ -29,27 +29,19 @@ #include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi" #include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi" #include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi" +#include "dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi" #include "dsi-panel-sw43404-amoled-dsc-wqhd-video.dtsi" #include "dsi-panel-sw43404-amoled-dsc-fhd-plus-cmd.dtsi" +#include "dsi-panel-samsung-fhd-ea8076-cmd.dtsi" +#include "dsi-panel-tianma-fhd-nt36672a-video.dtsi" #include "dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi" #include "dsi-panel-rm69299-visionox-amoled-fhd-plus-video.dtsi" +#include "dsi-panel-ss-fhd-ea8076-cmd.dtsi" +#include "dsi-panel-ss-fhd-ea8076-global-cmd.dtsi" +#include "dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi" +#include "dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi" #include -&tlmm { - display_panel_avdd_eldo_default: display_panel_avdd_eldo_default { - mux { - pins = "gpio130"; - function = "gpio"; - }; - config { - pins = "gpio130"; - drive-strength = <8>; - bias-disable = <0>; - output-high; - }; - }; -}; - &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { #address-cells = <1>; @@ -169,17 +161,30 @@ }; }; - display_panel_avdd_eldo: display-gpio-regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "display_panel_avdd_eldo"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <233>; - gpio = <&tlmm 130 0>; - enable-active-high; - regulator-boot-on; - pinctrl-names = "default"; - pintctrl-0 = <&display_panel_avdd_eldo_default>; + dsi_amoled_panel_pwr_supply: dsi_amoled_panel_pwr_supply { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + //qcom,supply-post-on-sleep = <20>; + }; + + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vci"; + qcom,supply-min-voltage = <3000000>; + qcom,supply-max-voltage = <3000000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-pre-off-sleep = <10>; + }; }; dsi_sharp_4k_dsc_video_display: qcom,dsi-display@0 { @@ -392,7 +397,40 @@ qcom,dsi-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>; }; - dsi_dual_nt36850_truly_cmd_display: qcom,dsi-display@19 { + dsi_ss_ea8074_fhd_cmd_display: qcom,dsi-display@19 { + label = "dsi_ss_ea8074_fhd_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_notch_fhd_ea8074_cmd>; + }; + + dsi_samsung_fhd_ea8076_cmd_display: qcom,dsi-display@20 { + label = "dsi_samsung_fhd_ea8076_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_cmd>; + }; + + dsi_tianma_fhd_nt36672a_video_display: qcom,dsi-display@25 { + label = "dsi_tianma_fhd_nt36672a_video_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_tianma_fhd_nt36672a_video>; + }; + + dsi_dual_nt36850_truly_cmd_display: qcom,dsi-display@26 { label = "dsi_dual_nt36850_truly_cmd_display"; qcom,display-type = "primary"; @@ -403,7 +441,7 @@ qcom,dsi-panel = <&dsi_dual_nt36850_truly_cmd>; }; - dsi_nt35695b_truly_fhd_cmd_sec_display: qcom,dsi-display@20 { + dsi_nt35695b_truly_fhd_cmd_sec_display: qcom,dsi-display@27 { label = "dsi_nt35695b_truly_fhd_cmd_display"; qcom,display-type = "secondary"; @@ -415,7 +453,7 @@ }; - dsi_nt35695b_truly_fhd_video_sec_display: qcom,dsi-display@21 { + dsi_nt35695b_truly_fhd_video_sec_display: qcom,dsi-display@28 { label = "dsi_nt35695b_truly_fhd_video_display"; qcom,display-type = "secondary"; @@ -426,7 +464,7 @@ qcom,dsi-panel = <&dsi_nt35695b_truly_fhd_video>; }; - dsi_sim_sec_hd_cmd_display: qcom,dsi-display@22 { + dsi_sim_sec_hd_cmd_display: qcom,dsi-display@29 { label = "dsi_sim_sec_hd_cmd_display"; qcom,display-type = "secondary"; @@ -438,7 +476,56 @@ qcom,dsi-panel = <&dsi_sim_sec_hd_cmd>; }; - dsi_rm69299_visionox_amoled_vid_display: qcom,dsi-display@23 { + dsi_ss_fhd_ea8076_cmd_display: qcom,dsi-display@30 { + + label = "dsi_ss_fhd_ea8076_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_fhd_ea8076_cmd>; + }; + + + dsi_ss_fhd_ea8076_global_cmd_display: qcom,dsi-display@32 { + + label = "dsi_ss_fhd_ea8076_global_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_fhd_ea8076_global_cmd>; + }; + + dsi_j20s_36_02_0a_video_display: qcom,dsi-display@36{ + label = "dsi_j20s_36_02_0a_video_display"; + qcom,display-type = "primary"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "src_byte_clk0", "src_pixel_clk0", + "shadow_byte_clk0", "shadow_pixel_clk0"; + qcom,ulps-enabled; + qcom,dsi-panel = <&dsi_j20s_36_02_0a_video>; + }; + + dsi_j20s_42_02_0b_video_display: qcom,dsi-display@37{ + label = "dsi_j20s_42_02_0b_video_display"; + qcom,display-type = "primary"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "src_byte_clk0", "src_pixel_clk0", + "shadow_byte_clk0", "shadow_pixel_clk0"; + qcom,ulps-enabled; + qcom,dsi-panel = <&dsi_j20s_42_02_0b_video>; + }; + + dsi_rm69299_visionox_amoled_vid_display: qcom,dsi-display@40 { label = "dsi_rm69299_visionox_amoled_vid_display"; qcom,display-type = "primary"; @@ -479,7 +566,8 @@ vddio-supply = <&pm8150_l14>; lab-supply = <&lcdb_ldo_vreg>; ibb-supply = <&lcdb_ncp_vreg>; - vdd-supply = <&display_panel_avdd_eldo>; + //vdd-supply = <&display_panel_avdd_eldo>; + vci-supply = <&pm8150_l13>; qcom,dsi-display-list = <&dsi_sharp_4k_dsc_video_display @@ -502,7 +590,16 @@ &dsi_sw43404_amoled_video_display &dsi_sw43404_amoled_fhd_plus_cmd_display &dsi_rm69299_visionox_amoled_vid_display - &dsi_dual_nt36850_truly_cmd_display>; + &dsi_dual_nt36850_truly_cmd_display + &dsi_ss_ea8074_fhd_cmd_display + &dsi_samsung_fhd_ea8076_cmd_display + &dsi_tianma_fhd_nt36672a_video_display + &dsi_dual_nt36850_truly_cmd_display + &dsi_ss_fhd_ea8076_cmd_display + &dsi_ss_fhd_ea8076_global_cmd_display + &dsi_j20s_36_02_0a_video_display + &dsi_j20s_42_02_0b_video_display>; + }; sde_dsi1: qcom,dsi-display-secondary { @@ -535,7 +632,7 @@ vddio-supply = <&pm8150_l14>; lab-supply = <&lcdb_ldo_vreg>; ibb-supply = <&lcdb_ncp_vreg>; - vdd-supply = <&display_panel_avdd_eldo>; + //vdd-supply = <&display_panel_avdd_eldo>; qcom,dsi-display-list = <&dsi_nt35695b_truly_fhd_cmd_sec_display @@ -561,7 +658,7 @@ &sde_dp { qcom,dp-usbpd-detection = <&pm8150b_pdphy>; qcom,ext-disp = <&ext_disp>; - qcom,dp-aux-switch = <&fsa4480>; + /* qcom,dp-aux-switch = <&fsa4480>; */ qcom,usbplug-cc-gpio = <&tlmm 38 0>; @@ -744,7 +841,7 @@ qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22 - 08 08 05 02 04 00 19 17]; + 08 08 05 02 04 00 19 17]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; qcom,panel-roi-alignment = <720 40 720 40 720 40>; @@ -956,6 +1053,19 @@ }; }; +&dsi_ss_notch_fhd_ea8074_cmd { + qcom,mdss-dsi-t-clk-post = <0x19>; + qcom,mdss-dsi-t-clk-pre = <0x1C>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 22 08 09 25 23 09 + 09 06 03 04 00 1C 19]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sharp_1080_cmd { qcom,mdss-dsi-t-clk-post = <0x18>; qcom,mdss-dsi-t-clk-pre = <0x19>; @@ -969,6 +1079,20 @@ }; }; +&dsi_samsung_fhd_ea8076_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + + &dsi_dual_nt36850_truly_cmd { qcom,mdss-dsi-display-timings { timing@0{ @@ -981,3 +1105,80 @@ }; }; +&dsi_tianma_fhd_nt36672a_video { + qcom,mdss-dsi-t-clk-post = <0x18>; + qcom,mdss-dsi-t-clk-pre = <0x1B>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 21 08 08 25 22 09 + 08 06 03 04 00 1B 18]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_ss_fhd_ea8076_cmd { + qcom,mdss-dsi-t-clk-post = <0x0F>; + qcom,mdss-dsi-t-clk-pre = <0x37>; +/* + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0A]; + qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; +*/ + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + + +&dsi_ss_fhd_ea8076_global_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 24 0A + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + + +&dsi_j20s_36_02_0a_video { + qcom,mdss-dsi-t-clk-post = <0x17>; + qcom,mdss-dsi-t-clk-pre = <0x18>; + qcom,mdss-dsi-display-timings { + /* 60 Hz */ + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07 + 07 05 02 04 00 18 17]; + qcom,display-topology = <1 1 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_j20s_42_02_0b_video { + qcom,mdss-dsi-t-clk-post = <0x17>; + qcom,mdss-dsi-t-clk-pre = <0x18>; + qcom,mdss-dsi-display-timings { + /* 120 Hz */ + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07 + 07 05 02 04 00 18 17]; + qcom,display-topology = <1 1 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/qcom/sm8150-sdx50m-qrd.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sdx50m-qrd.dtsi index 187a93fea2a2f..8d167a5eba5bc 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-sdx50m-qrd.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-sdx50m-qrd.dtsi @@ -86,6 +86,19 @@ pinctrl-0 = <&key_home_default>; qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; }; + + display_panel_avdd_eldo: display-gpio-regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "display_panel_avdd_eldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <233>; + gpio = <&tlmm 130 0>; + enable-active-high; + regulator-boot-on; + pinctrl-names = "default"; + pintctrl-0 = <&display_panel_avdd_eldo_default>; + }; }; &qupv3_se17_i2c { @@ -181,6 +194,21 @@ qcom,dsi-display-active; }; +&tlmm { + display_panel_avdd_eldo_default: display_panel_avdd_eldo_default { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <8>; + bias-disable = <0>; + output-high; + }; + }; +}; + &sde_dsi { vdd-supply = <&display_panel_avdd_eldo>; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 8428b869d7681..8b6e4e765bc86 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -63,6 +63,7 @@ hsuart0 = &qupv3_se13_4uart; hsuart1 = &qupv3_se4_2uart; spi0 = &qupv3_se3_spi; + spi1 = &qupv3_se1_spi; i2c0 = &qupv3_se4_i2c; }; @@ -559,7 +560,7 @@ compatible = "android,firmware"; shared_meta: vbmeta { compatible = "android,vbmeta"; - parts = "vbmeta,boot,system,vendor,dtbo,odm"; + parts = "vbmeta,boot,system,vendor,dtbo"; }; android_q_fstab: fstab { compatible = "android,fstab"; @@ -568,15 +569,7 @@ dev = "/dev/block/platform/soc/8804000.sdhci/by-name/vendor"; type = "ext4"; mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect,avb"; - status = "ok"; - }; - odm { - compatible = "android,odm"; - dev = "/dev/block/platform/soc/8804000.sdhci/by-name/odm"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect,avb"; + fsmgr_flags = "wait,avb"; status = "ok"; }; }; @@ -588,120 +581,120 @@ #size-cells = <2>; ranges; - hyp_mem: hyp_mem { + hyp_mem: hyp_mem@85700000 { no-map; reg = <0x0 0x85700000 0x0 0x600000>; }; - xbl_aop_mem: xbl_aop_mem { + xbl_dump_mem: xbl_dump_mem@85d00000 { + no-map; + reg = <0x0 0x85d00000 0x0 0x100000>; + }; + + xbl_aop_mem: xbl_aop_mem@85e00000 { no-map; reg = <0x0 0x85e00000 0x0 0x140000>; }; - smem_region: smem { + smem_region: smem@86000000 { no-map; reg = <0x0 0x86000000 0x0 0x200000>; }; - removed_regions: removed_regions { + removed_regions: removed_regions@86200000 { no-map; reg = <0x0 0x86200000 0x0 0x5500000>; }; - pil_camera_mem: camera_region { + pil_camera_mem: camera_region@8b700000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0x8b700000 0x0 0x500000>; }; - pil_wlan_fw_mem: pil_wlan_fw_region { + pil_wlan_fw_mem: pil_wlan_fw_region@8bc00000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0x8bc00000 0x0 0x180000>; }; - pil_npu_mem: pil_npu_region { + pil_npu_mem: pil_npu_region@8bd80000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0x8bd80000 0x0 0x80000>; }; - pil_adsp_mem: pil_adsp_region { + pil_adsp_mem: pil_adsp_region@8be00000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x8be00000 0x0 0x1a00000>; + reg = <0x0 0x8be00000 0x0 0x2200000>; }; - pil_modem_mem: modem_region { + pil_modem_mem: modem_region@8e000000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x8d800000 0x0 0x9600000>; + reg = <0x0 0x8e000000 0x0 0x9600000>; }; - pil_video_mem: pil_video_region { + pil_video_mem: pil_video_region@97600000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x96e00000 0x0 0x500000>; + reg = <0x0 0x97600000 0x0 0x500000>; }; - pil_slpi_mem: pil_slpi_region { + pil_slpi_mem: pil_slpi_region@97b00000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x97300000 0x0 0x1400000>; + reg = <0x0 0x97b00000 0x0 0x1400000>; }; - pil_ipa_fw_mem: pil_ipa_fw_region { + pil_ipa_fw_mem: pil_ipa_fw_region@98f00000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x98700000 0x0 0x10000>; + reg = <0x0 0x98f00000 0x0 0x10000>; }; - pil_ipa_gsi_mem: pil_ipa_gsi_region { + pil_ipa_gsi_mem: pil_ipa_gsi_region@98f10000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x98710000 0x0 0x5000>; + reg = <0x0 0x98f10000 0x0 0x5000>; }; - pil_gpu_mem: pil_gpu_region { + pil_gpu_mem: pil_gpu_region@98f15000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x98715000 0x0 0x2000>; + reg = <0x0 0x98f15000 0x0 0x2000>; }; - pil_spss_mem: pil_spss_region { + pil_spss_mem: pil_spss_region@99000000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x98800000 0x0 0x100000>; + reg = <0x0 0x99000000 0x0 0x100000>; }; - pil_cdsp_mem: cdsp_regions { + pil_cdsp_mem: cdsp_regions@99100000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x98900000 0x0 0x1400000>; + reg = <0x0 0x99100000 0x0 0x1400000>; }; - qseecom_mem: qseecom_region { + qseecom_mem: qseecom_region@0x9e400000 { compatible = "shared-dma-pool"; no-map; reg = <0 0x9e400000 0 0x1400000>; }; - cdsp_sec_mem: cdsp_sec_regions { + cdsp_sec_mem: cdsp_sec_regions@0xa4c00000 { compatible = "removed-dma-pool"; no-map; reg = <0x0 0xa4c00000 0x0 0x3c00000>; }; - cont_splash_memory: cont_splash_region { + cont_splash_memory: cont_splash_region@9c000000 { reg = <0x0 0x9c000000 0x0 0x02400000>; label = "cont_splash_region"; }; - disp_rdump_memory: disp_rdump_region { - reg = <0x0 0x9c000000 0x0 0x02400000>; - label = "disp_rdump_region"; - }; - adsp_mem: adsp_region { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; @@ -785,6 +778,7 @@ #include "sm8150-camera.dtsi" #include "msm-qvr-external.dtsi" +#include "trusty.dtsi" &soc { #address-cells = <1>; @@ -3026,7 +3020,7 @@ qcom_seecom: qseecom@87900000 { compatible = "qcom,qseecom"; - reg = <0x87900000 0x2200000>; + reg = <0x87900000 0x3E00000>; reg-names = "secapp-region"; memory-region = <&qseecom_mem>; qcom,hlos-num-ce-hw-instances = <1>; @@ -3043,7 +3037,7 @@ qcom_smcinvoke: smcinvoke@87900000 { compatible = "qcom,smcinvoke"; - reg = <0x87900000 0x2200000>; + reg = <0x87900000 0x3E00000>; reg-names = "secapp-region"; }; @@ -3588,7 +3582,7 @@ qcom,rmtfs_sharedmem@0 { compatible = "qcom,sharedmem-uio"; - reg = <0x0 0x200000>; + reg = <0x0 0x300000>; reg-names = "rmtfs"; qcom,client-id = <0x00000001>; qcom,guard-memory; diff --git a/arch/arm64/boot/dts/qcom/smb1390.dtsi b/arch/arm64/boot/dts/qcom/smb1390.dtsi index b67c55911c913..f17a407e84f07 100644 --- a/arch/arm64/boot/dts/qcom/smb1390.dtsi +++ b/arch/arm64/boot/dts/qcom/smb1390.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -62,11 +62,17 @@ smb1390_slave: qcom,smb1390_slave@18 { reg = <0x18>; #address-cells = <1>; #size-cells = <0>; + interrupt-parent = <&spmi_bus>; + interrupts = <0x2 0xC5 0x0 IRQ_TYPE_LEVEL_LOW>; + interrupt_names = "smb1390_slave"; + interrupt-controller; + #interrupt-cells = <3>; qcom,periph-map = <0x10>; status = "disabled"; smb1390_slave_charger: qcom,charge_pump_slave { compatible = "qcom,smb1390-slave"; + interrupt-parent = <&smb1390_slave>; status = "disabled"; }; }; diff --git a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_dev.h b/arch/arm64/boot/dts/qcom/trusty.dtsi similarity index 57% rename from drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_dev.h rename to arch/arm64/boot/dts/qcom/trusty.dtsi index b2ebeaf929478..9963e4cb23513 100644 --- a/drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_csid_ppi_dev.h +++ b/arch/arm64/boot/dts/qcom/trusty.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -10,13 +10,18 @@ * GNU General Public License for more details. */ -#ifndef _CAM_CSID_PPI_DEV_H_ -#define _CAM_CSID_PPI_DEV_H_ +&soc { + trusty { + #size-cells = <0x2>; + #address-cells = <0x2>; + ranges; + compatible = "android,trusty-smc-v1"; + log { + compatible = "android,trusty-log-v1"; + }; + virtio { + compatible = "android,trusty-virtio-v1"; + }; + }; -#include "cam_isp_hw.h" - -irqreturn_t cam_csid_ppi_irq(int irq_num, void *data); -int cam_csid_ppi_probe(struct platform_device *pdev); -int cam_csid_ppi_remove(struct platform_device *pdev); - -#endif /*_CAM_CSID_PPI_DEV_H_ */ +}; diff --git a/arch/arm64/boot/dts/qcom/vayu-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/vayu-audio-overlay.dtsi new file mode 100644 index 0000000000000..999697af8a0bc --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-audio-overlay.dtsi @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,wsa-max-devs = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <2600>; + qcom,msm-mbhc-hs-mic-min-threshold-mv = <50>; +}; + +&wcd934x_cdc { + qcom,cdc-micbias1-mv = <2700>; + qcom,cdc-micbias2-mv = <2700>; + qcom,cdc-micbias3-mv = <2700>; + qcom,cdc-micbias4-mv = <2700>; +}; diff --git a/arch/arm64/boot/dts/qcom/vayu-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/vayu-pinctrl.dtsi new file mode 100644 index 0000000000000..4909875dcadf9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-pinctrl.dtsi @@ -0,0 +1,617 @@ +/*for xiaomi pinctrl*/ +&tlmm { + qupv3_se17_spi_pins: qupv3_se17_spi_pins { + qupv3_se17_spi_active: qupv3_se17_spi_active { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "qup17"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se17_spi_sleep: qupv3_se17_spi_sleep { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + + bq2597x { + bq2597x_master_int_default: bq2597x_master_int_default { + /* active state */ + mux { + /* GPIO 10 is used for bq25970 master ic interrupt usage */ + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + bq2597x_master_int_suspend: bq2597x_master_int_suspend { + /* sleep state */ + mux { + /* GPIO 10 is used for bq25970 master ic interrupt usage */ + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + }; + + onewire_gpio_active: onewire_gpio_active { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + bias-pull-up; /* No PULL */ + }; + }; + + onewire_gpio_sleep: onewire_gpio_sleep { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio122", "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio12"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + }; + + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + + pcie1 { + pcie1_wake_default: pcie1_wake_default { + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + cam_sensor_active_macro: cam_sensor_active_macro { + /* RESET macro */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_macro: cam_sensor_suspend_macro { + /* RESET MACRO */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + test_mode_ctrl_irq { + ant_sub_ctrl_irq: ant_sub_ctrl_irq { + mux { + pins = "gpio81"; + function = "gpio"; + }; + config { + pins = "gpio81"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + ant_top_ctrl_irq: ant_top_ctrl_irq { + mux { + pins = "gpio133"; + function = "gpio"; + }; + config { + pins = "gpio133"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; +}; + +//camera voltage start +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_active_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; +&cam_sensor_active_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +//camera voltage end diff --git a/arch/arm64/boot/dts/qcom/vayu-sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/vayu-sm8150-camera-sensor-mtp.dtsi new file mode 100644 index 0000000000000..83ec9fa914477 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-sm8150-camera-sensor-mtp.dtsi @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux1: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + actuator_rear_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_rear_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150l_bob>; + }; + +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + //imx582 + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom2-supply = <&pm8150l_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom2"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 1352000 0 3008000>; + rgltr-max-voltage = <1800000 2040000 1352000 0 4000000>; + rgltr-load-current = <180000 112000 120000 0 80000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //s5k3t2 + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x2>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1352000 0>; + rgltr-max-voltage = <1800000 4000000 1352000 0>; + rgltr-load-current = <1000 80000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 13 0>, + <&tlmm 54 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VDIG2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 15 0>, + <&tlmm 23 0>, + <&tlmm 94 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1", + "CAM_PWDN1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + + eeprom_rear_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_macro: qcom,eeprom@4 { + cell-index = <4>; + reg = <0x4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <180000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_macro>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_macro>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK4"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + //ov02b1b + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 15 0>, + <&tlmm 23 0>, + <&tlmm 94 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1", + "CAM_PWDN1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //ov8856 + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x3>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_ultra>; + led-flash-src = <&led_flash_rear_aux1>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0>; + rgltr-max-voltage = <1800000 4000000 1352000 0>; + rgltr-load-current = <1000 80000 12000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 16 0>, + <&tlmm 28 0>, + <&tlmm 94 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VANA3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //hi259 + qcom,cam-sensor@4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + reg = <0x4>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_macro>; + led-flash-src = <&led_flash_rear_aux2>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 112000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_macro>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_macro>; + gpios = <&tlmm 16 0>, + <&tlmm 27 0>, + <&tlmm 94 0>, + <&tlmm 84 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4", + "CAM_PWDN4"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts new file mode 100644 index 0000000000000..b96c0f3e0bc0b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts @@ -0,0 +1,28 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "vayu-sm8150.dtsi" +#include "vayu-audio-overlay.dtsi" + +/ { + model = "VAYU"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <47 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/vayu-sm8150.dtsi b/arch/arm64/boot/dts/qcom/vayu-sm8150.dtsi new file mode 100644 index 0000000000000..35585682407e0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-sm8150.dtsi @@ -0,0 +1,1939 @@ +/* +this file is for attribution only of vayu +And public attribution of xiaomi platforms(like J20S and so and) +*/ +#include "vayu-pinctrl.dtsi" +#include "xiaomi-sm8150-common.dtsi" +#include "vayu-sm8150-camera-sensor-mtp.dtsi" + +&ufshc_mem { + vcc-voltage-level = <2504000 2950000>; + vcc-low-voltage-sup; + qcom,vccq-parent-supply = <&pm8150l_s8>; + qcom,vccq-parent-max-microamp = <210000>; + vccq-supply = <&pm8150_l9>; + vccq-max-microamp = <700000>; +}; + +&qupv3_se4_i2c { +#include "smb1390.dtsi" +}; + + + +&pm8150b_fg { + qcom,battery-data = <&vayu_batterydata>; + qcom,rapid-soc-dec-en; + qcom,soc-scale-mode-en; + qcom,five-pin-battery; + qcom,soc-hi-res; + qcom,soc_decimal_rate = < + 0 38 + 10 35 + 20 33 + 30 33 + 40 33 + 50 33 + 60 33 + 70 30 + 80 25 + 90 20 + 95 10 >; + qcom,ki-coeff-low-chg = <315>; + qcom,ki-coeff-med-chg = <183>; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-ffc-sys-term-current = <(-1160)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,soc-scale-vbatt-mv = <3600>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + qcom,shutdown-delay-enable; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; + qcom,ki-coeff-chg-med-hi-thresh-ma = <1000>; + qcom,ki-coeff-chg-low-med-thresh-ma = <500>; + qcom,ffc-ki-coeff-chg-med-hi-thresh-ma = <3900>; + qcom,ffc-ki-coeff-chg-low-med-thresh-ma = <3500>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <0>; + qcom,usb-icl-ua = <3000000>; + qcom,fcc-max-ua = <5900000>; + qcom,fv-max-uv = <4475000>; + qcom,non-fcc-fv-max-uv = <4450000>; + //qcom,chg-warm-th= <450>; + //qcom,chg-cool-th= <150>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-200)>; + mi,use-bq-pump; + qcom,usbpd-phandle = <&pm8150b_pdphy>; + qcom,battery-data = <&vayu_batterydata>; + //mi,six-pin-step-chg-params = <4250000 6000000 + // 4450000 5400000 + // 4480000 4000000>; + //mi,six-pin-step-chg; + //mi,six-pin-soc-th = <45>; + mi,fcc-batt-unverify-ua = <2000000>; + mi,support-ffc; + qcom,disable-suspend-on-collapse; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 2000000 2000000 2000000 2000000 2000000 2000000 2000000 + 2000000 2000000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3600000 3600000 3600000 3200000 3200000 3200000 + 3200000 3100000 2800000 2400000 2200000 2000000 1300000 + 750000 300000>; + qcom,thermal-fcc-qc3-classb-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 300000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2500000 2500000 2500000 2500000 + 2500000 2500000 2400000 2200000 2000000 1600000 1300000 + 1000000 500000>; + qcom,thermal-fcc-pps-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 300000>; + qcom,thermal-fcc-pps-bq + = <6000000 5700000 5475000 5250000 5025000 4800000 4575000 + 4350000 4100000 3500000 3000000 2400000 2000000 1500000 + 1000000 500000>; + qcom,thermal-fcc-qc3-cp + = <4800000 4600000 4400000 4200000 4000000 3800000 3600000 + 3400000 3000000 2600000 2400000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-fcc-qc3-classb-cp + = <5100000 4700000 4300000 4000000 3600000 3500000 3400000 + 3400000 3400000 3200000 2500000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2400000 2200000 2000000 1800000 + 1600000 1600000 1400000 1200000 1100000 1050000 1000000 + 950000 500000>; + qcom,thermal-mitigation-voice + = <6000000 2200000 2200000 1000000 1000000 800000 800000 + 800000 800000 700000 700000 600000 600000 600000 + 500000 400000>; + + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; +// qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,step-charging-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&ext_5v_boost { + status = "disable"; +}; + +&pm8150b_pdphy { + mi,non-qcom-pps-ctrl; +}; + +&qupv3_se4_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "ok"; + bq25970-standalone@66 { + compatible = "ti,bq2597x-standalone"; + reg = <0x66>; + interrupt-parent = <&tlmm>; + interrupts = <10 0x2002>; + pinctrl-names = "default"; + pinctrl-0 = <&bq2597x_master_int_default &bq2597x_master_int_suspend>; + + /*ti,bq2597x,bat-ovp-disable;*/ + ti,bq2597x,bat-ovp-alarm-disable; + ti,bq2597x,bat-ocp-disable; + ti,bq2597x,bat-ocp-alarm-disable; + ti,bq2597x,bat-ucp-alarm-disable; + ti,bq2597x,bat-ucp-disable; + + /*ti,bq2597x,bus-ovp-alarm-disable; + ti,bq2597x,bus-ocp-disable; + ti,bq2597x,bus-ocp-alarm-disable;*/ + ti,bq2597x,bat-therm-disable; + ti,bq2597x,bus-therm-disable; + ti,bq2597x,die-therm-disable; + + ti,bq2597x,bat-ovp-threshold = <4550>; + ti,bq2597x,bat-ovp-alarm-threshold = <4525>; + //ti,bq2597x,bat-ocp-threshold = <8000>; + //ti,bq2597x,bat-ocp-alarm-threshold = <7500>; + + ti,bq2597x,bus-ovp-threshold = <12000>; + ti,bq2597x,bus-ovp-alarm-threshold = <11000>; + ti,bq2597x,bus-ocp-threshold = <3750>; + ti,bq2597x,bus-ocp-alarm-threshold = <3500>; + + //ti,bq2597x,bat-ucp-alarm-threshold = <2000>; + + ti,bq2597x,bat-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,bus-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,die-therm-threshold = <145>; + + ti,bq2597x,ac-ovp-threshold = <14>; + //ti,bq2597x,sense-resistor-mohm = <2>; + + }; +}; + +&soc { + cp_qc30 { + compatible = "xiaomi,cp-qc30"; + status = "ok"; + mi,qc3-bat-volt-max = <4420>; + mi,qc3-bat-curr-max = <3600>; + mi,qc3-bus-volt-max = <12000>; + mi,qc3-bus-curr-max = <2100>; + mi,qc3-battery-warm-th = <450>; + mi,use-qcom-gauge; + //mi,cp-sec-enable; + }; + + usbpd_pm { + compatible = "xiaomi,usbpd-pm"; + status = "ok"; + mi,pd-bat-volt-max = <4500>; + mi,pd-ffc-bat-volt-max = <4480>; + mi,pd-bat-curr-max = <6000>; + mi,pd-bus-volt-max = <12000>; + mi,pd-bus-curr-max = <3000>; + mi,pd-non-ffc-bat-volt-max = <4450>; + mi,pd-bus-curr-compensate = <0>; + mi,pd-battery-warm-th = <450>; + mi,use-qcom-gauge; + //mi,cp-sec-enable; + }; + + onewire_gpio: onewire_gpio { + compatible = "xiaomi,onewire_gpio"; + label = "xm_onewire"; + xiaomi,version = <1>; + xiaomi,ow_gpio = <&tlmm 21 0x00>; + mi,onewire-gpio-cfg-addr = <0x03515000 0x4>; + xiaomi,gpio_number = <21>; + pinctrl-names = "onewire_active", "onewire_sleep"; + pinctrl-0 = <&onewire_gpio_active>; + pinctrl-1 = <&onewire_gpio_sleep>; + status = "ok"; + }; + vayu_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "fg-gen4-batterydata-vayu-NVT-5160mah.dtsi" + #include "fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi" + }; + + maxim_ds28e16: maxim_ds28e16 { + compatible = "maxim,ds28e16"; + label = "max_ds28e16"; + maxim,version = <1>; + status = "ok"; + }; + + simtray { + compatible = "xiaomi,simtray-status"; + status-gpio = <&tlmm 112 0x00>; + }; +}; + +&qupv3_se4_i2c { + status = "ok"; + tas2557@4c { + status = "disabled"; + compatible = "ti,tas2557"; + reg = <0x4c>; + //ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 60 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; + + fsa4480@42 { + status = "disabled"; + }; + + cs35l41@40 { + status = "disabled"; + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + cs,cdc-reset-gpio = <&tlmm 89 0x01>; + reg = <0x40>; + pinctrl-names = "cs35l41_irq_default"; + pinctrl-0 = <&cs35l41_int_default>; + interrupt-parent = <&tlmm>; + interrupts = <10 8>; + + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; +/* + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + interrupt-parent = <&tlmm>; + interrupts = <11 8>; + reset-gpios = <&tlmm 7 0x01>; + VA-supply = <&pm8998_s4>; + VP-supply = <&audio_vsys>; + cirrus,boost-peak-milliamp = <4500>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; +*/ + }; +}; + +&qupv3_se7_i2c { + status = "ok"; + tas256x:tas256x@4c { + #sound-dai-cells = <0>; + compatible = "ti,tas256x";/*or "ti,tas2564" or "ti,tas256x" */ + reg = <0x4c>;//register tas256x_i2c_driver + ti,left-channel = <0x4d>; //receiver address + ti,right-channel = <0x4c>; //speaker address + ti,channels = <2>; /* channel number */ + ti,reset-gpio = <&tlmm 89 0>; //SPKR_RST1 + ti,reset-gpio2 = <&tlmm 92 0>; //SPKR_RST2 + pinctrl-names = "default"; + //pinctrl-0 = <&reset_stat_default>; + //ti,reset-gpio = <&pm6150l_gpios 8 GPIO_ACTIVE_LOW>; + ti,irq-gpio = <&tlmm 90 0>;//spkr_int1 left + ti,irq-gpio2 = <&tlmm 91 0>;//spkr_int2 right + status = "ok"; + ti,iv-width = <16>; + ti,vbat-mon = <0>; + }; +}; + +&smb1390 { + status = "disabled"; +}; + +&smb1390_charger { + status = "disabled"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x84 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 100 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 21 0>; + }; + + dsi_amoled_panel_pwr_external_supply: dsi_amoled_panel_pwr_external_supply { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + //qcom,supply-post-on-sleep = <20>; + }; + + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vcie"; + qcom,supply-min-voltage = <3000000>; + qcom,supply-max-voltage = <3000000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-pre-off-sleep = <10>; + }; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 120 0x0>; + //goodix.gpio_pwr = <&tlmm 125 0x0>; + //fp_vdd_vreg = <&pm8150l_l7>; + status = "ok"; + }; + + + fingerprint_fpc { + compatible = "fpc,fpc1020"; + fpc,gpio_rst = <&tlmm 37 0x0>; + fpc,gpio_irq = <&tlmm 120 0x0>; + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active", + "fpc1020_irq_active"; + + pinctrl-0 = <&msm_gpio_37>; + pinctrl-1 = <&msm_gpio_37_output_high>; + pinctrl-2 = <&msm_gpio_120>; + status = "ok"; + }; + + + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; + + testing_mode { + compatible = "modem,testing-mode"; + status-gpio = <&tlmm 81 0x00>, + <&tlmm 133 0x00>; + debounce-time = <30>; + pinctrl-names = "default"; + pinctrl-0 = <&ant_sub_ctrl_irq &ant_top_ctrl_irq>; + }; +}; + +/*Touch SPI state init*/ +&qupv3_se17_spi_active { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "qup17"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + // bias-disable; + bias-pull-down; + }; +}; + +&qupv3_se17_spi_sleep { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-pull-down; + }; +}; + +&qupv3_se17_spi { + pinctrl-0 = <&qupv3_se17_spi_active>; + pinctrl-1 = <&qupv3_se17_spi_sleep>; +}; + +/*IC int pin, rst pin init*/ +&tlmm { + ts_mux { + ts_int_active: ts_int_active { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <16>; + bias-pull-down; + }; + }; + + ts_reset_active: ts_reset_active { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + ts_cs_active: ts_cs_active { + mux { + pins = "gpio58"; + function = "qup17"; + }; + + config { + pins = "gpio58"; + drive-strength = <6>; + bias-disable; + }; + }; + + ts_cs_suspend: ts_cs_suspend { + mux { + pins = "gpio58"; + function = "gpio"; + }; + + config { + pins = "gpio58"; + drive-strength = <6>; + bias-pull-down; + output-low; + }; + }; + }; +}; + +&ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <16>; + bias-disable; + input-enable; + }; +}; + +&ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-disable; + }; +}; + +&qupv3_se17_spi { + status = "ok"; + touch_spi@0 { + compatible = "xiaomi,spi-for-tp"; + reg = <0>; + status = "ok"; + spi-max-frequency = <10000000>; //10M + }; +}; + +/* Novatek device tree node */ +&soc { + ts_novatek { + compatible = "novatek,NVT-ts-spi"; + status = "ok"; + spi-max-frequency = <10000000>; /*4800000,9600000,15000000,19200000 10M*/ + novatek,reset-gpio = <&tlmm 12 0x00>; + novatek,irq-gpio = <&tlmm 122 0x2001>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_int_active &ts_reset_active &ts_cs_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend &ts_cs_suspend>; + /* 672 */ + /*novatek,swrst-n8-addr = <0x01F01A>;*/ + /* 672A */ + novatek,swrst-n8-addr = <0x03F0FE>; + novatek,spi-rd-fast-addr = <0x03F310>; + /* MP */ + novatek,mp-support-dt; + novatek,config-array-size = <2>; + novatek,cfg_0 { + novatek,tp-vendor = <0x46>; + novatek,display-maker = <0x36>; + novatek,fw-name = "j20s_novatek_ts_fw01.bin"; + novatek,mp-name = "j20s_novatek_ts_mp01.bin"; + novatek,clicknum-file-name = "nvt+tianma"; + }; + novatek,cfg_1 { + novatek,tp-vendor = <0x53>; + novatek,display-maker = <0x42>; + novatek,fw-name = "j20s_novatek_ts_fw02.bin"; + novatek,mp-name = "j20s_novatek_ts_mp02.bin"; + novatek,clicknum-file-name = "nvt+csot"; + }; + /* for Xiaomi J20S 672C CSOT6.67" module */ + novatek-mp-criteria-594B@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "novatek-mp-criteria-594B"; + /* MP Config */ + IC_X_CFG_SIZE = <18>; + IC_Y_CFG_SIZE = <36>; + IC_KEY_CFG_SIZE = <4>; + X_Channel = <18>; + Y_Channel = <36>; + AIN_X = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17>; + AIN_Y = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 + 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35>; + AIN_KEY = <0 1 2 0xFF>; + /* MP Criteria */ + PS_Config_Lmt_Short_Rawdata_P = < + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008>; + + PS_Config_Lmt_Short_Rawdata_N = < + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000>; + + PS_Config_Lmt_Open_Rawdata_P = < + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120>; + + PS_Config_Lmt_Open_Rawdata_N = < + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511)>; + + PS_Config_Lmt_FW_Rawdata_P = < + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840>; + + PS_Config_Lmt_FW_Rawdata_N = < + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240>; + + PS_Config_Lmt_FW_CC_P = < + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314>; + + PS_Config_Lmt_FW_CC_N = < + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0>; + + PS_Config_Lmt_FW_Diff_P = < + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75>; + + PS_Config_Lmt_FW_Diff_N = < + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75)>; + + PS_Config_Diff_Test_Frame = <50>; + }; + + /* for Xiaomi J20S 672C TM6.67" module */ + novatek-mp-criteria-594A@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "novatek-mp-criteria-594A"; + + /* MP Config */ + IC_X_CFG_SIZE = <16>; + IC_Y_CFG_SIZE = <36>; + IC_KEY_CFG_SIZE = <4>; + X_Channel = <16>; + Y_Channel = <36>; + AIN_X = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; + AIN_Y = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 + 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35>; + AIN_KEY = <0 1 2 0xFF>; + + /* MP Criteria */ + PS_Config_Lmt_Short_Rawdata_P = < + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008>; + + PS_Config_Lmt_Short_Rawdata_N = < + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000>; + + PS_Config_Lmt_Open_Rawdata_P = < + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120>; + + PS_Config_Lmt_Open_Rawdata_N = < + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511)>; + + PS_Config_Lmt_FW_Rawdata_P = < + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840>; + + PS_Config_Lmt_FW_Rawdata_N = < + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240>; + + PS_Config_Lmt_FW_CC_P = < + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314>; + + PS_Config_Lmt_FW_CC_N = < + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0>; + + PS_Config_Lmt_FW_Diff_P = < + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75>; + + PS_Config_Lmt_FW_Diff_N = < + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75)>; + + PS_Config_Diff_Test_Frame = <50>; + }; + }; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 102 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +&qupv3_se1_spi { + status = "ok"; + irled@0 { + compatible = "ir-spi"; + reg = <0x0>; + status = "ok"; + spi-max-frequency = <19200000>; + }; +}; + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 2 3 4 5 7 9 11 13 15 + 13 11 9 7 5 4 3 2 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&mdss_mdp { + clock-rate = <0 0 0 0 345000000 19200000 300000000 19200000>; +}; + + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&dsi_j20s_36_02_0a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + +&dsi_j20s_42_02_0b_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + +&pm8150l_wled { + status = "okay"; + qcom,string-cfg = <7>; + qcom,ovp = <28000>; + qcom,fs-current-limit = <22500>; + qcom,cabc-sel = <1>; +}; + + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&soc { + ssc_sensors: qcom,msm-ssc-sensors { + compatible = "qcom,msm-ssc-sensors"; + status = "ok"; + qcom,firmware-name = "slpi_vy"; + }; + + thermal_message: thermal-message { + board-sensor = "quiet_therm"; + }; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + status = "ok"; + }; + +&tlmm { + /* GPIO_37 : FP_RESET_N */ + msm_gpio_37: msm_gpio_37 { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_37 : FP_RESET_N, state device active*/ + msm_gpio_37_output_high: msm_gpio_37_output_high { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_120 : FP_INT_N */ + msm_gpio_120: msm_gpio_120 { + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + drive-strength = <2>; + bias-pull-down; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi-sdx50-sm8150-common.dtsi b/arch/arm64/boot/dts/qcom/xiaomi-sdx50-sm8150-common.dtsi new file mode 100644 index 0000000000000..1507ca1c8ff73 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi-sdx50-sm8150-common.dtsi @@ -0,0 +1,405 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +#include "sm8150-pmic-overlay.dtsi" +#include "sm8150-sde-display.dtsi" +#include "sm8150-thermal-overlay.dtsi" + +&qupv3_se4_i2c { +#include "smb1390.dtsi" +#include "smb1355.dtsi" +}; + +&qupv3_se12_2uart { + status = "ok"; +}; + +&vendor { + bluetooth: bt_wcn3990 { + compatible = "qca,wcn3990"; + qca,bt-vdd-core-supply = <&pm8150_l7>; + qca,bt-vdd-pa-supply = <&pm8150l_l2>; + qca,bt-vdd-ldo-supply = <&pm8150l_l11>; + + qca,bt-vdd-core-voltage-level = <1800000 1800000>; + qca,bt-vdd-pa-voltage-level = <1304000 1304000>; + qca,bt-vdd-ldo-voltage-level = <3312000 3312000>; + + qca,bt-vdd-core-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-pa-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-ldo-current-level = <0>; /* LPM/PFM */ + }; + + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + vbus-gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + id-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>; + vbus-out-gpio = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb2_vbus_det_default + &usb2_id_det_default + &usb2_vbus_boost_default>; + }; +}; + +&qupv3_se13_4uart { + status = "ok"; +}; + +&qupv3_se3_spi { + status = "ok"; +}; + +&qupv3_se4_i2c { + status = "ok"; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + linux,can-disable; + }; + }; + + ext_5v_boost: ext_5v_boost { + compatible = "regulator-fixed"; + status = "disabled"; + regulator-name = "ext_5v_boost"; + gpio = <&pm8150b_gpios 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-enable-ramp-delay = <1600>; + + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_boost_default>; + }; + + qcom_qbt1000: qcom,qbt1000 { + compatible = "qcom,qbt1000"; + clock-names = "core", "iface"; + clock-frequency = <25000000>; + qcom,ipc-gpio = <&tlmm 118 0>; + pinctrl-names = "default"; + pinctrl-0 = <&key_home_default>; + qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; + }; +}; + +&dsi_sharp_4k_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_4k_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1s_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 11 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd_display { + qcom,dsi-display-active; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 41 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&pm8150_l5>; + vdda-phy-always-on; + vdda-pll-supply = <&pm8150l_l3>; + vdda-phy-max-microamp = <90200>; + vdda-pll-max-microamp = <19000>; + + status = "ok"; +}; + +&spmi_debug_bus { + status = "ok"; +}; + +&pm8150l_wled { + qcom,string-cfg= <7>; + qcom,leds-per-string = <6>; + status = "ok"; +}; + +&pm8150l_lcdb { + status = "ok"; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&sdhc_2 { + vdd-supply = <&pm8150l_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&pm8150l_l6>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; + + cd-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + + status = "ok"; +}; + +&wil6210 { + status = "ok"; +}; + +&mhi_0 { + mhi,fw-name = "debug.mbn"; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <3>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "cp_die_temp"; + status = "ok"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "ok"; +}; + +&usb2_phy1 { + status = "ok"; +}; + +&usb_qmp_phy { + status = "ok"; +}; + +&smb1355 { + status = "ok"; +}; + +&smb1355_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "charger_temp"; + status = "ok"; +}; + +&reserved_memory { + ramdump_fb_mem: ramdump_fb_region@af000000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0 0xaf000000 0 0x1000000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi-sm8150-common.dtsi b/arch/arm64/boot/dts/qcom/xiaomi-sm8150-common.dtsi new file mode 100644 index 0000000000000..a04b46c2f929c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi-sm8150-common.dtsi @@ -0,0 +1,449 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +#include "sm8150-pmic-overlay.dtsi" +#include "sm8150-sde-display.dtsi" +#include "sm8150-thermal-overlay.dtsi" + +&qupv3_se12_2uart { + status = "ok"; +}; + +&vendor { + bluetooth: bt_wcn3990 { + compatible = "qca,wcn3990"; + qca,bt-vdd-core-supply = <&pm8150_l7>; + qca,bt-vdd-pa-supply = <&pm8150l_l2>; + qca,bt-vdd-ldo-supply = <&pm8150l_l11>; + + qca,bt-vdd-core-voltage-level = <1800000 1800000>; + qca,bt-vdd-pa-voltage-level = <1304000 1304000>; + qca,bt-vdd-ldo-voltage-level = <3312000 3312000>; + + qca,bt-vdd-core-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-pa-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-ldo-current-level = <0>; /* LPM/PFM */ + }; + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + vbus-gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + id-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>; + vbus-out-gpio = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb2_vbus_det_default + &usb2_id_det_default + &usb2_vbus_boost_default>; + }; +}; + +&qupv3_se13_4uart { + status = "ok"; +}; + +&qupv3_se3_spi { + status = "ok"; +}; + +&qupv3_se4_i2c { + status = "ok"; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + linux,can-disable; + }; + + }; + + ext_5v_boost: ext_5v_boost { + compatible = "regulator-fixed"; + status = "disabled"; + regulator-name = "ext_5v_boost"; + gpio = <&pm8150b_gpios 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-enable-ramp-delay = <1600>; + + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_boost_default>; + }; + + qcom,qbt1000 { + compatible = "qcom,qbt1000"; + clock-names = "core", "iface"; + clock-frequency = <25000000>; +/* qcom,ipc-gpio = <&tlmm 118 0>; */ + qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; + status = "disabled"; + }; + + wdog: qcom,wdt@17c10000 { + qcom,bark-time = <20000>; + qcom,pet-time = <15000>; + }; +}; + + +&dsi_sharp_4k_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_4k_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_1080_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_notch_fhd_ea8074_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_tianma_fhd_nt36672a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; +// qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_fhd_ea8076_global_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_j20s_36_02_0a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_j20s_42_02_0b_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 103 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +&dsi_sim_vid_display { + qcom,dsi-display-active; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&pm8150_l5>; + vdda-phy-always-on; + vdda-pll-supply = <&pm8150l_l3>; + vdda-phy-max-microamp = <90200>; + vdda-pll-max-microamp = <19000>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l10>; + vcc-voltage-level = <2950000 2960000>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <750000>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l9>; + qcom,vddp-ref-clk-max-microamp = <100>; + + status = "ok"; +}; + +&sdhc_2 { + vdd-supply = <&pm8150l_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&pm8150l_l6>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; + + cd-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + + status = "disabled"; +}; + +&spmi_debug_bus { + status = "ok"; +}; + +&pm8150l_wled { + qcom,string-cfg= <7>; + qcom,leds-per-string = <6>; + status = "ok"; +}; + +&pm8150l_lcdb { + status = "ok"; +}; + +&pm8150b_charger { + io-channels = <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "usb_in_voltage", + "usb_in_current", + "chg_temp"; +}; + +&wil6210 { + status = "ok"; +}; + +&mhi_0 { + mhi,fw-name = "debug.mbn"; +}; + +&pcie0 { + qcom,no-l1-supported; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "ok"; +}; + +&usb2_phy1 { + status = "ok"; +}; + +&usb_qmp_phy { + status = "ok"; +}; + +&reserved_memory { + ramdump_fb_mem: ramdump_fb_region@af000000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0 0xaf000000 0 0x1000000>; + }; +}; diff --git a/arch/arm64/configs/vayu_user_defconfig b/arch/arm64/configs/vayu_user_defconfig new file mode 100755 index 0000000000000..cf62bd4a3fd1e --- /dev/null +++ b/arch/arm64/configs/vayu_user_defconfig @@ -0,0 +1,768 @@ +CONFIG_HOTPLUG_SIZE_BITS=29 +CONFIG_LOCALVERSION="-perf" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_FHANDLE is not set +CONFIG_AUDIT=y +# CONFIG_AUDITSYSCALL is not set +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_SCHED_WALT=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_PSI=y +CONFIG_RCU_EXPERT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_RCU_NOCB_CPU=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_IKHEADERS=y +CONFIG_LOG_BUF_SHIFT=21 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=17 +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_BPF=y +CONFIG_SCHED_CORE_CTL=y +CONFIG_NAMESPACES=y +# CONFIG_PID_NS is not set +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SCHED_TUNE=y +CONFIG_DEFAULT_USE_ENERGY_AWARE=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_KALLSYMS_ALL=y +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT_ALWAYS_ON=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +CONFIG_PROFILING=y +CONFIG_CC_STACKPROTECTOR_STRONG=y +CONFIG_REFCOUNT_FULL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SIG +# CONFIG_MODULE_SIG_FORCE +# CONFIG_MODULE_SIG_SHA512 +CONFIG_BLK_INLINE_ENCRYPTION=y +CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_CFQ_GROUP_IOSCHED=y +CONFIG_ARCH_QCOM=y +CONFIG_ARCH_SM8150=y +CONFIG_PCI=y +CONFIG_PCI_MSM=y +CONFIG_PCI_MSM_MSI=y +CONFIG_SCHED_MC=y +CONFIG_NR_CPUS=8 +CONFIG_PREEMPT=y +CONFIG_HZ_100=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y +CONFIG_MEMORY_HOTPLUG_MOVABLE_NODE=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_CMA=y +CONFIG_ZSMALLOC=y +CONFIG_BALANCE_ANON_FILE_RECLAIM=y +CONFIG_SECCOMP=y +CONFIG_OKL4_GUEST=y +CONFIG_ARMV8_DEPRECATED=y +CONFIG_SWP_EMULATION=y +CONFIG_CP15_BARRIER_EMULATION=y +CONFIG_SETEND_EMULATION=y +CONFIG_ARM64_SW_TTBR0_PAN=y +# CONFIG_ARM64_VHE is not set +CONFIG_RANDOMIZE_BASE=y +# CONFIG_EFI is not set +CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y +CONFIG_BUILD_ARM64_UNCOMPRESSED_KERNEL=y +CONFIG_KRYO_PMU_WORKAROUND=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_COMPAT=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_CPU_IDLE=y +CONFIG_ARM_CPUIDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_TIMES=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_BOOST=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_INTERFACE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_NET_IPGRE_DEMUX=y +CONFIG_SYN_COOKIES=y +CONFIG_NET_IPVTI=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +CONFIG_INET_UDP_DIAG=y +CONFIG_INET_DIAG_DESTROY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_VTI=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_DSCP=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_TEE=y +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_TRACE=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_BPF=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_ESP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_OWNER=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_SOCKET_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_RPFILTER=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_NF_SOCKET_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_RPFILTER=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_IP_SCTP=y +CONFIG_L2TP=y +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=y +CONFIG_L2TP_ETH=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_MULTIQ=y +CONFIG_NET_SCH_INGRESS=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_CLS_BPF=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_GACT=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_NET_ACT_SKBEDIT=y +CONFIG_NET_SWITCHDEV=y +CONFIG_QRTR=y +CONFIG_QRTR_SMD=y +CONFIG_QRTR_MHI=y +CONFIG_QRTR_FIFO=y +CONFIG_BPF_JIT=y +CONFIG_SOCKEV_NLMCAST=y +CONFIG_BT=y +CONFIG_MSM_BT_POWER=y +CONFIG_CFG80211=y +CONFIG_CFG80211_CERTIFICATION_ONUS=y +CONFIG_CFG80211_REG_CELLULAR_HINTS=y +CONFIG_CFG80211_INTERNAL_REGDB=y +CONFIG_RFKILL=y +CONFIG_NFC_NQ=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y +CONFIG_DMA_CMA=y +CONFIG_MHI_BUS=y +CONFIG_MHI_QCOM=y +CONFIG_MHI_NETDEV=y +CONFIG_MHI_UCI=y +CONFIG_ZRAM=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=16 +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_HDCP_QSEECOM=y +CONFIG_QSEECOM=y +CONFIG_UID_SYS_STATS=y +CONFIG_MEMORY_STATE_TIME=y +CONFIG_OKL4_USER_VIRQ=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_UFSHCD=y +CONFIG_SCSI_UFSHCD_PLATFORM=y +CONFIG_SCSI_UFS_QCOM=y +CONFIG_SCSI_UFS_CRYPTO=y +CONFIG_SCSI_UFS_CRYPTO_QTI=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_DEFAULT_KEY=y +CONFIG_DM_SNAPSHOT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_VERITY=y +CONFIG_DM_VERITY_FEC=y +CONFIG_DM_BOW=y +CONFIG_NETDEVICES=y +CONFIG_BONDING=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_VETH=y +CONFIG_SKY2=y +CONFIG_RMNET=y +CONFIG_SMSC911X=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=y +CONFIG_PPTP=y +CONFIG_PPPOL2TP=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_USB_RTL8152=y +CONFIG_USB_LAN78XX=y +CONFIG_USB_USBNET=y +# CONFIG_WIL6210 is not set +CONFIG_WCNSS_MEM_PRE_ALLOC=y +CONFIG_CLD_LL_CORE=y +CONFIG_CNSS_GENL=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_XIAOMI_TOUCHFEATURE=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_QPNP_POWER_ON=y +CONFIG_INPUT_QTI_HAPTICS=y +CONFIG_INPUT_UINPUT=y +CONFIG_SPI_XIAOMI_TP=y +CONFIG_TOUCHSCREEN_NT36xxx_HOSTDL_SPI=y +CONFIG_TOUCHSCREEN_NVT_DEBUG_FS=y +CONFIG_TOUCHSCREEN_TDDI_DBCLK=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVMEM is not set +CONFIG_SERIAL_MSM_GENI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM_LEGACY=y +# CONFIG_DEVPORT is not set +CONFIG_DIAG_CHAR=y +CONFIG_MSM_FASTCVPD=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_OKL4_PIPE=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QCOM_GENI=y +CONFIG_SPI=y +CONFIG_SPI_QCOM_GENI=y +CONFIG_SPI_SPIDEV=y +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y +CONFIG_SPMI_SIMULATOR=y +CONFIG_PM8150_PMIC_SIMULATOR=y +CONFIG_PM8150B_PMIC_SIMULATOR=y +CONFIG_PM8150L_PMIC_SIMULATOR=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y +CONFIG_PINCTRL_SM8150=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_RESET_QCOM=y +CONFIG_QCOM_DLOAD_MODE=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_QPNP_FG_GEN4_VAYU=y +#CONFIG_SMB1355_SLAVE_CHARGER is not set +CONFIG_BQ2597X_CHARGE_PUMP=y +CONFIG_QPNP_SMB5_VAYU=y +CONFIG_QPNP_QNOVO5=y +#CONFIG_SMB1390_CHARGE_PUMP_PSY is not set +CONFIG_BATT_VERIFY=y +CONFIG_ONEWIRE_GPIO=y +CONFIG_BATT_VERIFY_BY_DS28E16=y +CONFIG_FRAME_WARN=4096 +CONFIG_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_GOV_LOW_LIMITS=y +CONFIG_CPU_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_QCOM_SPMI_TEMP_ALARM=y +CONFIG_THERMAL_TSENS=y +CONFIG_QTI_THERMAL_LIMITS_DCVS=y +CONFIG_QTI_VIRTUAL_SENSOR=y +CONFIG_QTI_AOP_REG_COOLING_DEVICE=y +CONFIG_QTI_QMI_COOLING_DEVICE=y +CONFIG_QTI_QMI_SENSOR=y +CONFIG_REGULATOR_COOLING_DEVICE=y +CONFIG_QTI_BCL_PMIC5=y +CONFIG_QTI_BCL_SOC_DRIVER=y +CONFIG_QTI_ADC_TM=y +CONFIG_MFD_I2C_PMIC=y +CONFIG_MFD_SPMI_PMIC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_PROXY_CONSUMER=y +CONFIG_REGULATOR_QPNP_AMOLED=y +CONFIG_REGULATOR_QPNP_LCDB=y +CONFIG_REGULATOR_REFGEN=y +CONFIG_REGULATOR_RPMH=y +CONFIG_REGULATOR_STUB=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_ADV_DEBUG=y +CONFIG_VIDEO_FIXED_MINOR_RANGES=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_SPECTRA_CAMERA=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_VIDC_GOVERNORS=y +CONFIG_MSM_SDE_ROTATOR=y +CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y +CONFIG_MSM_NPU=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_DVB_MPQ_TSPP1=y +CONFIG_TSPP=m +CONFIG_DRM=y +CONFIG_DRM_MSM_REGISTER_LOGGING=y +CONFIG_DRM_SDE_EVTLOG_DEBUG=y +CONFIG_DRM_SDE_RSC=y +CONFIG_DRM_LT_LT9611=y +CONFIG_FB_ARMCLCD=y +CONFIG_BACKLIGHT_QCOM_SPMI_WLED=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_AUDIO_QMI=y +CONFIG_SND_SOC=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MULTITOUCH=y +CONFIG_HID_NINTENDO=y +CONFIG_HID_PLANTRONICS=y +CONFIG_HID_SONY=y +CONFIG_HID_QVR=y +CONFIG_USB_HIDDEV=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_HOST_ROLE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_LINK_LAYER_TEST=y +CONFIG_USB_REDRIVER_NB7VPQ904M=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_USB_QCOM_EMU_PHY=y +CONFIG_USB_MSM_SSPHY_QMP=y +CONFIG_MSM_HSUSB_PHY=y +CONFIG_DUAL_ROLE_USB_INTF=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VBUS_DRAW=900 +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_MTP=y +CONFIG_USB_CONFIGFS_F_PTP=y +CONFIG_USB_CONFIGFS_F_ACC=y +CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y +CONFIG_USB_CONFIGFS_UEVENT=y +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_DIAG=y +CONFIG_USB_CONFIGFS_F_CDEV=y +CONFIG_USB_CONFIGFS_F_CCID=y +CONFIG_USB_CONFIGFS_F_GSI=y +CONFIG_USB_CONFIGFS_F_QDSS=y +CONFIG_USB_PD_POLICY=y +CONFIG_QPNP_USB_PDPHY=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_QPNP_FLASH_V2=y +CONFIG_LEDS_QPNP_HAPTICS=y +CONFIG_LEDS_QCOM_CLK=y +CONFIG_LEDS_QTI_TRI_LED=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_EDAC=y +CONFIG_EDAC_KRYO_ARM64=y +CONFIG_EDAC_KRYO_ARM64_PANIC_ON_UE=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_QPNP=y +CONFIG_DMADEVICES=y +CONFIG_QCOM_GPI_DMA=y +CONFIG_DEBUG_DMA_BUF_REF=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_ION=y +CONFIG_QCOM_GENI_SE=y +CONFIG_QPNP_REVID=y +CONFIG_SPS=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_USB_BAM=y +CONFIG_IPA3=y +CONFIG_IPA_WDI_UNIFIED_API=y +CONFIG_RMNET_IPA3=y +CONFIG_RNDIS_IPA=y +CONFIG_IPA3_MHI_PROXY=y +CONFIG_IPA3_MHI_PRIME_MANAGER=y +CONFIG_IPA_UT=y +# CONFIG_MSM_11AD is not set +CONFIG_SEEMP_CORE=y +CONFIG_IPA3_REGDUMP=y +CONFIG_QCOM_MDSS_PLL=y +CONFIG_SPMI_PMIC_CLKDIV=y +CONFIG_MSM_CLK_AOP_QMP=y +CONFIG_MSM_GCC_SM8150=y +CONFIG_MSM_NPUCC_SM8150=y +CONFIG_MSM_VIDEOCC_SM8150=y +CONFIG_MSM_CAMCC_SM8150=y +CONFIG_CLOCK_CPU_OSM=y +CONFIG_MSM_DISPCC_SM8150=y +CONFIG_MSM_DEBUGCC_SM8150=y +CONFIG_MSM_CLK_RPMH=y +CONFIG_MSM_GPUCC_SM8150=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +CONFIG_QCOM_APCS_IPC=y +CONFIG_MSM_QMP=y +CONFIG_IOMMU_IO_PGTABLE_FAST=y +CONFIG_ARM_SMMU=y +CONFIG_QCOM_LAZY_MAPPING=y +CONFIG_IOMMU_DEBUG=y +CONFIG_IOMMU_DEBUG_TRACKING=y +CONFIG_IOMMU_TESTS=y +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=y +CONFIG_RPMSG_QCOM_GLINK_SPSS=y +CONFIG_RPMSG_QCOM_GLINK_SPI=y +CONFIG_QCOM_MEM_OFFLINE=y +CONFIG_QCOM_CPUSS_DUMP=y +CONFIG_QCOM_RUN_QUEUE_STATS=y +CONFIG_QCOM_LLCC=y +CONFIG_QCOM_SM8150_LLCC=y +CONFIG_QCOM_LLCC_PERFMON=m +CONFIG_QCOM_QMI_HELPERS=y +CONFIG_QCOM_QMI_RMNET=y +CONFIG_QCOM_QMI_DFC=y +CONFIG_QCOM_QMI_POWER_COLLAPSE=y +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_MEMORY_DUMP_V2=y +CONFIG_QCOM_WATCHDOG_V2=y +CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y +CONFIG_QCOM_SMP2P=y +CONFIG_QPNP_PBS=y +CONFIG_MSM_SERVICE_LOCATOR=y +CONFIG_MSM_SERVICE_NOTIFIER=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_PIL=y +CONFIG_MSM_SYSMON_QMI_COMM=y +CONFIG_MSM_PIL_SSR_GENERIC=y +CONFIG_SETUP_SSR_NOTIF_TIMEOUTS=y +CONFIG_SSR_SYSMON_NOTIF_TIMEOUT=20000 +CONFIG_SSR_SUBSYS_NOTIF_TIMEOUT=20000 +CONFIG_PANIC_ON_SSR_NOTIF_TIMEOUT=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_QCOM_DCC_V2=y +CONFIG_QCOM_SECURE_BUFFER=y +CONFIG_ICNSS=y +CONFIG_ICNSS_QMI=y +CONFIG_QCOM_EUD=y +CONFIG_QCOM_MINIDUMP=y +CONFIG_QCOM_BUS_SCALING=y +CONFIG_QCOM_BUS_CONFIG_RPMH=y +CONFIG_QCOM_COMMAND_DB=y +CONFIG_QCOM_EARLY_RANDOM=y +CONFIG_MSM_SPSS_UTILS=y +CONFIG_MSM_SPCOM=y +CONFIG_QTI_RPMH_API=y +CONFIG_QSEE_IPC_IRQ_BRIDGE=y +CONFIG_QCOM_GLINK=y +CONFIG_QCOM_GLINK_PKT=y +CONFIG_QCOM_QDSS_BRIDGE=y +CONFIG_QTI_RPM_STATS_LOG=y +CONFIG_MSM_CDSP_LOADER=y +CONFIG_QCOM_SMCINVOKE=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_PM=y +CONFIG_MSM_QBT1000=y +CONFIG_QCOM_FSA4480_I2C=y +CONFIG_MEM_SHARE_QMI_SERVICE=y +CONFIG_RMNET_CTL=y +CONFIG_MSM_PERFORMANCE=y +CONFIG_QMP_DEBUGFS_CLIENT=y +CONFIG_QCOM_SMP2P_SLEEPSTATE=y +CONFIG_QCOM_CDSP_RM=y +CONFIG_QCOM_AOP_DDR_MESSAGING=y +CONFIG_QCOM_AOP_DDRSS_COMMANDS=y +CONFIG_QTI_CRYPTO_COMMON=y +CONFIG_QTI_CRYPTO_TZ=y +CONFIG_QCOM_HYP_CORE_CTL=y +CONFIG_DEVFREQ_GOV_PASSIVE=y +CONFIG_QCOM_BIMC_BWMON=y +CONFIG_ARM_MEMLAT_MON=y +CONFIG_QCOMCCI_HWMON=y +CONFIG_QCOM_M4M_HWMON=y +CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y +CONFIG_DEVFREQ_GOV_QCOM_CACHE_HWMON=y +CONFIG_DEVFREQ_GOV_MEMLAT=y +CONFIG_DEVFREQ_SIMPLE_DEV=y +CONFIG_QCOM_DEVFREQ_DEVBW=y +CONFIG_DEVFREQ_GOV_CDSPL3=y +CONFIG_EXTCON_USB_GPIO=y +CONFIG_IIO=y +CONFIG_QCOM_SPMI_ADC5=y +CONFIG_PWM=y +CONFIG_PWM_QTI_LPG=y +CONFIG_QCOM_KGSL=y +CONFIG_ARM_GIC_V3_ACL=y +CONFIG_QCOM_LLCC_PMU=y +CONFIG_RAS=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_BINDERFS=y +CONFIG_NVMEM_SPMI_SDAM=y +CONFIG_SENSORS_SSC=y +CONFIG_ESOC=y +CONFIG_ESOC_DEV=y +CONFIG_ESOC_CLIENT=y +CONFIG_ESOC_MDM_4x=y +CONFIG_ESOC_MDM_DRV=y +CONFIG_ESOC_MDM_DBG_ENG=y +CONFIG_MSM_TZ_LOG=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_ENCRYPTION=y +CONFIG_F2FS_FS=y +CONFIG_F2FS_FS_SECURITY=y +CONFIG_F2FS_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y +CONFIG_FS_VERITY=y +CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_QFMT_V2=y +CONFIG_FUSE_FS=y +CONFIG_OVERLAY_FS=y +CONFIG_INCREMENTAL_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_ECRYPT_FS=y +CONFIG_ECRYPT_FS_MESSAGING=y +CONFIG_SDCARD_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO=y +# CONFIG_PAGE_OWNER is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_PANIC_TIMEOUT=-1 +CONFIG_SCHEDSTATS=y +CONFIG_DEBUG_NOTIFIERS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_LIST=y +CONFIG_IPC_LOGGING=y +CONFIG_DEBUG_ALIGN_RODATA=y +CONFIG_CORESIGHT=y +CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y +CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y +CONFIG_CORESIGHT_STM=y +CONFIG_CORESIGHT_CTI=y +CONFIG_CORESIGHT_TPDA=y +CONFIG_CORESIGHT_TPDM=y +CONFIG_CORESIGHT_HWEVENT=y +CONFIG_CORESIGHT_DUMMY=y +CONFIG_CORESIGHT_REMOTE_ETM=y +CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0 +CONFIG_CORESIGHT_TGU=y +CONFIG_CORESIGHT_EVENT=y +CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_HARDENED_USERCOPY=y +CONFIG_FORTIFY_SOURCE=y +CONFIG_STATIC_USERMODEHELPER=y +CONFIG_STATIC_USERMODEHELPER_PATH="" +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SMACK=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y +CONFIG_CRYPTO_DEV_QCRYPTO=y +CONFIG_CRYPTO_DEV_QCEDEV=y +CONFIG_CRYPTO_DEV_QCOM_ICE=y +CONFIG_ARM64_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y +CONFIG_STACK_HASH_ORDER_SHIFT=12 +CONFIG_PSTORE=y +CONFIG_PSTORE_RAM=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_CMDLINE="ramoops_memreserve=4M" +CONFIG_CMDLINE_EXTEND=y +CONFIG_IR_SPI=y +CONFIG_LIRC=y +CONFIG_RC_CORE=y +CONFIG_RC_DECODERS=y +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_HAS_IOMEM=y +CONFIG_RC_DEVICES=y +CONFIG_CJSON=y +CONFIG_HWCONF_MANAGER=y +CONFIG_BOOT_INFO=y +CONFIG_OF_FLATTREE=y +CONFIG_INPUT_FINGERPRINT=y +CONFIG_FINGERPRINT_FPC_VAYU=y +CONFIG_FINGERPRINT_GOODIX_TA_VAYU=y +CONFIG_COMBO_MODIFY_VAYU=y +CONFIG_GPIO_TESTING_MODE=y +CONFIG_SIMTRAY_STATUS=y diff --git a/arch/arm64/configs/vendor/sm8150-perf_defconfig b/arch/arm64/configs/vendor/sm8150-perf_defconfig index e33a5b83e5e00..b09131f55f949 100644 --- a/arch/arm64/configs/vendor/sm8150-perf_defconfig +++ b/arch/arm64/configs/vendor/sm8150-perf_defconfig @@ -726,6 +726,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y +CONFIG_CRYPTO_DEV_QCOM_ICE=y CONFIG_ARM64_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y diff --git a/arch/arm64/configs/vendor/sm8150_defconfig b/arch/arm64/configs/vendor/sm8150_defconfig index 87f0133ad2f80..b29c7fa37aa84 100644 --- a/arch/arm64/configs/vendor/sm8150_defconfig +++ b/arch/arm64/configs/vendor/sm8150_defconfig @@ -811,6 +811,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y +CONFIG_CRYPTO_DEV_QCOM_ICE=y CONFIG_ARM64_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y diff --git a/arch/arm64/configs/vendor/trinket-perf_defconfig b/arch/arm64/configs/vendor/trinket-perf_defconfig index f464b3d2e72de..bf10f7e5461e9 100644 --- a/arch/arm64/configs/vendor/trinket-perf_defconfig +++ b/arch/arm64/configs/vendor/trinket-perf_defconfig @@ -704,6 +704,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y +CONFIG_CRYPTO_DEV_QCOM_ICE=y CONFIG_ARM64_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y diff --git a/arch/arm64/configs/vendor/trinket_defconfig b/arch/arm64/configs/vendor/trinket_defconfig index f7944948aecd0..456b1e7520bee 100644 --- a/arch/arm64/configs/vendor/trinket_defconfig +++ b/arch/arm64/configs/vendor/trinket_defconfig @@ -790,6 +790,7 @@ CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y +CONFIG_CRYPTO_DEV_QCOM_ICE=y CONFIG_ARM64_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y diff --git a/arch/arm64/include/asm/bootinfo.h b/arch/arm64/include/asm/bootinfo.h new file mode 100644 index 0000000000000..0d02d476c90c6 --- /dev/null +++ b/arch/arm64/include/asm/bootinfo.h @@ -0,0 +1,94 @@ +/* + * bootinfo.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASMARM_BOOTINFO_H +#define __ASMARM_BOOTINFO_H + +#define HW_DEVID_VERSION_SHIFT 8 +#define HW_DEVID_VERSION_MASK 0xF00UL +#define HW_MAJOR_VERSION_SHIFT 4 +#define HW_MAJOR_VERSION_MASK 0xF0 +#define HW_MINOR_VERSION_SHIFT 0 +#define HW_MINOR_VERSION_MASK 0x0F + +typedef enum { + PU_REASON_EVENT_HWRST, + PU_REASON_EVENT_SMPL, + PU_REASON_EVENT_RTC, + PU_REASON_EVENT_DC_CHG, + PU_REASON_EVENT_USB_CHG, + PU_REASON_EVENT_PON1, + PU_REASON_EVENT_CABLE, + PU_REASON_EVENT_KPD, + PU_REASON_EVENT_WARMRST, + PU_REASON_EVENT_LPK, + PU_REASON_MAX +} powerup_reason_t; + +enum { + RS_REASON_EVENT_WDOG, + RS_REASON_EVENT_KPANIC, + RS_REASON_EVENT_NORMAL, + RS_REASON_EVENT_OTHER, + RS_REASON_MAX +}; + +typedef enum { + POFF_REASON_EVENT_SOFT, + POFF_REASON_EVENT_PS_HOLD, + POFF_REASON_EVENT_PMIC_WD, + POFF_REASON_EVENT_GP1_KPD1, + POFF_REASON_EVENT_GP2_KPD2, + POFF_REASON_EVENT_KPDPWR_AND_RESIN, + POFF_REASON_EVENT_RESIN_N, + POFF_REASON_EVENT_KPDPWR_N, + POFF_REASON_EVENT_RESEVER1, + POFF_REASON_EVENT_RESEVER2, + POFF_REASON_EVENT_RESEVER3, + POFF_REASON_EVENT_CHARGER, + POFF_REASON_EVENT_TFT, + POFF_REASON_EVENT_UVLO, + POFF_REASON_EVENT_OTST3, + POFF_REASON_EVENT_STAGE3, + POFF_REASON_EVENT_GP_FAULT0, + POFF_REASON_EVENT_GP_FAULT1, + POFF_REASON_EVENT_GP_FAULT2, + POFF_REASON_EVENT_GP_FAULT3, + POFF_REASON_EVENT_MBG_FAULT, + POFF_REASON_EVENT_OVLO, + POFF_REASON_EVENT_GEN2_UVLO, + POFF_REASON_EVENT_AVDD_RB, + POFF_REASON_EVENT_RESEVER4, + POFF_REASON_EVENT_RESEVER5, + POFF_REASON_EVENT_RESEVER6, + POFF_REASON_EVENT_FAULT_FAULT_N, + POFF_REASON_EVENT_FAULT_PBS_WATCHDOG_TO, + POFF_REASON_EVENT_FAULT_PBS_NACK, + POFF_REASON_EVENT_FAULT_RESTART_PON, + POFF_REASON_EVENT_GEN2_OTST3, + POFF_REASON_EVENT_RESEVER7, + POFF_REASON_EVENT_RESEVER8, + POFF_REASON_EVENT_RESEVER9, + POFF_REASON_EVENT_RESEVER10, + POFF_REASON_EVENT_S3_RESET_FAULT_N, + POFF_REASON_EVENT_S3_RESET_PBS_WATCHDOG_TO, + POFF_REASON_EVENT_S3_RESET_PBS_NACK, + POFF_REASON_EVENT_S3_RESET_KPDPWR_ANDOR_RESIN, + POFF_REASON_MAX +} poweroff_reason_t; + +#define RESTART_EVENT_WDOG 0x10000 +#define RESTART_EVENT_KPANIC 0x20000 +#define RESTART_EVENT_NORMAL 0x40000 +#define RESTART_EVENT_OTHER 0x80000 + +void set_poweroff_reason(int poweroff_reason); +unsigned int get_powerup_reason(void); +int is_abnormal_powerup(void); +void set_powerup_reason(unsigned int powerup_reason); +#endif diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index 9ecc174f4a6cc..7afbf515741c2 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -48,6 +48,6 @@ #define ARM64_HW_DBM 28 #define ARM64_WORKAROUND_1188873 29 -#define ARM64_NCAPS 30 +#define ARM64_NCAPS 31 #endif /* __ASM_CPUCAPS_H */ diff --git a/arch/arm64/include/asm/hwconf_manager.h b/arch/arm64/include/asm/hwconf_manager.h new file mode 100644 index 0000000000000..7f32b0457412f --- /dev/null +++ b/arch/arm64/include/asm/hwconf_manager.h @@ -0,0 +1,53 @@ +/* + * hwconf_manager.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _LINUX_HWCONF_MANAGER_H +#define _LINUX_HWCONF_MANAGER_H + +#ifdef CONFIG_HWCONF_MANAGER +extern int register_hw_component_info(char *component_name); +extern int add_hw_component_info(char *component_name, char *key, char *value); +extern int unregister_hw_component_info(char *component_name); + +extern int register_hw_monitor_info(char *component_name); +extern int add_hw_monitor_info(char *component_name, char *mon_key, char *mon_value); +extern int update_hw_monitor_info(char *component_name, char *mon_key, char *mon_value); +extern int hw_monitor_notifier_register(struct notifier_block *nb); +extern int hw_monitor_notifier_unregister(struct notifier_block *nb); +extern int unregister_hw_monitor_info(char *component_name); +#else +static inline int register_hw_component_info(char *component_name) +{ +} +static inline int add_hw_component_info(char *component_name, char *key, char *value) +{ +} +static inline int unregister_hw_component_info(char *component_name) +{ +} +static inline int register_hw_monitor_info(char *component_name) +{ +} +static inline int add_hw_monitor_info(char *component_name, char *mon_key, char *mon_value) +{ +} +static inline int update_hw_monitor_info(char *component_name, char *mon_key, char *mon_value) +{ +} +static inline int hw_monitor_notifier_register(struct notifier_block *nb) +{ +} +static inline int hw_monitor_notifier_unregister(struct notifier_block *nb) +{ +} +static inline int unregister_hw_monitor_info(char *component_name) +{ +} +#endif + +#endif diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index ebcff46a16086..9ebece687ae61 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -41,6 +41,7 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o arm64-obj-$(CONFIG_KGDB) += kgdb.o +arm64-obj-$(CONFIG_HWCONF_MANAGER) += hwconf_manager.o arm64-obj-$(CONFIG_EFI) += efi.o efi-entry.stub.o arm64-obj-$(CONFIG_PCI) += pci.o arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o @@ -48,6 +49,7 @@ arm64-obj-$(CONFIG_ACPI) += acpi.o arm64-obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o arm64-obj-$(CONFIG_ARM64_ACPI_PARKING_PROTOCOL) += acpi_parking_protocol.o arm64-obj-$(CONFIG_PARAVIRT) += paravirt.o +arm64-obj-$(CONFIG_BOOT_INFO) += bootinfo.o arm64-obj-$(CONFIG_RANDOMIZE_BASE) += kaslr.o arm64-obj-$(CONFIG_HIBERNATION) += hibernate.o hibernate-asm.o arm64-obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o \ diff --git a/arch/arm64/kernel/bootinfo.c b/arch/arm64/kernel/bootinfo.c new file mode 100644 index 0000000000000..b4be9ad64953f --- /dev/null +++ b/arch/arm64/kernel/bootinfo.c @@ -0,0 +1,312 @@ +/* + * bootinfo.c + * + * Copyright (C) 2011 Xiaomi Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PMIC_NUM (16) +static int pmic_v[PMIC_NUM]; +static const char * const poweroff_reasons[POFF_REASON_MAX] = { + [POFF_REASON_EVENT_SOFT] = "soft", + [POFF_REASON_EVENT_PS_HOLD] = "ps_hold", + [POFF_REASON_EVENT_PMIC_WD] = "pmic_wd", + [POFF_REASON_EVENT_GP1_KPD1] = "keypad_reset1", + [POFF_REASON_EVENT_GP2_KPD2] = "keypad_reset2", + [POFF_REASON_EVENT_KPDPWR_AND_RESIN] = "kpdpwr_resin", + [POFF_REASON_EVENT_RESIN_N] = "resin_n", + [POFF_REASON_EVENT_KPDPWR_N] = "kpdpwr_n", + [POFF_REASON_EVENT_RESEVER1] = "resever1", + [POFF_REASON_EVENT_RESEVER2] = "resever2", + [POFF_REASON_EVENT_RESEVER3] = "resever3", + [POFF_REASON_EVENT_CHARGER] = "charger", + [POFF_REASON_EVENT_TFT] = "tft", + [POFF_REASON_EVENT_UVLO] = "uvlo", + [POFF_REASON_EVENT_OTST3] = "otst3", + [POFF_REASON_EVENT_STAGE3] = "stage3", + [POFF_REASON_EVENT_GP_FAULT0] = "gp_fault0", + [POFF_REASON_EVENT_GP_FAULT1] = "gp_fault1", + [POFF_REASON_EVENT_GP_FAULT2] = "gp_fault2", + [POFF_REASON_EVENT_GP_FAULT3] = "gp_fault3", + [POFF_REASON_EVENT_MBG_FAULT] = "mbg_fault", + [POFF_REASON_EVENT_OVLO] = "ovlo", + [POFF_REASON_EVENT_GEN2_UVLO] = "gen2_uvlo", + [POFF_REASON_EVENT_AVDD_RB] = "avdd_rb", + [POFF_REASON_EVENT_RESEVER4] = "resever4", + [POFF_REASON_EVENT_RESEVER5] = "resever5", + [POFF_REASON_EVENT_RESEVER6] = "resever6", + [POFF_REASON_EVENT_FAULT_FAULT_N] = "fault_n", + [POFF_REASON_EVENT_FAULT_PBS_WATCHDOG_TO] = "fault_pbs_watchdog", + [POFF_REASON_EVENT_FAULT_PBS_NACK] = "fault_pbs_nack", + [POFF_REASON_EVENT_FAULT_RESTART_PON] = "fault_restart_pon", + [POFF_REASON_EVENT_GEN2_OTST3] = "otst3", + [POFF_REASON_EVENT_RESEVER7] = "resever7", + [POFF_REASON_EVENT_RESEVER8] = "resever8", + [POFF_REASON_EVENT_RESEVER9] = "resever9", + [POFF_REASON_EVENT_RESEVER10] = "resever10", + [POFF_REASON_EVENT_S3_RESET_FAULT_N] = "s3_reset_fault_n", + [POFF_REASON_EVENT_S3_RESET_PBS_WATCHDOG_TO] = "s3_reset_pbs_watchdog", + [POFF_REASON_EVENT_S3_RESET_PBS_NACK] = "s3_reset_pbs_nack", + [POFF_REASON_EVENT_S3_RESET_KPDPWR_ANDOR_RESIN] = "s3_reset_kpdpwr_andor_resin", +}; + +static const char * const powerup_reasons[PU_REASON_MAX] = { + [PU_REASON_EVENT_KPD] = "keypad", + [PU_REASON_EVENT_RTC] = "rtc", + [PU_REASON_EVENT_CABLE] = "cable", + [PU_REASON_EVENT_SMPL] = "smpl", + [PU_REASON_EVENT_PON1] = "pon1", + [PU_REASON_EVENT_USB_CHG] = "usb_chg", + [PU_REASON_EVENT_DC_CHG] = "dc_chg", + [PU_REASON_EVENT_HWRST] = "hw_reset", + [PU_REASON_EVENT_LPK] = "long_power_key", +}; + +static const char * const reset_reasons[RS_REASON_MAX] = { + [RS_REASON_EVENT_WDOG] = "wdog", + [RS_REASON_EVENT_KPANIC] = "kpanic", + [RS_REASON_EVENT_NORMAL] = "reboot", + [RS_REASON_EVENT_OTHER] = "other", +}; + +static struct kobject *bootinfo_kobj; +static powerup_reason_t powerup_reason; + +#define bootinfo_attr(_name) \ +static struct kobj_attribute _name##_attr = { \ + .attr = { \ + .name = __stringify(_name), \ + .mode = 0644, \ + }, \ + .show = _name##_show, \ + .store = NULL, \ +} + +#define bootinfo_func_init(type, name, initval) \ +static type name = (initval); \ +type get_##name(void) \ +{ \ + return name; \ +} \ +void set_##name(type __##name) \ +{ \ + name = __##name; \ +} + +int is_abnormal_powerup(void) +{ + u32 pu_reason = get_powerup_reason(); + + return (pu_reason & (RESTART_EVENT_KPANIC | RESTART_EVENT_WDOG)) | + (pu_reason & BIT(PU_REASON_EVENT_HWRST) & RESTART_EVENT_OTHER); +} + +static ssize_t powerup_reason_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + char *s = buf; + u32 pu_reason; + int pu_reason_index = PU_REASON_MAX; + u32 reset_reason; + int reset_reason_index = RS_REASON_MAX; + + pu_reason = get_powerup_reason(); + if (((pu_reason & BIT(PU_REASON_EVENT_HWRST)) + && qpnp_pon_is_ps_hold_reset()) || + (pu_reason & BIT(PU_REASON_EVENT_WARMRST))) { + reset_reason = pu_reason >> 16; + reset_reason_index = + find_first_bit((unsigned long *)&reset_reason, + sizeof(reset_reason)*BITS_PER_BYTE); + if (reset_reason_index < RS_REASON_MAX + && reset_reason_index >= 0) { + s += snprintf(s, + strlen(reset_reasons[reset_reason_index]) + 2, + "%s\n", reset_reasons[reset_reason_index]); + pr_debug("%s: rs_reason [0x%x], first non-zero bit %d\n", + __func__, reset_reason, reset_reason_index); + goto out; + }; + } + if (qpnp_pon_is_lpk() && + (pu_reason & BIT(PU_REASON_EVENT_HWRST))) + pu_reason_index = PU_REASON_EVENT_LPK; + else if (pu_reason & BIT(PU_REASON_EVENT_HWRST)) + pu_reason_index = PU_REASON_EVENT_HWRST; + else if (pu_reason & BIT(PU_REASON_EVENT_SMPL)) + pu_reason_index = PU_REASON_EVENT_SMPL; + else if (pu_reason & BIT(PU_REASON_EVENT_RTC)) + pu_reason_index = PU_REASON_EVENT_RTC; + else if (pu_reason & BIT(PU_REASON_EVENT_USB_CHG)) + pu_reason_index = PU_REASON_EVENT_USB_CHG; + else if (pu_reason & BIT(PU_REASON_EVENT_DC_CHG)) + pu_reason_index = PU_REASON_EVENT_DC_CHG; + else if (pu_reason & BIT(PU_REASON_EVENT_KPD)) + pu_reason_index = PU_REASON_EVENT_KPD; + else if (pu_reason & BIT(PU_REASON_EVENT_PON1)) + pu_reason_index = PU_REASON_EVENT_PON1; + if (pu_reason_index < PU_REASON_MAX && pu_reason_index >= 0) { + s += snprintf(s, strlen(powerup_reasons[pu_reason_index]) + 2, + "%s\n", powerup_reasons[pu_reason_index]); + pr_debug("%s: pu_reason [0x%x] index %d\n", + __func__, pu_reason, pu_reason_index); + goto out; + } + s += snprintf(s, 15, "unknown reboot\n"); +out: + return (s - buf); +} + +static ssize_t powerup_reason_details_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + u32 pu_reason; + + pu_reason = get_powerup_reason(); + + return snprintf(buf, 11, "0x%x\n", pu_reason); +} + +void set_poweroff_reason(int pmicv) +{ + int i = 0; + + while (i < PMIC_NUM) { + if (pmic_v[i] != -1) + i++; + else { + pmic_v[i] = pmicv; + break; + } + } +} + +static ssize_t poweroff_reason_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + int i = 0; + int l = 0; + int v = pmic_v[0]; + + if (v == -1) + return snprintf(buf, 10, " unknown \n"); + + while ((i < PMIC_NUM) && (pmic_v[i] != -1)) { + v = pmic_v[i]; + i++; + if (v >= 0 && v < POFF_REASON_MAX) + l += snprintf(buf + l, + (strlen(poweroff_reasons[v]) + 10), + " PNo.%d-%s ", i - 1, poweroff_reasons[v]); + else + l += snprintf(buf + l, 17, " PNo.%d-%s ", i - 1, "unknown"); + } + l += snprintf(buf + l, 2, "\n"); + + return l; +} + +bootinfo_attr(poweroff_reason); +bootinfo_attr(powerup_reason); +bootinfo_attr(powerup_reason_details); +bootinfo_func_init(u32, powerup_reason, 0); + +static struct attribute *g[] = { + &poweroff_reason_attr.attr, + &powerup_reason_attr.attr, + &powerup_reason_details_attr.attr, + NULL, +}; + +static struct attribute_group attr_group = { + .attrs = g, +}; + +static int cpumaxfreq_show(struct seq_file *m, void *v) +{ + /* value is used for setting cpumaxfreq */ + struct cpufreq_policy *policy = NULL; + unsigned int freq = 0; + + policy = cpufreq_cpu_get(7); + if (!policy){ + seq_printf(m, "2.84\n"); + return -EINVAL; + } + + freq = policy->cpuinfo.max_freq; + + pr_err("CpuMaxFreq=%d\n",freq); + if(freq > 2900000) + seq_printf(m, "2.96\n"); + else + seq_printf(m, "2.84\n"); + + return 0; +} + +static int cpumaxfreq_open(struct inode *inode, struct file *file) +{ + return single_open(file, &cpumaxfreq_show, NULL); +} + +static const struct file_operations proc_cpumaxfreq_operations = { + .open = cpumaxfreq_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; + +static int __init bootinfo_init(void) +{ + int ret = -ENOMEM; + + bootinfo_kobj = kobject_create_and_add("bootinfo", NULL); + if (bootinfo_kobj == NULL) { + pr_err("bootinfo_init: subsystem_register failed\n"); + goto fail; + } + + memset(pmic_v, -1, sizeof(pmic_v)); + ret = sysfs_create_group(bootinfo_kobj, &attr_group); + if (ret) { + pr_err("bootinfo_init: subsystem_register failed\n"); + goto sys_fail; + } + proc_create("cpumaxfreq", 0, NULL, &proc_cpumaxfreq_operations); + + return ret; + +sys_fail: + kobject_del(bootinfo_kobj); +fail: + return ret; + +} + +static void __exit bootinfo_exit(void) +{ + if (bootinfo_kobj) { + sysfs_remove_group(bootinfo_kobj, &attr_group); + kobject_del(bootinfo_kobj); + } +} + +core_initcall(bootinfo_init); +module_exit(bootinfo_exit); diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index fa38f3b2cfae0..8762d99304b37 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -729,7 +729,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { }, #endif { - } + }, }; ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, diff --git a/arch/arm64/kernel/hwconf_manager.c b/arch/arm64/kernel/hwconf_manager.c new file mode 100644 index 0000000000000..4d76ec66e1ed3 --- /dev/null +++ b/arch/arm64/kernel/hwconf_manager.c @@ -0,0 +1,524 @@ +/* + * hwconf_manager.c + * + * Copyright (C) 2016 Xiaomi Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct hw_info_manager { + cJSON *hw_config; + cJSON *hw_monitor; + struct crypto_cipher *tfm; + struct kobject *hwconf_kobj; + struct dentry *hwconf_check; + int hw_mon_inited; +}; + +struct hw_info_manager *info_manager; +static RAW_NOTIFIER_HEAD(hw_mon_notifier_list); +static DEFINE_MUTEX(hw_mon_notifier_lock); + +#define INIT_KEY "0123456789" +char crypto_key[32] = INIT_KEY; + +#define __HWINFO_DECRYPT_DEBUG__ 0 + +#define hwconf_attr(_name) \ +static struct kobj_attribute _name##_attr = { \ + .attr = { \ + .name = __stringify(_name), \ + .mode = 0644, \ + }, \ + .show = _name##_show, \ + .store = _name##_store, \ +} + +int add_hw_component_info(char *component_name, char *key, char *value) +{ + cJSON *component; + + if (!info_manager->hw_config) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_config, + component_name); + if (!component) + return -EINVAL; + + if (cJSON_HasObjectItem(component, key)) { + pr_err("%s is added in %s already\n", key, component_name); + return -EINVAL; + } + + cJSON_AddStringToObject(component, key, value); + pr_debug("%s: %s\n", __func__, cJSON_Print(component)); + + return 0; +} +EXPORT_SYMBOL(add_hw_component_info); + +int register_hw_component_info(char *component_name) +{ + cJSON *component; + + if (!info_manager->hw_config) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_config, + component_name); + if (component) { + pr_err("%s is registered already\n", component_name); + return -EINVAL; + } + + component = cJSON_CreateObject(); + cJSON_AddItemToObject(info_manager->hw_config, + component_name, component); + pr_debug("%s: %s\n", __func__, cJSON_Print(component)); + + return 0; +} +EXPORT_SYMBOL(register_hw_component_info); + +int unregister_hw_component_info(char *component_name) +{ + cJSON *component; + + if (!info_manager->hw_config) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_config, + component_name); + if (!component) + return -EINVAL; + + cJSON_DetachItemFromObject(info_manager->hw_config, + component_name); + + return 0; +} +EXPORT_SYMBOL(unregister_hw_component_info); + +int update_hw_monitor_info(char *component_name, char *mon_key, char *mon_value) +{ + cJSON *component; + + if (!info_manager->hw_monitor) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_monitor, + component_name); + if (!component) { + pr_err("No component %s\n", component_name); + return -EINVAL; + } + + if (!cJSON_HasObjectItem(component, mon_key)) { + pr_err("No key %s\n", mon_key); + return -EINVAL; + } + + cJSON_DeleteItemFromObject(component, mon_key); + cJSON_AddStringToObject(component, mon_key, mon_value); + + pr_debug("%s: %s\n", __func__, cJSON_Print(info_manager->hw_monitor)); + + return 0; +} +EXPORT_SYMBOL(update_hw_monitor_info); + +int add_hw_monitor_info(char *component_name, char *mon_key, char *mon_value) +{ + cJSON *component; + + if (!info_manager->hw_monitor) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_monitor, + component_name); + if (!component) + return -EINVAL; + + if (cJSON_HasObjectItem(component, mon_key)) { + pr_err("%s is added in %s already\n", mon_key, component_name); + return -EINVAL; + } + + cJSON_AddStringToObject(component, mon_key, mon_value); + pr_debug("%s: %s\n", __func__, cJSON_Print(component)); + + return 0; +} +EXPORT_SYMBOL(add_hw_monitor_info); + +int register_hw_monitor_info(char *component_name) +{ + cJSON *component; + + if (!info_manager->hw_monitor) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_monitor, + component_name); + if (component) { + pr_err("%s is registered already\n", component_name); + return -EINVAL; + } + + component = cJSON_CreateObject(); + cJSON_AddItemToObject(info_manager->hw_monitor, + component_name, component); + pr_debug("%s: %s\n", __func__, cJSON_Print(component)); + + return 0; +} +EXPORT_SYMBOL(register_hw_monitor_info); + +int unregister_hw_monitor_info(char *component_name) +{ + cJSON *component; + + if (!info_manager->hw_monitor) { + pr_err("hwconfig_manager is still not ready.\n"); + return -EINVAL; + } + + component = cJSON_GetObjectItem(info_manager->hw_monitor, + component_name); + if (!component) + return -EINVAL; + + cJSON_DetachItemFromObject(info_manager->hw_monitor, + component_name); + + return 0; +} +EXPORT_SYMBOL(unregister_hw_monitor_info); + +static ssize_t hw_info_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + memcpy(crypto_key, buf, sizeof(crypto_key)); + + pr_debug("%s crypto_key=%s\n", __func__, crypto_key); + + return count; +} + +#if __HWINFO_DECRYPT_DEBUG__ +static int hw_info_decrypt_test(char *buf, size_t len) +{ + char *dest; + unsigned int blocksize; + int i; + int ret; + + info_manager->tfm = crypto_alloc_cipher("aes", + CRYPTO_ALG_TYPE_BLKCIPHER, CRYPTO_ALG_ASYNC); + if (IS_ERR(info_manager->tfm)) { + pr_err("Failed to load transform for aes mode!\n"); + ret = -EINVAL; + goto out; + } + + ret = crypto_cipher_setkey(info_manager->tfm, crypto_key, + sizeof(crypto_key)); + if (ret) { + pr_err("Failed to setkey\n"); + ret = -EINVAL; + goto free_cipher; + } + + blocksize = crypto_cipher_blocksize(info_manager->tfm); + if (!blocksize) { + ret = -EINVAL; + goto free_cipher; + } + + dest = kzalloc(len, GFP_KERNEL); + if (!dest) { + ret = -ENOMEM; + goto free_cipher; + } + + for (i = 0; i < len; i += blocksize) + crypto_cipher_decrypt_one(info_manager->tfm, + &dest[i], &buf[i]); + + pr_debug("%s: %s\n", __func__, dest); + + kfree(dest); +free_cipher: + crypto_free_cipher(info_manager->tfm); +out: + return ret; +} +#endif + +/* + * Decrypt example using Python: + * + * $ adb shell 'echo "01234567890123456789012345678901" > /sys/hwconf/hw_info' + * $ adb pull /sys/hwconf/hw_info + * 0 KB/s (48 bytes in 0.046s) + * $ ./decrypt.py + * { + * "display": { + * "LCD": "LGD FHD SW43101 VIDEO OLED PANEL" + * } + * } + * + * $ cat decrypt.py + * #!/usr/bin/python + * + * from Crypto.Cipher import AES + * + * fs = open('./hw_info', 'r+') + * key = b'01234567890123456789012345678901' + * dec = AES.new(key, AES.MODE_ECB) + * ciphertext = fs.read() + * print dec.decrypt(ciphertext) + * fs.close() + * + */ +static ssize_t hw_info_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + int ret; + char *src = cJSON_Print(info_manager->hw_config); + int i; + unsigned int blocksize; + char *padding; + int blocks = 0; + + if (!strncmp(crypto_key, INIT_KEY, sizeof(crypto_key))) { + pr_err("crypto_key == INIT_KEY\n"); + return 0; + } + + /* Allocate transform for AES CRYPTO_ALG_TYPE_BLKCIPHER */ + info_manager->tfm = crypto_alloc_cipher("aes", + CRYPTO_ALG_TYPE_BLKCIPHER, CRYPTO_ALG_ASYNC); + if (IS_ERR(info_manager->tfm)) { + pr_err("Failed to load transform for aes mode!\n"); + return 0; + } + + pr_debug("%s crypto_key=%s\n", __func__, crypto_key); + ret = crypto_cipher_setkey(info_manager->tfm, crypto_key, + sizeof(crypto_key)); + if (ret) { + pr_err("Failed to setkey\n"); + crypto_free_cipher(info_manager->tfm); + return 0; + } + + blocksize = crypto_cipher_blocksize(info_manager->tfm); + if (!blocksize) + return 0; + + padding = kmalloc(blocksize + 1, GFP_KERNEL); + if (!padding) + return -ENOMEM; + + /* start encrypt */ + for (i = 0; i < strlen(src); i += blocksize) { + memset(padding, 0, blocksize + 1); + strlcpy(padding, &src[i], blocksize + 1); + crypto_cipher_encrypt_one(info_manager->tfm, + &buf[i], padding); + blocks++; + } + + kfree(padding); + crypto_free_cipher(info_manager->tfm); + +#if __HWINFO_DECRYPT_DEBUG__ + hw_info_decrypt_test(buf, blocks * blocksize); +#endif + + return blocks * blocksize; +} + +static ssize_t hw_mon_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int on = 99; + char component_name[32] = { 0 }; + int len; + + len = sscanf(buf, "%s %d", component_name, &on); + + pr_debug("%s component_name=%s, on=%d\n", __func__, component_name, on); + + if (on == 0) + unregister_hw_monitor_info(component_name); + + return count; +} + +static ssize_t hw_mon_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + mutex_lock(&hw_mon_notifier_lock); + raw_notifier_call_chain(&hw_mon_notifier_list, + 0, NULL); + mutex_unlock(&hw_mon_notifier_lock); + return snprintf(buf, PAGE_SIZE, "%s\n", + cJSON_Print(info_manager->hw_monitor)); +} + +hwconf_attr(hw_info); +hwconf_attr(hw_mon); + +static struct attribute *g[] = { + &hw_info_attr.attr, + &hw_mon_attr.attr, + NULL, +}; + +static struct attribute_group attr_group = { + .attrs = g, +}; + +static int hwconf_debugfs_get(void *data, u64 *val) +{ + pr_debug("hw_config:\n%s\n", cJSON_Print(info_manager->hw_config)); + pr_debug("hw_monitor:\n%s\n", cJSON_Print(info_manager->hw_monitor)); + *val = 0; + return 0; +} + +static int hwconf_debugfs_set(void *data, u64 val) +{ + if (val == 1) { + register_hw_component_info("debugfs_hwconf"); + add_hw_component_info("debugfs_hwconf", "key1", "value1"); + + register_hw_monitor_info("debugfs_hwmon"); + add_hw_monitor_info("debugfs_hwmon", "key2", "value2"); + } else if (val == 2) { + update_hw_monitor_info("debugfs_hwmon", "key2", "value3"); + } else if (val == 3) { + unregister_hw_component_info("debugfs_hwconf"); + unregister_hw_monitor_info("debugfs_hwmon"); + } + return 0; +} +DEFINE_SIMPLE_ATTRIBUTE(hwconf_check_fops, hwconf_debugfs_get, + hwconf_debugfs_set, "%llu\n"); + +int hw_monitor_notifier_register(struct notifier_block *nb) +{ + int ret; + + if (!nb || !info_manager->hw_mon_inited) + return -EINVAL; + mutex_lock(&hw_mon_notifier_lock); + ret = raw_notifier_chain_register(&hw_mon_notifier_list, nb); + if (info_manager->hw_mon_inited) + nb->notifier_call(nb, 0, NULL); + mutex_unlock(&hw_mon_notifier_lock); + return ret; +} +EXPORT_SYMBOL(hw_monitor_notifier_register); + +int hw_monitor_notifier_unregister(struct notifier_block *nb) +{ + int ret; + + if (!nb || !info_manager->hw_mon_inited) + return -EINVAL; + mutex_lock(&hw_mon_notifier_lock); + ret = raw_notifier_chain_unregister(&hw_mon_notifier_list, + nb); + mutex_unlock(&hw_mon_notifier_lock); + return ret; +} +EXPORT_SYMBOL(hw_monitor_notifier_unregister); + +static int __init hwconf_init(void) +{ + int ret = -ENOMEM; + + info_manager = kmalloc(sizeof(struct hw_info_manager), GFP_KERNEL); + if (!info_manager) + return ret; + memset(info_manager, 0, sizeof(struct hw_info_manager)); + info_manager->hw_config = cJSON_CreateObject(); + info_manager->hw_monitor = cJSON_CreateObject(); + + info_manager->hwconf_kobj = kobject_create_and_add("hwconf", NULL); + if (!info_manager->hwconf_kobj) { + pr_err("hwconf_init: subsystem_register failed\n"); + goto fail; + } + + ret = sysfs_create_group(info_manager->hwconf_kobj, &attr_group); + if (ret) { + pr_err("hwconf_init: subsystem_register failed\n"); + goto sys_fail; + } + + info_manager->hwconf_check = debugfs_create_file("hwconf_check", + 0644, NULL, NULL, &hwconf_check_fops); + + info_manager->hw_mon_inited = 1; + + return ret; + +sys_fail: + kobject_del(info_manager->hwconf_kobj); +fail: + cJSON_Delete(info_manager->hw_config); + cJSON_Delete(info_manager->hw_monitor); + kfree(info_manager); + + return ret; +} + +static void __exit hwconf_exit(void) +{ + cJSON_Delete(info_manager->hw_config); + cJSON_Delete(info_manager->hw_monitor); + + if (info_manager->hwconf_kobj) { + sysfs_remove_group(info_manager->hwconf_kobj, &attr_group); + kobject_del(info_manager->hwconf_kobj); + } + debugfs_remove(info_manager->hwconf_check); + kfree(info_manager); +} + +core_initcall(hwconf_init); +module_exit(hwconf_exit); diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 6332b164ffdbd..90348466e26a3 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -65,6 +65,15 @@ #include #include #include +#include + +#ifdef CONFIG_OF_FLATTREE +void __init early_init_dt_setup_pureason_arch(unsigned long pu_reason) +{ + set_powerup_reason(pu_reason); + pr_info("Powerup reason=0x%x\n", get_powerup_reason()); +} +#endif phys_addr_t __fdt_pointer __initdata; diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c old mode 100644 new mode 100755 index 512d20ec3b1fd..2ddf37d52545e --- a/arch/arm64/kernel/stacktrace.c +++ b/arch/arm64/kernel/stacktrace.c @@ -197,3 +197,66 @@ void save_stack_trace(struct stack_trace *trace) EXPORT_SYMBOL_GPL(save_stack_trace); #endif + +#ifdef CONFIG_USER_STACKTRACE_SUPPORT + +#include + +struct stack_frame_user { + const void __user *next_fp; + unsigned long lr; +}; + +static int +copy_stack_frame_user(const void __user *fp, struct stack_frame_user *frame) +{ + int ret; + + if (!access_ok(VERIFY_READ, fp, sizeof(*frame))) + return 0; + + ret = 1; + pagefault_disable(); + if (__copy_from_user_inatomic(frame, fp, sizeof(*frame))) + ret = 0; + pagefault_enable(); + + return ret; +} + +static inline void __save_stack_trace_user(struct stack_trace *trace) +{ + const struct pt_regs *regs = task_pt_regs(current); + const void __user *fp = (const void __user *)regs->regs[29]; + + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = regs->pc; + + while (trace->nr_entries < trace->max_entries) { + struct stack_frame_user frame; + + frame.next_fp = NULL; + frame.lr = 0; + if (!copy_stack_frame_user(fp, &frame)) + break; + + if ((unsigned long)fp < regs->sp) + break; + if (frame.lr) { + trace->entries[trace->nr_entries++] = frame.lr; + } + fp = frame.next_fp; + } +} + +void save_stack_trace_user(struct stack_trace *trace) +{ + if (current->mm) { + __save_stack_trace_user(trace); + + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; + } +} +EXPORT_SYMBOL_GPL(save_stack_trace_user); +#endif diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index c5af4257a8b1a..f97247fb33af7 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -52,6 +52,7 @@ #include #include #include +#include static const char *handler[]= { "Synchronous Abort", @@ -62,6 +63,7 @@ static const char *handler[]= { int show_unhandled_signals = 0; + static void dump_backtrace_entry(unsigned long where) { printk(" %pS\n", (void *)where); @@ -119,6 +121,9 @@ void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) if (!tsk) tsk = current; + if (tsk->state == TASK_DEAD) + return; + if (!try_get_task_stack(tsk)) return; @@ -158,6 +163,11 @@ void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) tsk->comm); break; } + /* do not dump_backtrace current task on other cpu, frame is the last info */ + if (tsk != current && tsk->on_cpu == 1) { + printk("The task:%s is running on other cpu currently!\n", tsk->comm); + break; + } /* skip until specified stack frame */ if (!skip) { dump_backtrace_entry(frame.pc); @@ -218,6 +228,26 @@ static int __die(const char *str, int err, struct pt_regs *regs) static DEFINE_RAW_SPINLOCK(die_lock); +#define FS_SYNC_TIMEOUT_MS 2000 +static struct work_struct fs_sync_work; +static DECLARE_COMPLETION(sync_compl); +static void fs_sync_work_func(struct work_struct *work) +{ + pr_emerg("sys_sync:syncing fs\n"); + sys_sync(); + complete(&sync_compl); +} + +void exec_fs_sync_work(void) +{ + INIT_WORK(&fs_sync_work, fs_sync_work_func); + reinit_completion(&sync_compl); + schedule_work(&fs_sync_work); + if (wait_for_completion_timeout(&sync_compl, msecs_to_jiffies(FS_SYNC_TIMEOUT_MS)) == 0) + pr_emerg("sys_sync:wait complete timeout\n"); +} +EXPORT_SYMBOL(exec_fs_sync_work); + /* * This function is protected against re-entrancy. */ @@ -226,6 +256,11 @@ void die(const char *str, struct pt_regs *regs, int err) int ret; unsigned long flags; + if (!in_atomic()) + { + pr_emerg("sys_sync:try sys sync in die\n"); + exec_fs_sync_work(); + } raw_spin_lock_irqsave(&die_lock, flags); oops_enter(); diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c index a8103a84b4ac4..20413b53a959f 100644 --- a/arch/sparc/mm/fault_32.c +++ b/arch/sparc/mm/fault_32.c @@ -36,6 +36,22 @@ int show_unhandled_signals = 1; +#define ODD_ERROR_MASK 0xFF00 +#define ODD_QPNP_MASK 0xF +static void odd_crash_set_qpnp(unsigned long address) +{ + unsigned long tem = (address >> 40) & 0xFFFFFF; + if ((tem & ODD_ERROR_MASK) == ODD_ERROR_MASK && (tem & 0xFF00FF) != 0xFF00FF) { + int reg = qpnp_pon_uvlo_get(ODD_QPNP_MASK); + if (reg > 11 && reg < 10) { + reg = 11; + } else if(reg == 11) { + reg--; + } + qpnp_pon_uvlo_set(reg, ODD_QPNP_MASK); + } +} + static void __noreturn unhandled_fault(unsigned long address, struct task_struct *tsk, struct pt_regs *regs) @@ -46,6 +62,8 @@ static void __noreturn unhandled_fault(unsigned long address, } else { printk(KERN_ALERT "Unable to handle kernel paging request at virtual address %08lx\n", address); + /*when ddr odd crashed*/ + odd_crash_set_qpnp(address); } printk(KERN_ALERT "tsk->{mm,active_mm}->context = %08lx\n", (tsk->mm ? tsk->mm->context : tsk->active_mm->context)); diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index d2ef967bfafb6..a07b09f68e7ee 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -414,28 +414,20 @@ static __always_inline void __speculation_ctrl_update(unsigned long tifp, u64 msr = x86_spec_ctrl_base; bool updmsr = false; - /* - * If TIF_SSBD is different, select the proper mitigation - * method. Note that if SSBD mitigation is disabled or permanentely - * enabled this branch can't be taken because nothing can set - * TIF_SSBD. - */ - if (tif_diff & _TIF_SSBD) { - if (static_cpu_has(X86_FEATURE_VIRT_SSBD)) { + /* Handle change of TIF_SSBD depending on the mitigation method. */ + if (static_cpu_has(X86_FEATURE_VIRT_SSBD)) { + if (tif_diff & _TIF_SSBD) amd_set_ssb_virt_state(tifn); - } else if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD)) { + } else if (static_cpu_has(X86_FEATURE_LS_CFG_SSBD)) { + if (tif_diff & _TIF_SSBD) amd_set_core_ssb_state(tifn); - } else if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) || - static_cpu_has(X86_FEATURE_AMD_SSBD)) { - msr |= ssbd_tif_to_spec_ctrl(tifn); - updmsr = true; - } + } else if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) || + static_cpu_has(X86_FEATURE_AMD_SSBD)) { + updmsr |= !!(tif_diff & _TIF_SSBD); + msr |= ssbd_tif_to_spec_ctrl(tifn); } - /* - * Only evaluate TIF_SPEC_IB if conditional STIBP is enabled, - * otherwise avoid the MSR write. - */ + /* Only evaluate TIF_SPEC_IB if conditional STIBP is enabled. */ if (IS_ENABLED(CONFIG_SMP) && static_branch_unlikely(&switch_to_cond_stibp)) { updmsr |= !!(tif_diff & _TIF_SPEC_IB); diff --git a/block/blk-core.c b/block/blk-core.c index e601daa1a1fb4..c7ba1f500d95d 100644 --- a/block/blk-core.c +++ b/block/blk-core.c @@ -406,7 +406,9 @@ inline void __blk_run_queue_uncond(struct request_queue *q) * can wait until all these request_fn calls have finished. */ q->request_fn_active++; + preempt_disable(); q->request_fn(q); + preempt_enable(); q->request_fn_active--; } EXPORT_SYMBOL_GPL(__blk_run_queue_uncond); diff --git a/block/elevator.c b/block/elevator.c index 8320d97240bec..024fb2bcd5e82 100644 --- a/block/elevator.c +++ b/block/elevator.c @@ -639,6 +639,7 @@ void elv_drain_elevator(struct request_queue *q) void __elv_add_request(struct request_queue *q, struct request *rq, int where) { + struct list_head *entry; trace_block_rq_insert(q, rq); blk_pm_add_request(q, rq); @@ -660,7 +661,29 @@ void __elv_add_request(struct request_queue *q, struct request *rq, int where) case ELEVATOR_INSERT_REQUEUE: case ELEVATOR_INSERT_FRONT: rq->rq_flags |= RQF_SOFTBARRIER; - list_add(&rq->queuelist, &q->queue_head); + entry = &q->queue_head; + #ifdef CONFIG_PM + /* + * PM requests always stay in front, otherwise they can be + * starved by non-PM requests whose RQF_SOFTBARRIER flag is + * set, see elv_next_request(). + */ + if (rq->q->dev && !(rq->rq_flags & RQF_PM)) { + list_for_each(entry, &q->queue_head) { + struct request *pos = list_entry_rq(entry); + + /* Found the first non-PM request */ + if (!(pos->rq_flags & RQF_PM)) { + entry = entry->prev; + break; + } + + if (list_is_last(entry, &q->queue_head)) + break; + } + } + #endif + list_add(&rq->queuelist, entry); break; case ELEVATOR_INSERT_BACK: diff --git a/disable_dbgfs.sh b/disable_dbgfs.sh index fe23680972a5d..6b0edcf0e0657 100755 --- a/disable_dbgfs.sh +++ b/disable_dbgfs.sh @@ -4,26 +4,35 @@ # disable debugfs for user builds export MAKE_ARGS=$@ -if [ ${DISABLE_DEBUGFS} == "true" ]; then - echo "build variant ${TARGET_BUILD_VARIANT}" - if [ ${TARGET_BUILD_VARIANT} == "user" ] && \ - [ ${ARCH} == "arm64" ]; then - echo "combining fragments for user build" - (cd $KERNEL_DIR && \ - ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\ - ./scripts/kconfig/merge_config.sh \ - ./arch/${ARCH}/configs/$DEFCONFIG \ - ./arch/${ARCH}/configs/vendor/debugfs.config - make ${MAKE_ARGS} ARCH=${ARCH} \ - CROSS_COMPILE=${CROSS_COMPILE} savedefconfig - mv defconfig ./arch/${ARCH}/configs/$DEFCONFIG - rm .config) - else - if [[ ${DEFCONFIG} == *"perf_defconfig" ]] && \ +echo "Enable debugfs baseon ENABLE_DEBUG_FS:'$ENABLE_DEBUG_FS'" +if [ ${ENABLE_DEBUG_FS} == "true" ]; then + echo "Overriding kernel config with CONFIG_DEBUG_FS=y to '$DEFCONFIG'"; \ + echo -e "\n#KERNEL_CONFIG_OVERRIDE_DEBUG_FS\n" >> ${KERNEL_DIR}/arch/${ARCH}/configs/$DEFCONFIG; \ + echo "CONFIG_DEBUG_FS=y" >> ${KERNEL_DIR}/arch/${ARCH}/configs/$DEFCONFIG; \ + echo -e "\n" >> ${KERNEL_DIR}/arch/${ARCH}/configs/$DEFCONFIG; +else + + if [ ${DISABLE_DEBUGFS} == "true" ]; then + echo "build variant ${TARGET_BUILD_VARIANT}" + if [ ${TARGET_BUILD_VARIANT} == "user" ] && \ [ ${ARCH} == "arm64" ]; then - echo "resetting perf defconfig" - (cd ${KERNEL_DIR} && \ - git checkout arch/$ARCH/configs/$DEFCONFIG) + echo "combining fragments for user build" + (cd $KERNEL_DIR && \ + ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE}\ + ./scripts/kconfig/merge_config.sh \ + ./arch/${ARCH}/configs/$DEFCONFIG \ + ./arch/${ARCH}/configs/vendor/debugfs.config + make ${MAKE_ARGS} ARCH=${ARCH} \ + CROSS_COMPILE=${CROSS_COMPILE} savedefconfig + mv defconfig ./arch/${ARCH}/configs/$DEFCONFIG + rm .config) + else + if [[ ${DEFCONFIG} == *"perf_defconfig" ]] && \ + [ ${ARCH} == "arm64" ]; then + echo "resetting perf defconfig" + (cd ${KERNEL_DIR} && \ + git checkout arch/$ARCH/configs/$DEFCONFIG) + fi fi fi fi diff --git a/drivers/Kconfig b/drivers/Kconfig index 43377a3acb970..673f6a1f6ac4d 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -225,4 +225,8 @@ source "drivers/sensors/Kconfig" source "drivers/esoc/Kconfig" +source "drivers/halls/Kconfig" + +source "drivers/trusty/Kconfig" + endmenu diff --git a/drivers/Makefile b/drivers/Makefile index 4a067525bbdc4..ca8275dd8884e 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -188,6 +188,8 @@ obj-$(CONFIG_TEE) += tee/ obj-$(CONFIG_MULTIPLEXER) += mux/ obj-$(CONFIG_SENSORS_SSC) += sensors/ obj-$(CONFIG_ESOC) += esoc/ +obj-$(CONFIG_HALLS) += halls/ +obj-$(CONFIG_TRUSTY) += trusty/ # GNSS driver obj-$(CONFIG_GNSS_SIRF) += gnsssirf/ obj-$(CONFIG_GNSS) += gnss/ diff --git a/drivers/android/binder.c b/drivers/android/binder.c index 7bd038edc1f77..2298416da9140 100644 --- a/drivers/android/binder.c +++ b/drivers/android/binder.c @@ -71,7 +71,7 @@ #include #include #include - +#include #include #include #include "binder_alloc.h" @@ -1227,7 +1227,11 @@ static void binder_transaction_priority(struct task_struct *task, t->saved_priority.prio = task->normal_prio; if (!inherit_rt && is_rt_policy(desired_prio.sched_policy)) { - desired_prio.prio = NICE_TO_PRIO(0); + // MIUI MOD: + // We boost some app process to FIFO, but binder out thread + // from fifo has low priority, so we modify priority higher. + // desired_prio.prio = NICE_TO_PRIO(0); + desired_prio.prio = NICE_TO_PRIO(-10); desired_prio.sched_policy = SCHED_NORMAL; } @@ -4641,8 +4645,15 @@ static struct binder_thread *binder_get_thread(struct binder_proc *proc) static void binder_free_proc(struct binder_proc *proc) { + struct binder_device *device; + BUG_ON(!list_empty(&proc->todo)); BUG_ON(!list_empty(&proc->delivered_death)); + device = container_of(proc->context, struct binder_device, context); + if (refcount_dec_and_test(&device->ref)) { + kfree(proc->context->name); + kfree(device); + } binder_alloc_deferred_release(&proc->alloc); put_task_struct(proc->tsk); binder_stats_deleted(BINDER_STAT_PROC); @@ -4971,7 +4982,9 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) switch (cmd) { case BINDER_WRITE_READ: + delayacct_binder_start(); ret = binder_ioctl_write_read(filp, cmd, arg, thread); + delayacct_binder_end(); if (ret) goto err; break; @@ -5370,7 +5383,6 @@ static int binder_node_release(struct binder_node *node, int refs) static void binder_deferred_release(struct binder_proc *proc) { struct binder_context *context = proc->context; - struct binder_device *device; struct rb_node *n; int threads, nodes, incoming_refs, outgoing_refs, active_transactions; @@ -5389,12 +5401,6 @@ static void binder_deferred_release(struct binder_proc *proc) context->binder_context_mgr_node = NULL; } mutex_unlock(&context->context_mgr_node_lock); - device = container_of(proc->context, struct binder_device, context); - if (refcount_dec_and_test(&device->ref)) { - kfree(context->name); - kfree(device); - } - proc->context = NULL; binder_inner_proc_lock(proc); /* * Make sure proc stays alive after we diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c index 880affe45b079..8c24f618a712e 100644 --- a/drivers/android/binder_alloc.c +++ b/drivers/android/binder_alloc.c @@ -219,6 +219,11 @@ static int binder_update_page_range(struct binder_alloc *alloc, int allocate, if (mm) { down_read(&mm->mmap_sem); + if (!mmget_still_valid(mm)) { + if (allocate == 0) + goto free_range; + goto err_no_vma; + } vma = alloc->vma; } diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index 364181591f77d..e434c7e759add 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -382,6 +382,8 @@ static void fw_free_buf(struct firmware_buf *buf) static char fw_path_para[256]; static const char * const fw_path[] = { fw_path_para, + "/system/vendor/firmware", + "/system/etc/firmware", "/lib/firmware/updates/" UTS_RELEASE, "/lib/firmware/updates", "/lib/firmware/" UTS_RELEASE, diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c index db2a02b8b54ab..2db4b0932bc7b 100644 --- a/drivers/base/power/wakeup.c +++ b/drivers/base/power/wakeup.c @@ -22,7 +22,7 @@ #include #include #include - +#include #include "power.h" #ifndef CONFIG_SUSPEND @@ -156,7 +156,7 @@ static void wakeup_source_record(struct wakeup_source *ws) unsigned long flags; spin_lock_irqsave(&deleted_ws.lock, flags); - + printk("the delete ws is %s\n", ws->name); if (ws->event_count) { deleted_ws.total_time = ktime_add(deleted_ws.total_time, ws->total_time); @@ -588,6 +588,7 @@ static void wakeup_source_activate(struct wakeup_source *ws) ws->active = true; ws->active_count++; ws->last_time = ktime_get(); + scnprintf(ws->comm, TASK_COMM_LEN, current->comm); if (ws->autosleep_enabled) ws->start_prevent_time = ws->last_time; @@ -875,7 +876,7 @@ void pm_get_active_wakeup_sources(char *pending_wakeup_source, size_t max) len += scnprintf(pending_wakeup_source, max, "Pending Wakeup Sources: "); len += scnprintf(pending_wakeup_source + len, max - len, - "%s ", ws->name); + "%s, handle process %s", ws->name, ws->comm); active = true; } else if (!active && (!last_active_ws || @@ -886,8 +887,8 @@ void pm_get_active_wakeup_sources(char *pending_wakeup_source, size_t max) } if (!active && last_active_ws) { scnprintf(pending_wakeup_source, max, - "Last active Wakeup Source: %s", - last_active_ws->name); + "Last active Wakeup Source: %s, handle process %s", + last_active_ws->name, last_active_ws->comm); } srcu_read_unlock(&wakeup_srcu, srcuidx); } @@ -902,7 +903,7 @@ void pm_print_active_wakeup_sources(void) srcuidx = srcu_read_lock(&wakeup_srcu); list_for_each_entry_rcu(ws, &wakeup_sources, entry) { if (ws->active) { - pr_debug("active wakeup source: %s\n", ws->name); + pr_info("active wakeup source: %s, handle process %s\n", ws->name, ws->comm); active = 1; } else if (!active && (!last_activity_ws || @@ -913,8 +914,8 @@ void pm_print_active_wakeup_sources(void) } if (!active && last_activity_ws) - pr_debug("last active wakeup source: %s\n", - last_activity_ws->name); + pr_info("last active wakeup source: %s, handle process %s\n", + last_activity_ws->name, last_activity_ws->comm); srcu_read_unlock(&wakeup_srcu, srcuidx); } EXPORT_SYMBOL_GPL(pm_print_active_wakeup_sources); @@ -927,6 +928,7 @@ EXPORT_SYMBOL_GPL(pm_print_active_wakeup_sources); * since the old value was stored. Also return true if the current number of * wakeup events being processed is different from zero. */ +bool wakeup_irq_abort_suspend; bool pm_wakeup_pending(void) { unsigned long flags; @@ -956,6 +958,7 @@ bool pm_wakeup_pending(void) void pm_system_wakeup(void) { atomic_inc(&pm_abort_suspend); + wakeup_irq_abort_suspend = true; s2idle_wake(); } EXPORT_SYMBOL_GPL(pm_system_wakeup); @@ -968,6 +971,7 @@ void pm_system_cancel_wakeup(void) void pm_wakeup_clear(bool reset) { pm_wakeup_irq = 0; + wakeup_irq_abort_suspend = false; if (reset) atomic_set(&pm_abort_suspend, 0); } @@ -991,6 +995,7 @@ void pm_system_irq_wakeup(unsigned int irq_number) } pm_wakeup_irq = irq_number; pm_system_wakeup(); + log_irq_wakeup_reason(irq_number); } } @@ -1135,32 +1140,75 @@ static int print_wakeup_source_stats(struct seq_file *m, return 0; } +static void *wakeup_sources_stats_seq_start(struct seq_file *m, loff_t *pos) +{ + struct wakeup_source *ws; + loff_t n = *pos; + int *srcuidx = m->private; + + if(n == 0) { + seq_puts(m, "name\t\tactive_count\tevent_count\twakeup_count\t" + "expire_count\tactive_since\ttotal_time\tmax_time\t" + "last_change\tprevent_suspend_time\n"); + } + + *srcuidx = srcu_read_lock(&wakeup_srcu); + list_for_each_entry_rcu(ws, &wakeup_sources, entry) { + if (n-- <= 0) + return ws; + } + + return NULL; +} + +static void *wakeup_sources_stats_seq_next(struct seq_file *m, void *v, loff_t *pos) +{ + struct wakeup_source *ws = v; + struct wakeup_source *next_ws = NULL; + + ++(*pos); + + list_for_each_entry_continue_rcu(ws, &wakeup_sources, entry) { + next_ws = ws; + break; + } + + return next_ws; +} + +static void wakeup_sources_stats_seq_stop(struct seq_file *m, void *v) +{ + int *srcuidx = m->private; + + srcu_read_unlock(&wakeup_srcu, *srcuidx); +} + /** * wakeup_sources_stats_show - Print wakeup sources statistics information. * @m: seq_file to print the statistics into. + * @v: wakeup_source of each iteration */ -static int wakeup_sources_stats_show(struct seq_file *m, void *unused) +static int wakeup_sources_stats_seq_show(struct seq_file *m, void *v) { - struct wakeup_source *ws; - int srcuidx; + struct wakeup_source *ws = v; - seq_puts(m, "name\t\t\t\t\tactive_count\tevent_count\twakeup_count\t" - "expire_count\tactive_since\ttotal_time\tmax_time\t" - "last_change\tprevent_suspend_time\n"); - - srcuidx = srcu_read_lock(&wakeup_srcu); - list_for_each_entry_rcu(ws, &wakeup_sources, entry) - print_wakeup_source_stats(m, ws); - srcu_read_unlock(&wakeup_srcu, srcuidx); + print_wakeup_source_stats(m, ws); print_wakeup_source_stats(m, &deleted_ws); return 0; } +static const struct seq_operations wakeup_sources_stats_seq_ops = { + .start = wakeup_sources_stats_seq_start, + .next = wakeup_sources_stats_seq_next, + .stop = wakeup_sources_stats_seq_stop, + .show = wakeup_sources_stats_seq_show, +}; + static int wakeup_sources_stats_open(struct inode *inode, struct file *file) { - return single_open(file, wakeup_sources_stats_show, NULL); + return seq_open_private(file, &wakeup_sources_stats_seq_ops, sizeof(int)); } static const struct file_operations wakeup_sources_stats_fops = { @@ -1168,7 +1216,7 @@ static const struct file_operations wakeup_sources_stats_fops = { .open = wakeup_sources_stats_open, .read = seq_read, .llseek = seq_lseek, - .release = single_release, + .release = seq_release_private, }; static int __init wakeup_sources_debugfs_init(void) diff --git a/drivers/base/syscore.c b/drivers/base/syscore.c index 96c34a95cc625..653e57ecc0f4f 100644 --- a/drivers/base/syscore.c +++ b/drivers/base/syscore.c @@ -46,17 +46,25 @@ EXPORT_SYMBOL_GPL(unregister_syscore_ops); * * This function is executed with one CPU on-line and disabled interrupts. */ +extern bool wakeup_irq_abort_suspend; int syscore_suspend(void) { struct syscore_ops *ops; int ret = 0; + char suspend_abort[MAX_SUSPEND_ABORT_LEN]; trace_suspend_resume(TPS("syscore_suspend"), 0, true); pr_debug("Checking wakeup interrupts\n"); /* Return error code if there are any wakeup interrupts pending. */ - if (pm_wakeup_pending()) + if (pm_wakeup_pending()) { + if (wakeup_irq_abort_suspend == false) { + pm_get_active_wakeup_sources(suspend_abort, MAX_SUSPEND_ABORT_LEN); + log_suspend_abort_reason(suspend_abort); + } + pr_err("PM: Abort system core suspend, wakeup interrupt or wakeup source detected"); return -EBUSY; + } WARN_ONCE(!irqs_disabled(), "Interrupts enabled before system core suspend.\n"); diff --git a/drivers/bus/mhi/devices/mhi_netdev.c b/drivers/bus/mhi/devices/mhi_netdev.c index 735de1daa0c6f..5574fd16accf1 100644 --- a/drivers/bus/mhi/devices/mhi_netdev.c +++ b/drivers/bus/mhi/devices/mhi_netdev.c @@ -913,6 +913,7 @@ static void mhi_netdev_create_debugfs(struct mhi_netdev *mhi_netdev) debugfs_create_file_unsafe("stats", 0444, mhi_netdev->dentry, mhi_netdev, &debugfs_stats); + debugfs_create_file_unsafe("chain", 0444, mhi_netdev->dentry, mhi_netdev, &debugfs_chain); } diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index b92228b9851d6..131bd231be40b 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -633,6 +633,10 @@ config MSM_RDBG for a debugger running on a host PC to communicate with a remote stub running on peripheral subsystems such as the ADSP, MODEM etc. +config XLOGCHAR + tristate "xlogchar driver" + help + Implements a high performance log driver endmenu config OKL4_PIPE diff --git a/drivers/char/Makefile b/drivers/char/Makefile index f97b5c968555d..8972180d9f3e8 100644 --- a/drivers/char/Makefile +++ b/drivers/char/Makefile @@ -80,3 +80,4 @@ obj-$(CONFIG_VSERVICES_SERIAL_CLIENT) += vs_serial_client.o CFLAGS_vs_serial_client.o += -Werror obj-$(CONFIG_VSERVICES_SERIAL_SERVER) += vs_serial_server.o CFLAGS_vs_serial_server.o += -Werror +obj-$(CONFIG_XLOGCHAR) += xlogchar.o diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c old mode 100644 new mode 100755 index d846f2cd1a6a4..d6d000370e63c --- a/drivers/char/adsprpc.c +++ b/drivers/char/adsprpc.c @@ -4222,15 +4222,16 @@ static int fastrpc_probe(struct platform_device *pdev) if (range.addr && !of_property_read_bool(dev->of_node, "restrict-access")) { int srcVM[1] = {VMID_HLOS}; - int destVM[3] = {VMID_HLOS, VMID_SSC_Q6, + int destVM[4] = {VMID_HLOS, VMID_MSS_MSA, VMID_SSC_Q6, VMID_ADSP_Q6}; - int destVMperm[3] = {PERM_READ | PERM_WRITE | PERM_EXEC, + int destVMperm[4] = {PERM_READ | PERM_WRITE | PERM_EXEC, + PERM_READ | PERM_WRITE | PERM_EXEC, PERM_READ | PERM_WRITE | PERM_EXEC, PERM_READ | PERM_WRITE | PERM_EXEC, }; VERIFY(err, !hyp_assign_phys(range.addr, range.size, - srcVM, 1, destVM, destVMperm, 3)); + srcVM, 1, destVM, destVMperm, 4)); if (err) goto bail; me->range.addr = range.addr; diff --git a/drivers/char/adsprpc_compat.c b/drivers/char/adsprpc_compat.c old mode 100644 new mode 100755 diff --git a/drivers/char/adsprpc_shared.h b/drivers/char/adsprpc_shared.h old mode 100644 new mode 100755 diff --git a/drivers/char/diag/diag_dci.c b/drivers/char/diag/diag_dci.c index 25a1706b6508c..e15cf40140e46 100644 --- a/drivers/char/diag/diag_dci.c +++ b/drivers/char/diag/diag_dci.c @@ -1070,11 +1070,15 @@ void extract_dci_pkt_rsp(unsigned char *buf, int len, int data_source, * the rsp is the rsp length (write_len) + dci response packet header * length (sizeof(struct diag_dci_pkt_rsp_header_t)) */ + if (rsp_buf->data_len > rsp_buf->capacity) { + rsp_buf->capacity = rsp_buf->data_len; + } + if ((rsp_buf->data_len + header_len + rsp_len) > rsp_buf->capacity) { pr_alert("diag: create capacity for pkt rsp\n"); temp_buf = vzalloc(rsp_buf->capacity + header_len + rsp_len); if (!temp_buf) { - pr_err("diag: DCI realloc failed\n"); + pr_err("diag: DCI vzalloc failed\n"); mutex_unlock(&rsp_buf->data_mutex); mutex_unlock(&entry->buffers[data_source].buf_mutex); mutex_unlock(&driver->dci_mutex); diff --git a/drivers/char/diag/diagfwd_cntl.c b/drivers/char/diag/diagfwd_cntl.c index 15801eb2d8aa6..7b386f9cad35d 100644 --- a/drivers/char/diag/diagfwd_cntl.c +++ b/drivers/char/diag/diagfwd_cntl.c @@ -1142,6 +1142,8 @@ void diag_real_time_work_fn(struct work_struct *work) if (peripheral > NUM_PERIPHERALS) peripheral = diag_search_peripheral_by_pd(i); + if (peripheral < 0 || peripheral > NUM_PERIPHERALS) + continue; if (peripheral < 0 || peripheral >= NUM_PERIPHERALS) continue; diff --git a/drivers/char/diag/diagfwd_mhi.c b/drivers/char/diag/diagfwd_mhi.c index a5c3832f46f3a..0654e5d895e2e 100644 --- a/drivers/char/diag/diagfwd_mhi.c +++ b/drivers/char/diag/diagfwd_mhi.c @@ -240,7 +240,6 @@ static int __mhi_close(struct diag_mhi_info *mhi_info, int close_flag) cancel_work(&mhi_info->read_work); cancel_work(&mhi_info->read_done_work); flush_workqueue(mhi_info->mhi_wq); - if (close_flag == CLOSE_CHANNELS) { mutex_lock(&mhi_info->ch_mutex); DIAG_LOG(DIAG_DEBUG_MHI, diff --git a/drivers/char/xlogchar.c b/drivers/char/xlogchar.c new file mode 100644 index 0000000000000..b3d7c45c70dc2 --- /dev/null +++ b/drivers/char/xlogchar.c @@ -0,0 +1,231 @@ +/* Copyright (C) 2018 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "xlogchar.h" + +static struct xlogchar_dev *xlogdriver; + +static int xlogchar_open(struct inode *inode, struct file *file) +{ + return 0; +} + +static int xlogchar_close(struct inode *inode, struct file *file) +{ + return 0; +} + +static ssize_t xlogchar_read(struct file *file, char __user *buf, + size_t count, loff_t *ppos) +{ + u64 temp = count; + int err; + size_t copy_bytes; + if (do_div(temp, XLOGPKG_SIZE) || (count > XLOGBUF_SIZE)) { + pr_err("xlog: invalide count %zu\n", count); + return -EBADMSG; + } + if (!buf) { + pr_err("xlog: bad address from user side\n"); + return -EFAULT; + } + mutex_lock(&xlogdriver->xlog_mutex); + while ((XLOGBUF_SIZE - xlogdriver->free_size) < count) { + mutex_unlock(&xlogdriver->xlog_mutex); + pr_info("%s goint to sleep\n", __func__); + err = wait_event_interruptible(xlogdriver->wait_q, (XLOGBUF_SIZE - xlogdriver->free_size) >= count); + pr_info("%s wakeup \n", __func__); + if (err == -ERESTARTSYS) { + pr_err("%s wake up by signal return erro\n", __func__); + return -ERESTARTSYS; + } + mutex_lock(&xlogdriver->xlog_mutex); + } + if (XLOGBUF_SIZE < xlogdriver->readindex + count) { + copy_bytes = XLOGBUF_SIZE - xlogdriver->readindex; + err = copy_to_user(buf, (void *)(xlogdriver->buf + xlogdriver->readindex), copy_bytes); + err = copy_to_user(buf + copy_bytes, (void *)(xlogdriver->buf), count - copy_bytes); + xlogdriver->readindex = count - copy_bytes; + } else { + err = copy_to_user(buf, (void *)(xlogdriver->buf + xlogdriver->readindex), count); + xlogdriver->readindex += count; + } + xlogdriver->free_size += count; + mutex_unlock(&xlogdriver->xlog_mutex); + return count; +} + + +static ssize_t xlogchar_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + int err = 0; + size_t copy_bytes; + u64 temp = count; + pr_info("%s: count is %zu\n", __func__, count); + if (do_div(temp, XLOGPKG_SIZE) || (count > XLOGBUF_SIZE)) { + pr_err("xlog: invalide count %zu\n", count); + return -EBADMSG; + } + mutex_lock(&xlogdriver->xlog_mutex); + if (xlogdriver->free_size < count) { + pr_err("xlog: no more space to write free: %zu, count %zu\n", xlogdriver->free_size, count); + mutex_unlock(&xlogdriver->xlog_mutex); + return -EIO; + } + if (XLOGBUF_SIZE < xlogdriver->writeindex + count) { + copy_bytes = XLOGBUF_SIZE - xlogdriver->writeindex; + err = copy_from_user(xlogdriver->buf + xlogdriver->writeindex, buf, copy_bytes); + err = copy_from_user(xlogdriver->buf, buf + copy_bytes, count - copy_bytes); + xlogdriver->writeindex = count - copy_bytes; + } else { + err = copy_from_user(xlogdriver->buf + xlogdriver->writeindex, buf, count); + xlogdriver->writeindex += count; + } + xlogdriver->free_size -= count; + mutex_unlock(&xlogdriver->xlog_mutex); + pr_info("%s wakeup reader \n", __func__); + wake_up_interruptible(&xlogdriver->wait_q); + return count; +} + +static unsigned int xlogchar_poll(struct file *file, poll_table *wait) +{ + int masks = 0; + + return masks; +} + + +static const struct file_operations xlogcharfops = { + .owner = THIS_MODULE, + .read = xlogchar_read, + .write = xlogchar_write, + .poll = xlogchar_poll, + .open = xlogchar_open, + .release = xlogchar_close +}; + +static int xlogchar_setup_cdev(dev_t devno) +{ + + int err; + + cdev_init(xlogdriver->cdev, &xlogcharfops); + + xlogdriver->cdev->owner = THIS_MODULE; + xlogdriver->cdev->ops = &xlogcharfops; + + err = cdev_add(xlogdriver->cdev, devno, 1); + + if (err) { + pr_info("xlog cdev registration failed !\n"); + return err; + } + + xlogdriver->xlogchar_class = class_create(THIS_MODULE, "xlog"); + + if (IS_ERR(xlogdriver->xlogchar_class)) { + pr_err("Error creating xlogchar class.\n"); + return PTR_ERR(xlogdriver->xlogchar_class); + } + + xlogdriver->xlog_dev = device_create(xlogdriver->xlogchar_class, + NULL, devno, (void *)xlogdriver, "xlog"); + + if (!xlogdriver->xlog_dev) + return -EIO; + + return 0; + +} + +static int __init xlogchar_init(void) +{ + dev_t dev; + int ret; + + pr_info("xlogchar_init\n"); + ret = 0; + xlogdriver = kzalloc(sizeof(struct xlogchar_dev) + 5, GFP_KERNEL); + if (!xlogdriver) + return -ENOMEM; + + xlogdriver->buf = kzalloc(XLOGBUF_SIZE, GFP_KERNEL); + if (!xlogdriver->buf) + return -ENOMEM; + + mutex_init(&xlogdriver->xlog_mutex); + init_waitqueue_head(&xlogdriver->wait_q); + + xlogdriver->num = 1; + xlogdriver->name = ((void *)xlogdriver) + sizeof(struct xlogchar_dev); + xlogdriver->free_size = XLOGBUF_SIZE; + strlcpy(xlogdriver->name, "xlog", 4); + /* Get major number from kernel and initialize */ + ret = alloc_chrdev_region(&dev, xlogdriver->minor_start, + xlogdriver->num, xlogdriver->name); + if (!ret) { + xlogdriver->major = MAJOR(dev); + xlogdriver->minor_start = MINOR(dev); + } else { + pr_err("xlog: Major number not allocated\n"); + return ret; + } + xlogdriver->cdev = cdev_alloc(); + ret = xlogchar_setup_cdev(dev); + if (ret) + pr_err("xlogchar_setup_cdev failed\n"); + + pr_info("xlogchar_init done\n"); + + return ret; +} + +static void xlogchar_exit(void) +{ + if (xlogdriver) { + kfree(xlogdriver->buf); + if (xlogdriver->cdev) { + /* TODO - Check if device exists before deleting */ + device_destroy(xlogdriver->xlogchar_class, + MKDEV(xlogdriver->major, + xlogdriver->minor_start)); + cdev_del(xlogdriver->cdev); + } + if (!IS_ERR(xlogdriver->xlogchar_class)) + class_destroy(xlogdriver->xlogchar_class); + kfree(xlogdriver); + } + pr_info("done xlogchar exit\n"); +} + +core_initcall(xlogchar_init); +module_exit(xlogchar_exit); + +MODULE_DESCRIPTION("Xlog Char Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/char/xlogchar.h b/drivers/char/xlogchar.h new file mode 100644 index 0000000000000..0aa5542ea44f8 --- /dev/null +++ b/drivers/char/xlogchar.h @@ -0,0 +1,40 @@ +/* Copyright (C) 2018 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef XLOGCHAR_H +#define XLOGCHAR_H + +/* xlog alloc 1M bytes buffer used for audio event, + * and use the ping pong buffer for write and read + */ + +#define XLOGBUF_SIZE (1024*1024) +#define XLOGPKG_SIZE 512 +#define XLOGPKG_NUM (XLOGBUF_SIZE/XLOGPKG_SIZE) +struct xlogchar_dev { + /* State for the char driver */ + unsigned int major; + unsigned int minor_start; + int num; + struct cdev *cdev; + char *name; + size_t readindex; + size_t writeindex; + size_t free_size; + struct class *xlogchar_class; + struct device *xlog_dev; + struct mutex xlog_mutex; + wait_queue_head_t wait_q; + char *buf; +}; + +#endif diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 5d5e1be282dba..915828ff8ede8 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2689,7 +2689,7 @@ EXPORT_SYMBOL_GPL(clk_set_flags); static struct dentry *rootdir; static int inited = 0; -static u32 debug_suspend; +static u32 debug_suspend = 1; static DEFINE_MUTEX(clk_debug_lock); static HLIST_HEAD(clk_debug_list); diff --git a/drivers/cpufreq/cpu-boost.c b/drivers/cpufreq/cpu-boost.c index 15c1ff7b8b42c..c9fd1af46e9bc 100644 --- a/drivers/cpufreq/cpu-boost.c +++ b/drivers/cpufreq/cpu-boost.c @@ -27,21 +27,33 @@ struct cpu_sync { int cpu; unsigned int input_boost_min; unsigned int input_boost_freq; + unsigned int powerkey_input_boost_freq; +}; + +enum input_boost_type { + default_input_boost, + powerkey_input_boost }; static DEFINE_PER_CPU(struct cpu_sync, sync_info); static struct workqueue_struct *cpu_boost_wq; static struct work_struct input_boost_work; - +static struct work_struct powerkey_input_boost_work; static bool input_boost_enabled; static unsigned int input_boost_ms = 40; module_param(input_boost_ms, uint, 0644); +static unsigned int powerkey_input_boost_ms = 400; +module_param(powerkey_input_boost_ms, uint, 0644); + static unsigned int sched_boost_on_input; module_param(sched_boost_on_input, uint, 0644); +static bool sched_boost_on_powerkey_input = true; +module_param(sched_boost_on_powerkey_input, bool, 0644); + static bool sched_boost_active; static struct delayed_work input_boost_rem; @@ -54,6 +66,12 @@ static int set_input_boost_freq(const char *buf, const struct kernel_param *kp) unsigned int val, cpu; const char *cp = buf; bool enabled = false; + enum input_boost_type type; + + if (strstr(kp->name, "input_boost_freq")) + type = default_input_boost; + if (strstr(kp->name, "powerkey_input_boost_freq")) + type = powerkey_input_boost; while ((cp = strpbrk(cp + 1, " :"))) ntokens++; @@ -62,8 +80,12 @@ static int set_input_boost_freq(const char *buf, const struct kernel_param *kp) if (!ntokens) { if (sscanf(buf, "%u\n", &val) != 1) return -EINVAL; - for_each_possible_cpu(i) - per_cpu(sync_info, i).input_boost_freq = val; + for_each_possible_cpu(i) { + if (type == default_input_boost) + per_cpu(sync_info, i).input_boost_freq = val; + else if (type == powerkey_input_boost) + per_cpu(sync_info, i).powerkey_input_boost_freq = val; + } goto check_enable; } @@ -78,14 +100,18 @@ static int set_input_boost_freq(const char *buf, const struct kernel_param *kp) if (cpu >= num_possible_cpus()) return -EINVAL; - per_cpu(sync_info, cpu).input_boost_freq = val; + if (type == default_input_boost) + per_cpu(sync_info, cpu).input_boost_freq = val; + else if (type == powerkey_input_boost) + per_cpu(sync_info, cpu).powerkey_input_boost_freq = val; cp = strnchr(cp, PAGE_SIZE - (cp - buf), ' '); cp++; } check_enable: for_each_possible_cpu(i) { - if (per_cpu(sync_info, i).input_boost_freq) { + if (per_cpu(sync_info, i).input_boost_freq + || per_cpu(sync_info, i).powerkey_input_boost_freq) { enabled = true; break; } @@ -99,11 +125,22 @@ static int get_input_boost_freq(char *buf, const struct kernel_param *kp) { int cnt = 0, cpu; struct cpu_sync *s; + unsigned int boost_freq = 0; + enum input_boost_type type; + + if (strstr(kp->name, "input_boost_freq")) + type = default_input_boost; + if (strstr(kp->name, "powerkey_input_boost_freq")) + type = powerkey_input_boost; for_each_possible_cpu(cpu) { s = &per_cpu(sync_info, cpu); + if (type == default_input_boost) + boost_freq = s->input_boost_freq; + else if(type == powerkey_input_boost) + boost_freq = s->powerkey_input_boost_freq; cnt += snprintf(buf + cnt, PAGE_SIZE - cnt, - "%d:%u ", cpu, s->input_boost_freq); + "%d:%u ", cpu, boost_freq); } cnt += snprintf(buf + cnt, PAGE_SIZE - cnt, "\n"); return cnt; @@ -115,6 +152,8 @@ static const struct kernel_param_ops param_ops_input_boost_freq = { }; module_param_cb(input_boost_freq, ¶m_ops_input_boost_freq, NULL, 0644); +module_param_cb(powerkey_input_boost_freq, ¶m_ops_input_boost_freq, NULL, 0644); + /* * The CPUFREQ_ADJUST notifier is used to override the current policy min to * make sure policy min >= boost_min. The cpufreq framework then does the job @@ -221,11 +260,67 @@ static void do_input_boost(struct work_struct *work) msecs_to_jiffies(input_boost_ms)); } +static void do_powerkey_input_boost(struct work_struct *work) +{ + + unsigned int i, ret; + struct cpu_sync *i_sync_info; + cancel_delayed_work_sync(&input_boost_rem); + if (sched_boost_active) { + sched_set_boost(0); + sched_boost_active = false; + } + + /* Set the powerkey_input_boost_min for all CPUs in the system */ + pr_debug("Setting powerkey input boost min for all CPUs\n"); + for_each_possible_cpu(i) { + i_sync_info = &per_cpu(sync_info, i); + i_sync_info->input_boost_min = i_sync_info->powerkey_input_boost_freq; + } + + /* Update policies for all online CPUs */ + update_policy_online(); + + /* Enable scheduler boost to migrate tasks to big cluster */ + if (sched_boost_on_powerkey_input) { + ret = sched_set_boost(1); + if (ret) + pr_err("cpu-boost: HMP boost enable failed\n"); + else + sched_boost_active = true; + } + + queue_delayed_work(cpu_boost_wq, &input_boost_rem, + msecs_to_jiffies(powerkey_input_boost_ms)); +} + static void cpuboost_input_event(struct input_handle *handle, unsigned int type, unsigned int code, int value) { u64 now; + if (!input_boost_enabled) + return; + + now = ktime_to_us(ktime_get()); + if (now - last_input_time < MIN_INPUT_INTERVAL) + return; + + if (work_pending(&input_boost_work)) + return; + + if (type == EV_KEY && code == KEY_POWER) { + queue_work(cpu_boost_wq, &powerkey_input_boost_work); + } else { + queue_work(cpu_boost_wq, &input_boost_work); + } + last_input_time = ktime_to_us(ktime_get()); +} + +void touch_irq_boost(void) +{ + u64 now; + if (!input_boost_enabled) return; @@ -237,8 +332,10 @@ static void cpuboost_input_event(struct input_handle *handle, return; queue_work(cpu_boost_wq, &input_boost_work); + last_input_time = ktime_to_us(ktime_get()); } +EXPORT_SYMBOL(touch_irq_boost); static int cpuboost_input_connect(struct input_handler *handler, struct input_dev *dev, const struct input_device_id *id) @@ -321,6 +418,7 @@ static int cpu_boost_init(void) return -EFAULT; INIT_WORK(&input_boost_work, do_input_boost); + INIT_WORK(&powerkey_input_boost_work, do_powerkey_input_boost); INIT_DELAYED_WORK(&input_boost_rem, do_input_boost_rem); for_each_possible_cpu(cpu) { diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index ea51a776c6ca1..f0b8664a57018 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c @@ -2267,6 +2267,10 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy, blocking_notifier_call_chain(&cpufreq_policy_notifier_list, CPUFREQ_INCOMPATIBLE, new_policy); + /* the adjusted frequency should not exceed thermal limit */ + blocking_notifier_call_chain(&cpufreq_policy_notifier_list, + CPUFREQ_THERMAL, new_policy); + /* * verify the cpu speed can be set within this limit, which might be * different to the first one diff --git a/drivers/cpufreq/cpufreq_times.c b/drivers/cpufreq/cpufreq_times.c index 5b5248a7c87c4..0ec3dbfb5ca40 100644 --- a/drivers/cpufreq/cpufreq_times.c +++ b/drivers/cpufreq/cpufreq_times.c @@ -25,12 +25,19 @@ #include #include +#ifndef SYSTEM_UID +#define SYSTEM_UID 1000 +#endif +#define MAX_TASK_COMM_LEN 16 + #define UID_HASH_BITS 10 static DECLARE_HASHTABLE(uid_hash_table, UID_HASH_BITS); +static DECLARE_HASHTABLE(sys_app_hash_table, UID_HASH_BITS); static DEFINE_SPINLOCK(task_time_in_state_lock); /* task->time_in_state */ static DEFINE_SPINLOCK(uid_lock); /* uid_hash_table */ +static DEFINE_SPINLOCK(pid_lock); /* sys_app_hash_table */ struct concurrent_times { atomic64_t active[NR_CPUS]; @@ -46,6 +53,17 @@ struct uid_entry { u64 time_in_state[0]; }; +struct pid_entry { + u64 hash_code; + char *package; + pid_t pid; + struct concurrent_times *concurrent_times; + struct hlist_node hash; + unsigned int max_state; + u64 time_in_state[0]; + struct rcu_head rcu; +}; + /** * struct cpu_freqs - per-cpu frequency information * @offset: start of these freqs' stats in task time_in_state array @@ -137,6 +155,143 @@ static struct uid_entry *find_or_register_uid_locked(uid_t uid) return uid_entry; } +/* + * simple hash function for a string, + * http://www.cse.yorku.ca/~oz/hash.html + */ +static u64 hash_string(const char *str) +{ + u64 hash = 5381; + int c; + + while ((c = *str++)) + hash = ((hash << 5) + hash) + c; + + return hash; +} + +/* Caller must hold rcu_read_lock() */ +static struct pid_entry *find_pid_entry_rcu(u64 hash_code) +{ + struct pid_entry *pid_entry; + + hash_for_each_possible_rcu(sys_app_hash_table, pid_entry, hash, hash_code) { + if (pid_entry->hash_code == hash_code) + return pid_entry; + } + return NULL; +} + +/* Caller must hold pid lock */ +static struct pid_entry *find_pid_entry_locked(u64 hash_code) +{ + struct pid_entry *pid_entry; + + hash_for_each_possible(sys_app_hash_table, pid_entry, hash, hash_code) { + if (pid_entry->hash_code == hash_code) + return pid_entry; + } + return NULL; +} + +/* Caller must hold pid lock */ +static struct pid_entry *find_or_register_pid_locked(u64 hash_code, + const char *package, pid_t pid) +{ + struct pid_entry *pid_entry, *temp; + struct concurrent_times *times; + unsigned int max_state = READ_ONCE(next_offset); + size_t alloc_size = sizeof(*pid_entry) + max_state * + sizeof(pid_entry->time_in_state[0]); + pid_entry = find_pid_entry_locked(hash_code); + if (pid_entry) { + if (pid_entry->max_state == max_state) + return pid_entry; + temp = __krealloc(pid_entry, alloc_size, GFP_ATOMIC); + if (!temp) + return pid_entry; + temp->max_state = max_state; + memset(temp->time_in_state + pid_entry->max_state, 0, + (max_state - pid_entry->max_state) * + sizeof(pid_entry->time_in_state[0])); + if (temp != pid_entry) { + hlist_replace_rcu(&pid_entry->hash, &temp->hash); + kfree_rcu(pid_entry, rcu); + } + return temp; + } + + pid_entry = kzalloc(alloc_size, GFP_ATOMIC); + if (!pid_entry) + return NULL; + times = kzalloc(sizeof(*times), GFP_ATOMIC); + if (!times) { + kfree(pid_entry); + return NULL; + } + pid_entry->package = kzalloc(MAX_TASK_COMM_LEN, GFP_ATOMIC); + if (!pid_entry->package) { + kfree(pid_entry); + return NULL; + } + + strncpy(pid_entry->package, package, MAX_TASK_COMM_LEN); + pid_entry->hash_code = hash_string(pid_entry->package); + pid_entry->pid = pid; + pid_entry->concurrent_times = times; + + hash_add_rcu(sys_app_hash_table, &pid_entry->hash, hash_code); + + return pid_entry; +} + +static void *pid_seq_start(struct seq_file *seq, loff_t *pos) +{ + if (*pos >= HASH_SIZE(sys_app_hash_table)) + return NULL; + + return &sys_app_hash_table[*pos]; +} + +static void *pid_seq_next(struct seq_file *seq, void *v, loff_t *pos) +{ + do { + (*pos)++; + + if (*pos >= HASH_SIZE(sys_app_hash_table)) + return NULL; + } while (hlist_empty(&sys_app_hash_table[*pos])); + + return &sys_app_hash_table[*pos]; +} + +static void pid_seq_stop(struct seq_file *seq, void *v){ } + +static int sys_app_concurrent_time_seq_show(struct seq_file *m, void *v, + atomic64_t *(*get_times)(struct concurrent_times *)) +{ + struct pid_entry *pid_entry; + int i, num_possible_cpus = num_possible_cpus(); + rcu_read_lock(); + + hlist_for_each_entry_rcu(pid_entry, (struct hlist_head *)v, hash) { + atomic64_t *times = get_times(pid_entry->concurrent_times); + + seq_puts(m, pid_entry->package); + seq_putc(m, ':'); + + for (i = 0; i < num_possible_cpus; ++i) { + u64 time = nsec_to_clock_t(atomic64_read(×[i])); + + seq_put_decimal_ull(m, " ", time); + } + seq_putc(m, '\n'); + } + rcu_read_unlock(); + + return 0; +} + static int single_uid_time_in_state_show(struct seq_file *m, void *ptr) { struct uid_entry *uid_entry; @@ -273,6 +428,89 @@ static inline atomic64_t *get_policy_times(struct concurrent_times *times) return times->policy; } +static int sys_app_time_in_state_seq_show(struct seq_file *m, void *v) +{ + struct pid_entry *pid_entry; + struct cpu_freqs *freqs, *last_freqs = NULL; + int i, cpu; + + if (v == sys_app_hash_table) { + seq_puts(m, "sys_app:"); + for_each_possible_cpu(cpu) { + freqs = all_freqs[cpu]; + if (!freqs || freqs == last_freqs) + continue; + last_freqs = freqs; + for (i = 0; i < freqs->max_state; i++) { + seq_put_decimal_ull(m, " ", + freqs->freq_table[i]); + } + } + seq_putc(m, '\n'); + } + + rcu_read_lock(); + + hlist_for_each_entry_rcu(pid_entry, (struct hlist_head *)v, hash) { + if (pid_entry->max_state) { + seq_puts(m, pid_entry->package); + seq_putc(m, ':'); + } + for (i = 0; i < pid_entry->max_state; ++i) { + u64 time = nsec_to_clock_t(pid_entry->time_in_state[i]); + seq_put_decimal_ull(m, " ", time); + } + if (pid_entry->max_state) + seq_putc(m, '\n'); + } + + rcu_read_unlock(); + return 0; +} + +static int sys_app_concurrent_active_time_seq_show(struct seq_file *m, void *v) +{ + if (v == sys_app_hash_table) { + seq_put_decimal_ull(m, "cpus: ", num_possible_cpus()); + seq_putc(m, '\n'); + } + + return sys_app_concurrent_time_seq_show(m, v, get_active_times); +} + +static int sys_app_concurrent_policy_time_seq_show(struct seq_file *m, void *v) +{ + int i; + struct cpu_freqs *freqs, *last_freqs = NULL; + + if (v == sys_app_hash_table) { + int cnt = 0; + + for_each_possible_cpu(i) { + freqs = all_freqs[i]; + if (!freqs) + continue; + if (freqs != last_freqs) { + if (last_freqs) { + seq_put_decimal_ull(m, ": ", cnt); + seq_putc(m, ' '); + cnt = 0; + } + seq_put_decimal_ull(m, "policy", i); + + last_freqs = freqs; + } + cnt++; + } + if (last_freqs) { + seq_put_decimal_ull(m, ": ", cnt); + seq_putc(m, '\n'); + } + } + + return sys_app_concurrent_time_seq_show(m, v, get_policy_times); +} + static int concurrent_policy_time_seq_show(struct seq_file *m, void *v) { int i; @@ -406,6 +644,10 @@ void cpufreq_acct_update_power(struct task_struct *p, u64 cputime) struct cpufreq_policy *policy; uid_t uid = from_kuid_munged(current_user_ns(), task_uid(p)); int cpu = 0; + pid_t pid; + u64 tmp_hash; + struct pid_entry *pid_entry; + const char *package_name; if (!freqs || is_idle_task(p) || p->flags & PF_EXITING) return; @@ -424,6 +666,17 @@ void cpufreq_acct_update_power(struct task_struct *p, u64 cputime) uid_entry->time_in_state[state] += cputime; spin_unlock_irqrestore(&uid_lock, flags); + if (uid == SYSTEM_UID) { + spin_lock_irqsave(&pid_lock, flags); + pid = p->tgid; + package_name = p->group_leader->comm; + tmp_hash = hash_string(package_name); + pid_entry = find_or_register_pid_locked(tmp_hash, package_name, pid); + if (pid_entry && state < pid_entry->max_state) + pid_entry->time_in_state[state] += cputime; + spin_unlock_irqrestore(&pid_lock, flags); + } + rcu_read_lock(); uid_entry = find_uid_entry_rcu(uid); if (!uid_entry) { @@ -458,6 +711,16 @@ void cpufreq_acct_update_power(struct task_struct *p, u64 cputime) atomic64_add(cputime, &uid_entry->concurrent_times->policy[policy_first_cpu + policy_cpu_cnt - 1]); + if (uid == SYSTEM_UID) { + pid_entry = find_pid_entry_rcu(tmp_hash); + if (pid_entry) { + atomic64_add(cputime, + &pid_entry->concurrent_times->active[active_cpu_cnt - 1]); + atomic64_add(cputime, + &pid_entry->concurrent_times->policy[policy_first_cpu + + policy_cpu_cnt - 1]); + } + } rcu_read_unlock(); } @@ -615,6 +878,63 @@ static const struct file_operations concurrent_policy_time_fops = { .release = seq_release, }; +static const struct seq_operations sys_app_time_in_state_seq_ops = { + .start = pid_seq_start, + .next = pid_seq_next, + .stop = pid_seq_stop, + .show = sys_app_time_in_state_seq_show, +}; + +static int sys_app_time_in_state_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &sys_app_time_in_state_seq_ops); +} + +static const struct file_operations sys_app_time_in_state_fops = { + .open = sys_app_time_in_state_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; + +static const struct seq_operations sys_app_concurrent_active_time_seq_ops = { + .start = pid_seq_start, + .next = pid_seq_next, + .stop = pid_seq_stop, + .show = sys_app_concurrent_active_time_seq_show, +}; + +static int sys_app_concurrent_active_time_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &sys_app_concurrent_active_time_seq_ops); +} + +static const struct file_operations sys_app_concurrent_active_time_fops = { + .open = sys_app_concurrent_active_time_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; + +static const struct seq_operations sys_app_concurrent_policy_time_seq_ops = { + .start = pid_seq_start, + .next = pid_seq_next, + .stop = pid_seq_stop, + .show = sys_app_concurrent_policy_time_seq_show, +}; + +static int sys_app_concurrent_policy_time_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &sys_app_concurrent_policy_time_seq_ops); +} + +static const struct file_operations sys_app_concurrent_policy_time_fops = { + .open = sys_app_concurrent_policy_time_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; + static int __init cpufreq_times_init(void) { proc_create_data("uid_time_in_state", 0444, NULL, @@ -626,6 +946,15 @@ static int __init cpufreq_times_init(void) proc_create_data("uid_concurrent_policy_time", 0444, NULL, &concurrent_policy_time_fops, NULL); + proc_create_data("sys_app_time_in_state", 0444, NULL, + &sys_app_time_in_state_fops, NULL); + + proc_create_data("sys_app_concurrent_active_time", 0444, NULL, + &sys_app_concurrent_active_time_fops, NULL); + + proc_create_data("sys_app_concurrent_policy_time", 0444, NULL, + &sys_app_concurrent_policy_time_fops, NULL); + return 0; } diff --git a/drivers/cpuidle/lpm-levels.c b/drivers/cpuidle/lpm-levels.c index b2c958a79eaa3..32c499d2b4083 100644 --- a/drivers/cpuidle/lpm-levels.c +++ b/drivers/cpuidle/lpm-levels.c @@ -139,6 +139,9 @@ module_param_named(print_parsed_dt, print_parsed_dt, bool, 0664); static bool sleep_disabled; module_param_named(sleep_disabled, sleep_disabled, bool, 0664); +bool sleep_disabled_touch; +module_param_named(sleep_disabled_touch, sleep_disabled_touch, bool, 0664); + /** * msm_cpuidle_get_deep_idle_latency - Get deep idle latency value * @@ -160,6 +163,13 @@ uint32_t register_system_pm_ops(struct system_pm_ops *pm_ops) return 0; } +void lpm_disable_for_input(bool on) +{ + sleep_disabled_touch = !!on; + return; +} +EXPORT_SYMBOL(lpm_disable_for_input); + static uint32_t least_cluster_latency(struct lpm_cluster *cluster, struct latency_level *lat_level) { @@ -699,7 +709,7 @@ static int cpu_power_select(struct cpuidle_device *dev, struct power_params *pwr_params; uint64_t bias_time = 0; - if ((sleep_disabled && !cpu_isolated(dev->cpu)) || sleep_us < 0) + if (((sleep_disabled || sleep_disabled_touch) && !cpu_isolated(dev->cpu)) || sleep_us < 0) return best_level; idx_restrict = cpu->nlevels + 1; @@ -1755,7 +1765,9 @@ static void lpm_suspend_wake(void) suspend_in_progress = false; lpm_stats_suspend_exit(); } - +#ifdef CONFIG_DEBUG_FS +extern void gpio_debug_print(void); +#endif static int lpm_suspend_enter(suspend_state_t state) { int cpu = raw_smp_processor_id(); @@ -1777,6 +1789,9 @@ static int lpm_suspend_enter(suspend_state_t state) cluster_prepare(cluster, cpumask, idx, false, 0); success = psci_enter_sleep(lpm_cpu, idx, false); +#ifdef CONFIG_DEBUG_FS + gpio_debug_print(); +#endif cluster_unprepare(cluster, cpumask, idx, false, 0, success); cpu_unprepare(lpm_cpu, idx, false); diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 26e1103e49a6a..b87c6654a8377 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -771,4 +771,14 @@ config CRYPTO_DEV_ARTPEC6 To compile this driver as a module, choose M here. +config CRYPTO_DEV_QCOM_ICE + tristate "Inline Crypto Module" + default n + depends on BLK_DEV_DM + help + This driver supports Inline Crypto Engine for QTI chipsets, MSM8994 + and later, to accelerate crypto operations for storage needs. + To compile this driver as a module, choose M here: the + module will be called ice. + endif # CRYPTO_HW diff --git a/drivers/crypto/msm/ice.c b/drivers/crypto/msm/ice.c index 79301bbed9694..c60d262728249 100644 --- a/drivers/crypto/msm/ice.c +++ b/drivers/crypto/msm/ice.c @@ -25,7 +25,6 @@ #include #include #include "iceregs.h" -#include #include #include @@ -68,7 +67,6 @@ #define ICE_CRYPTO_CXT_FBE 2 static int ice_fde_flag; - struct ice_clk_info { struct list_head list; struct clk *clk; @@ -120,24 +118,13 @@ struct ice_device { wait_queue_head_t block_suspend_ice_queue; }; +static int qcom_ice_init(struct ice_device *ice_dev, void *host_controller_data, + ice_error_cb error_cb); + static int qti_ice_setting_config(struct request *req, - struct platform_device *pdev, struct ice_crypto_setting *crypto_data, struct ice_data_setting *setting, uint32_t cxt) { - struct ice_device *ice_dev = platform_get_drvdata(pdev); - - if (!ice_dev) { - pr_debug("%s no ICE device\n", __func__); - /* make the caller finish peacefully */ - return 0; - } - - if (ice_dev->is_ice_disable_fuse_blown) { - pr_err("%s ICE disabled fuse is blown\n", __func__); - return -EPERM; - } - if (!setting) return -EINVAL; @@ -297,23 +284,6 @@ static int qcom_ice_get_vreg(struct ice_device *ice_dev) return ret; } -static void qcom_ice_config_proc_ignore(struct ice_device *ice_dev) -{ - u32 regval; - - if (ICE_REV(ice_dev->ice_hw_version, MAJOR) == 2 && - ICE_REV(ice_dev->ice_hw_version, MINOR) == 0 && - ICE_REV(ice_dev->ice_hw_version, STEP) == 0) { - regval = qcom_ice_readl(ice_dev, - QCOM_ICE_REGS_ADVANCED_CONTROL); - regval |= 0x800; - qcom_ice_writel(ice_dev, regval, - QCOM_ICE_REGS_ADVANCED_CONTROL); - /* Ensure register is updated */ - mb(); - } -} - static void qcom_ice_low_power_mode_enable(struct ice_device *ice_dev) { u32 regval; @@ -476,45 +446,6 @@ static int qcom_ice_enable(struct ice_device *ice_dev) return 0; } -static int qcom_ice_verify_ice(struct ice_device *ice_dev) -{ - unsigned int rev; - unsigned int maj_rev, min_rev, step_rev; - - rev = qcom_ice_readl(ice_dev, QCOM_ICE_REGS_VERSION); - maj_rev = (rev & ICE_CORE_MAJOR_REV_MASK) >> ICE_CORE_MAJOR_REV; - min_rev = (rev & ICE_CORE_MINOR_REV_MASK) >> ICE_CORE_MINOR_REV; - step_rev = (rev & ICE_CORE_STEP_REV_MASK) >> ICE_CORE_STEP_REV; - - if (maj_rev > ICE_CORE_CURRENT_MAJOR_VERSION) { - pr_err("%s: Unknown QC ICE device at %lu, rev %d.%d.%d\n", - __func__, (unsigned long)ice_dev->mmio, - maj_rev, min_rev, step_rev); - return -ENODEV; - } - ice_dev->ice_hw_version = rev; - - dev_info(ice_dev->pdev, "QC ICE %d.%d.%d device found @0x%pK\n", - maj_rev, min_rev, step_rev, - ice_dev->mmio); - - return 0; -} - -static void qcom_ice_enable_intr(struct ice_device *ice_dev) -{ - unsigned int reg; - - reg = qcom_ice_readl(ice_dev, QCOM_ICE_REGS_NON_SEC_IRQ_MASK); - reg &= ~QCOM_ICE_NON_SEC_IRQ_MASK; - qcom_ice_writel(ice_dev, reg, QCOM_ICE_REGS_NON_SEC_IRQ_MASK); - /* - * Ensure previous instructions was completed before issuing next - * ICE initialization/optimization instruction - */ - mb(); -} - static void qcom_ice_disable_intr(struct ice_device *ice_dev) { unsigned int reg; @@ -627,25 +558,13 @@ static int qcom_ice_parse_clock_info(struct platform_device *pdev, } static int qcom_ice_get_device_tree_data(struct platform_device *pdev, - struct ice_device *ice_dev) + struct ice_device *ice_dev) { struct device *dev = &pdev->dev; int rc = -1; int irq; - ice_dev->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!ice_dev->res) { - pr_err("%s: No memory available for IORESOURCE\n", __func__); - return -ENOMEM; - } - - ice_dev->mmio = devm_ioremap_resource(dev, ice_dev->res); - if (IS_ERR(ice_dev->mmio)) { - rc = PTR_ERR(ice_dev->mmio); - pr_err("%s: Error = %d mapping ICE io memory\n", __func__, rc); - goto out; - } - + ice_dev->mmio = NULL; if (!of_parse_phandle(pdev->dev.of_node, "vdd-hba-supply", 0)) { pr_err("%s: No vdd-hba-supply regulator, assuming not needed\n", __func__); @@ -688,7 +607,7 @@ static int qcom_ice_get_device_tree_data(struct platform_device *pdev, err_dev: if (rc && ice_dev->mmio) devm_iounmap(dev, ice_dev->mmio); -out: +//out: return rc; } @@ -810,7 +729,12 @@ static int qcom_ice_probe(struct platform_device *pdev) * We would enable ICE when first request for crypto * operation arrives. */ - ice_dev->is_ice_enabled = false; + rc = qcom_ice_init(ice_dev, NULL, NULL); + if (rc) { + pr_err("create character device failed.\n"); + goto err_ice_dev; + } + ice_dev->is_ice_enabled = true; platform_set_drvdata(pdev, ice_dev); list_add_tail(&ice_dev->list, &ice_devices); @@ -999,31 +923,6 @@ static int qcom_ice_enable_clocks(struct ice_device *ice, bool enable) return ret; } -static int qcom_ice_secure_ice_init(struct ice_device *ice_dev) -{ - /* We need to enable source for ICE secure interrupts */ - int ret = 0; - u32 regval; - - regval = scm_io_read((unsigned long)ice_dev->res + - QCOM_ICE_LUT_KEYS_ICE_SEC_IRQ_MASK); - - regval &= ~QCOM_ICE_SEC_IRQ_MASK; - ret = scm_io_write((unsigned long)ice_dev->res + - QCOM_ICE_LUT_KEYS_ICE_SEC_IRQ_MASK, regval); - - /* - * Ensure previous instructions was completed before issuing next - * ICE initialization/optimization instruction - */ - mb(); - - if (!ret) - pr_err("%s: failed(0x%x) to init secure ICE config\n", - __func__, ret); - return ret; -} - static int qcom_ice_update_sec_cfg(struct ice_device *ice_dev) { int ret = 0, scm_ret = 0; @@ -1064,7 +963,6 @@ static int qcom_ice_update_sec_cfg(struct ice_device *ice_dev) static int qcom_ice_finish_init(struct ice_device *ice_dev) { - unsigned int reg; int err = 0; if (!ice_dev) { @@ -1090,53 +988,12 @@ static int qcom_ice_finish_init(struct ice_device *ice_dev) * configurations of host & ice. It is prudent to restore the config */ err = qcom_ice_update_sec_cfg(ice_dev); - if (err) - goto out; - - err = qcom_ice_verify_ice(ice_dev); - if (err) - goto out; - - /* if ICE_DISABLE_FUSE is blown, return immediately - * Currently, FORCE HW Keys are also disabled, since - * there is no use case for their usage neither in FDE - * nor in PFE - */ - reg = qcom_ice_readl(ice_dev, QCOM_ICE_REGS_FUSE_SETTING); - reg &= (ICE_FUSE_SETTING_MASK | - ICE_FORCE_HW_KEY0_SETTING_MASK | - ICE_FORCE_HW_KEY1_SETTING_MASK); - - if (reg) { - ice_dev->is_ice_disable_fuse_blown = true; - pr_err("%s: Error: ICE_ERROR_HW_DISABLE_FUSE_BLOWN\n", - __func__); - err = -EPERM; - goto out; - } - /* TZ side of ICE driver would handle secure init of ICE HW from v2 */ - if (ICE_REV(ice_dev->ice_hw_version, MAJOR) == 1 && - !qcom_ice_secure_ice_init(ice_dev)) { - pr_err("%s: Error: ICE_ERROR_ICE_TZ_INIT_FAILED\n", __func__); - err = -EFAULT; - goto out; - } - init_waitqueue_head(&ice_dev->block_suspend_ice_queue); - qcom_ice_low_power_mode_enable(ice_dev); - qcom_ice_optimization_enable(ice_dev); - qcom_ice_config_proc_ignore(ice_dev); - qcom_ice_enable_test_bus_config(ice_dev); - qcom_ice_enable(ice_dev); - ice_dev->is_ice_enabled = true; - qcom_ice_enable_intr(ice_dev); - atomic_set(&ice_dev->is_ice_suspended, 0); - atomic_set(&ice_dev->is_ice_busy, 0); out: return err; } -static int qcom_ice_init(struct platform_device *pdev, +static int qcom_ice_init(struct ice_device *ice_dev, void *host_controller_data, ice_error_cb error_cb) { @@ -1147,13 +1004,6 @@ static int qcom_ice_init(struct platform_device *pdev, * When any request for data transfer is received, it would enable * the ICE for that particular request */ - struct ice_device *ice_dev; - - ice_dev = platform_get_drvdata(pdev); - if (!ice_dev) { - pr_err("%s: invalid device\n", __func__); - return -EINVAL; - } ice_dev->error_cb = error_cb; ice_dev->host_controller_data = host_controller_data; @@ -1201,12 +1051,6 @@ static int qcom_ice_finish_power_collapse(struct ice_device *ice_dev) if (err) goto out; - /* - * for PFE case, clear the cached ICE key table, - * this will force keys to be reconfigured - * per each next transaction - */ - pfk_clear_on_reset(); } } @@ -1444,8 +1288,8 @@ static void qcom_ice_debug(struct platform_device *pdev) qcom_ice_dump_test_bus(ice_dev); pr_err("%s: ICE reset start time: %llu ICE reset done time: %llu\n", ice_dev->ice_instance_type, - (unsigned long long)ice_dev->ice_reset_start_time.tv64, - (unsigned long long)ice_dev->ice_reset_complete_time.tv64); + (unsigned long long)ice_dev->ice_reset_start_time, + (unsigned long long)ice_dev->ice_reset_complete_time); if (ktime_to_us(ktime_sub(ice_dev->ice_reset_complete_time, ice_dev->ice_reset_start_time)) > 0) @@ -1473,28 +1317,15 @@ static int qcom_ice_reset(struct platform_device *pdev) return qcom_ice_finish_power_collapse(ice_dev); } -static int qcom_ice_config_start(struct platform_device *pdev, - struct request *req, - struct ice_data_setting *setting, bool async) +int qcom_ice_config_start(struct request *req, struct ice_data_setting *setting) { - struct ice_crypto_setting pfk_crypto_data = {0}; struct ice_crypto_setting ice_data = {0}; - int ret = 0; - bool is_pfe = false; unsigned long sec_end = 0; sector_t data_size; - struct ice_device *ice_dev; - - if (!pdev || !req) { + if (!req) { pr_err("%s: Invalid params passed\n", __func__); return -EINVAL; } - ice_dev = platform_get_drvdata(pdev); - - if (!ice_dev) { - pr_err("%s: INVALID ice_dev\n", __func__); - return -EINVAL; - } /* * It is not an error to have a request with no bio @@ -1511,30 +1342,6 @@ static int qcom_ice_config_start(struct platform_device *pdev, return 0; } - if (atomic_read(&ice_dev->is_ice_suspended) == 1) - return -EINVAL; - - if (async) - atomic_set(&ice_dev->is_ice_busy, 1); - - ret = pfk_load_key_start(req->bio, &pfk_crypto_data, &is_pfe, async); - - if (async) { - atomic_set(&ice_dev->is_ice_busy, 0); - wake_up_interruptible(&ice_dev->block_suspend_ice_queue); - } - if (is_pfe) { - if (ret) { - if (ret != -EBUSY && ret != -EAGAIN) - pr_err("%s error %d while configuring ice key for PFE\n", - __func__, ret); - return ret; - } - - return qti_ice_setting_config(req, pdev, - &pfk_crypto_data, setting, ICE_CRYPTO_CXT_FBE); - } - if (ice_fde_flag && req->part && req->part->info && req->part->info->volname[0]) { if (!strcmp(req->part->info->volname, "userdata")) { @@ -1559,7 +1366,7 @@ static int qcom_ice_config_start(struct platform_device *pdev, if ((req->__sector + data_size) > sec_end) return 0; else - return qti_ice_setting_config(req, pdev, + return qti_ice_setting_config(req, &ice_data, setting, ICE_CRYPTO_CXT_FDE); } @@ -1575,34 +1382,6 @@ static int qcom_ice_config_start(struct platform_device *pdev, } EXPORT_SYMBOL(qcom_ice_config_start); -static int qcom_ice_config_end(struct request *req) -{ - int ret = 0; - bool is_pfe = false; - - if (!req) { - pr_err("%s: Invalid params passed\n", __func__); - return -EINVAL; - } - - if (!req->bio) { - /* It is not an error to have a request with no bio */ - return 0; - } - ret = pfk_load_key_end(req->bio, &is_pfe); - if (is_pfe) { - if (ret != 0) - pr_err("%s error %d while end configuring ice key for PFE\n", - __func__, ret); - return ret; - } - - - return 0; -} -EXPORT_SYMBOL(qcom_ice_config_end); - - static int qcom_ice_status(struct platform_device *pdev) { struct ice_device *ice_dev; @@ -1628,18 +1407,6 @@ static int qcom_ice_status(struct platform_device *pdev) } -struct qcom_ice_variant_ops qcom_ice_ops = { - .name = "qcom", - .init = qcom_ice_init, - .reset = qcom_ice_reset, - .resume = qcom_ice_resume, - .suspend = qcom_ice_suspend, - .config_start = qcom_ice_config_start, - .config_end = qcom_ice_config_end, - .status = qcom_ice_status, - .debug = qcom_ice_debug, -}; - struct platform_device *qcom_ice_get_pdevice(struct device_node *node) { struct platform_device *ice_pdev = NULL; @@ -1805,13 +1572,22 @@ int qcom_ice_setup_ice_hw(const char *storage_type, int enable) if (!ice_dev || (ice_dev->is_ice_enabled == false)) return ret; - if (enable) return enable_ice_setup(ice_dev); else return disable_ice_setup(ice_dev); } +static struct qcom_ice_variant_ops qcom_ice_ops = { + .name = "qcom", + .reset = qcom_ice_reset, + .resume = qcom_ice_resume, + .suspend = qcom_ice_suspend, + .config_start = qcom_ice_config_start, + .status = qcom_ice_status, + .debug = qcom_ice_debug, +}; + struct qcom_ice_variant_ops *qcom_ice_get_variant_ops(struct device_node *node) { return &qcom_ice_ops; diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c index 3d9b11ca2cf03..0d68ca2bca9bc 100644 --- a/drivers/crypto/msm/qce50.c +++ b/drivers/crypto/msm/qce50.c @@ -1452,6 +1452,11 @@ static int _ce_setup_aead_direct(struct qce_device *pce_dev, /* write CNTR0_IV0_REG */ if (q_req->mode != QCE_MODE_ECB) { + if (ivsize > MAX_IV_LENGTH) { + pr_err("%s: error: Invalid length parameter\n", + __func__); + return -EINVAL; + } _byte_stream_to_net_words(enciv32, q_req->iv, ivsize); for (i = 0; i < enciv_in_word; i++) QCE_WRITE_REG(enciv32[i], pce_dev->iobase + diff --git a/drivers/dma-buf/dma-buf-ref.c b/drivers/dma-buf/dma-buf-ref.c old mode 100644 new mode 100755 index 76047104faca4..f3ea3896c512a --- a/drivers/dma-buf/dma-buf-ref.c +++ b/drivers/dma-buf/dma-buf-ref.c @@ -17,7 +17,7 @@ #include #include -#define DMA_BUF_STACK_DEPTH (16) +#define DMA_BUF_STACK_DEPTH (32) struct dma_buf_ref { struct list_head list; @@ -75,17 +75,25 @@ void dma_buf_ref_mod(struct dma_buf *dmabuf, int nr) struct stack_trace trace = { .nr_entries = 0, .entries = entries, +#ifdef CONFIG_USER_STACKTRACE_SUPPORT + .max_entries = DMA_BUF_STACK_DEPTH/2, +#else .max_entries = DMA_BUF_STACK_DEPTH, +#endif .skip = 1 }; depot_stack_handle_t handle; save_stack_trace(&trace); +#ifdef CONFIG_USER_STACKTRACE_SUPPORT + trace.max_entries = DMA_BUF_STACK_DEPTH; + save_stack_trace_user(&trace); +#endif if (trace.nr_entries != 0 && trace.entries[trace.nr_entries-1] == ULONG_MAX) trace.nr_entries--; - handle = depot_save_stack(&trace, GFP_KERNEL); + handle = depot_save_stack(&trace, GFP_KERNEL, current->pid); if (!handle) return; diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index 62a9fa8b9019e..61f545768b68f 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -1512,7 +1512,8 @@ static void free_proc(struct dma_proc *proc) int i; hash_for_each_safe(proc->dma_bufs, i, n, tmp, head) { - fput(tmp->dmabuf->file); + if(tmp->dmabuf && tmp->dmabuf->file) + fput(tmp->dmabuf->file); hash_del(&tmp->head); kfree(tmp); } diff --git a/drivers/esoc/esoc-mdm-drv.c b/drivers/esoc/esoc-mdm-drv.c old mode 100644 new mode 100755 index d09458b7d8405..28d680a86b61c --- a/drivers/esoc/esoc-mdm-drv.c +++ b/drivers/esoc/esoc-mdm-drv.c @@ -24,7 +24,7 @@ #define ESOC_MAX_PON_TRIES 5 -#define BOOT_FAIL_ACTION_DEF BOOT_FAIL_ACTION_PANIC +#define BOOT_FAIL_ACTION_DEF BOOT_FAIL_ACTION_S3_RESET enum esoc_pon_state { PON_INIT, @@ -382,7 +382,7 @@ static int mdm_handle_boot_fail(struct esoc_clink *esoc_clink, u8 *pon_trial) if (*pon_trial == atomic_read(&mdm_drv->n_pon_tries)) { esoc_mdm_log("Reached max. number of boot trials\n"); atomic_set(&mdm_drv->boot_fail_action, - BOOT_FAIL_ACTION_PANIC); + BOOT_FAIL_ACTION_S3_RESET); } switch (atomic_read(&mdm_drv->boot_fail_action)) { @@ -438,7 +438,7 @@ static int mdm_subsys_powerup(const struct subsys_desc *crashed_subsys) subsys); struct mdm_drv *mdm_drv = esoc_get_drv_data(esoc_clink); const struct esoc_clink_ops * const clink_ops = esoc_clink->clink_ops; - int timeout = INT_MAX; + int timeout = 30*HZ; u8 pon_trial = 0; esoc_mdm_log("Powerup request from SSR\n"); diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 61c797430bd64..a950a202d663b 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -1,6 +1,6 @@ config MSM_TZ_LOG tristate "MSM Trust Zone (TZ) Log Driver" - depends on DEBUG_FS + depends on DEBUG_FS || PROC_FS help This option enables a driver with a debugfs interface for messages produced by the Secure code (Trust zone). These messages provide diff --git a/drivers/firmware/qcom/tz_log.c b/drivers/firmware/qcom/tz_log.c index f0887b823b840..8632f24222ac0 100644 --- a/drivers/firmware/qcom/tz_log.c +++ b/drivers/firmware/qcom/tz_log.c @@ -30,8 +30,12 @@ #include #include -/* QSEE_LOG_BUF_SIZE = 32K */ -#define QSEE_LOG_BUF_SIZE 0x8000 +#include +#include +#include + +/* QSEE_LOG_BUF_SIZE = 64K */ +#define QSEE_LOG_BUF_SIZE 0x10000 /* TZ Diagnostic Area legacy version number */ @@ -91,12 +95,12 @@ struct tzdbg_boot_info_t { * Boot Info Table for 64-bit */ struct tzdbg_boot_info64_t { - uint32_t wb_entry_cnt; /* Warmboot entry CPU Counter */ - uint32_t wb_exit_cnt; /* Warmboot exit CPU Counter */ - uint32_t pc_entry_cnt; /* Power Collapse entry CPU Counter */ - uint32_t pc_exit_cnt; /* Power Collapse exit CPU counter */ + uint32_t wb_entry_cnt; /* Warmboot entry CPU Counter */ + uint32_t wb_exit_cnt; /* Warmboot exit CPU Counter */ + uint32_t pc_entry_cnt; /* Power Collapse entry CPU Counter */ + uint32_t pc_exit_cnt; /* Power Collapse exit CPU counter */ uint32_t psci_entry_cnt;/* PSCI syscall entry CPU Counter */ - uint32_t psci_exit_cnt; /* PSCI syscall exit CPU Counter */ + uint32_t psci_exit_cnt; /* PSCI syscall exit CPU Counter */ uint64_t warm_jmp_addr; /* Last Warmboot Jump Address */ uint32_t warm_jmp_instr; /* Last Warmboot Jump Address Instruction */ }; @@ -165,13 +169,13 @@ struct tzdbg_log_pos_t { uint16_t offset; }; - /* - * Log ring buffer - */ +/* + * Log ring buffer + */ struct tzdbg_log_t { struct tzdbg_log_pos_t log_pos; /* open ended array to the end of the 4K IMEM buffer */ - uint8_t log_buf[]; + uint8_t log_buf[]; }; /* @@ -222,16 +226,16 @@ struct tzdbg_t { /* * Boot Info */ - struct tzdbg_boot_info_t boot_info[TZBSP_MAX_CPU_COUNT]; + struct tzdbg_boot_info_t boot_info[TZBSP_MAX_CPU_COUNT]; /* * Reset Info */ struct tzdbg_reset_info_t reset_info[TZBSP_MAX_CPU_COUNT]; uint32_t num_interrupts; - struct tzdbg_int_t int_info[TZBSP_DIAG_INT_NUM]; + struct tzdbg_int_t int_info[TZBSP_DIAG_INT_NUM]; /* Wake up info */ - struct tzbsp_diag_wakeup_info_t wakeup_info[TZBSP_MAX_CPU_COUNT]; + struct tzbsp_diag_wakeup_info_t wakeup_info[TZBSP_MAX_CPU_COUNT]; uint8_t key[TZBSP_AES_256_ENCRYPTED_KEY_SIZE]; @@ -329,7 +333,19 @@ static struct tzdbg_log_t *g_qsee_log; static dma_addr_t coh_pmem; static uint32_t debug_rw_buf_size; static bool restore_from_hibernation; +static struct proc_dir_entry *g_proc_dir; +static struct proc_dir_entry *p_qsee_log_dump_handler; +static struct proc_dir_entry *p_tz_log_dump_handler; +static DECLARE_WAIT_QUEUE_HEAD(qseelog_waitqueue); +static atomic_t qseelog_wait = ATOMIC_INIT(0); +void read_qseelog_wakeup(void) +{ + if (atomic_read(&qseelog_wait)) { + atomic_set(&qseelog_wait, 0); + wake_up_all(&qseelog_waitqueue); + } +} /* * Debugfs data structure and functions */ @@ -354,12 +370,11 @@ static int _disp_tz_vmid_stats(void) int i, num_vmid; int len = 0; struct tzdbg_vmid_t *ptr; - ptr = (struct tzdbg_vmid_t *)((unsigned char *)tzdbg.diag_buf + - tzdbg.diag_buf->vmid_info_off); + tzdbg.diag_buf->vmid_info_off); num_vmid = ((tzdbg.diag_buf->boot_info_off - - tzdbg.diag_buf->vmid_info_off)/ - (sizeof(struct tzdbg_vmid_t))); + tzdbg.diag_buf->vmid_info_off) / + (sizeof(struct tzdbg_vmid_t))); for (i = 0; i < num_vmid; i++) { if (ptr->vmid < 0xFF) { @@ -368,11 +383,13 @@ static int _disp_tz_vmid_stats(void) " 0x%x %s\n", (uint32_t)ptr->vmid, (uint8_t *)ptr->desc); } + if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into the buffer\n", - __func__); + __func__); break; } + ptr++; } @@ -386,14 +403,14 @@ static int _disp_tz_boot_stats(void) int len = 0; struct tzdbg_boot_info_t *ptr = NULL; struct tzdbg_boot_info64_t *ptr_64 = NULL; - pr_info("qsee_version = 0x%x\n", tzdbg.tz_version); + if (tzdbg.tz_version >= QSEE_VERSION_TZ_3_X) { ptr_64 = (struct tzdbg_boot_info64_t *)((unsigned char *) - tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off); + tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off); } else { ptr = (struct tzdbg_boot_info_t *)((unsigned char *) - tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off); + tzdbg.diag_buf + tzdbg.diag_buf->boot_info_off); } for (i = 0; i < tzdbg.diag_buf->cpu_count; i++) { @@ -420,9 +437,10 @@ static int _disp_tz_boot_stats(void) if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into the buffer\n", - __func__); + __func__); break; } + ptr_64++; } else { len += scnprintf(tzdbg.disp_buf + len, @@ -441,12 +459,14 @@ static int _disp_tz_boot_stats(void) if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into the buffer\n", - __func__); + __func__); break; } + ptr++; } } + tzdbg.stat[TZDBG_BOOT].data = tzdbg.disp_buf; return len; } @@ -456,9 +476,8 @@ static int _disp_tz_reset_stats(void) int i; int len = 0; struct tzdbg_reset_info_t *ptr; - ptr = (struct tzdbg_reset_info_t *)((unsigned char *)tzdbg.diag_buf + - tzdbg.diag_buf->reset_info_off); + tzdbg.diag_buf->reset_info_off); for (i = 0; i < tzdbg.diag_buf->cpu_count; i++) { len += scnprintf(tzdbg.disp_buf + len, @@ -470,12 +489,13 @@ static int _disp_tz_reset_stats(void) if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into the buffer\n", - __func__); + __func__); break; } ptr++; } + tzdbg.stat[TZDBG_RESET].data = tzdbg.disp_buf; return len; } @@ -488,16 +508,15 @@ static int _disp_tz_interrupt_stats(void) void *ptr; struct tzdbg_int_t *tzdbg_ptr; struct tzdbg_int_t_tz40 *tzdbg_ptr_tz40; - num_int = (uint32_t *)((unsigned char *)tzdbg.diag_buf + - (tzdbg.diag_buf->int_info_off - sizeof(uint32_t))); + (tzdbg.diag_buf->int_info_off - sizeof(uint32_t))); ptr = ((unsigned char *)tzdbg.diag_buf + - tzdbg.diag_buf->int_info_off); - + tzdbg.diag_buf->int_info_off); pr_info("qsee_version = 0x%x\n", tzdbg.tz_version); if (tzdbg.tz_version < QSEE_VERSION_TZ_4_X) { tzdbg_ptr = ptr; + for (i = 0; i < (*num_int); i++) { len += scnprintf(tzdbg.disp_buf + len, (debug_rw_buf_size - 1) - len, @@ -519,13 +538,15 @@ static int _disp_tz_interrupt_stats(void) if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into buf\n", - __func__); + __func__); break; } + tzdbg_ptr++; } } else { tzdbg_ptr_tz40 = ptr; + for (i = 0; i < (*num_int); i++) { len += scnprintf(tzdbg.disp_buf + len, (debug_rw_buf_size - 1) - len, @@ -547,9 +568,10 @@ static int _disp_tz_interrupt_stats(void) if (len > (debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into buf\n", - __func__); + __func__); break; } + tzdbg_ptr_tz40++; } } @@ -562,7 +584,6 @@ static int _disp_tz_log_stats_legacy(void) { int len = 0; unsigned char *ptr; - ptr = (unsigned char *)tzdbg.diag_buf + tzdbg.diag_buf->ring_off; len += scnprintf(tzdbg.disp_buf, (debug_rw_buf_size - 1) - len, @@ -573,8 +594,8 @@ static int _disp_tz_log_stats_legacy(void) } static int _disp_log_stats(struct tzdbg_log_t *log, - struct tzdbg_log_pos_t *log_start, uint32_t log_len, - size_t count, uint32_t buf_idx) + struct tzdbg_log_pos_t *log_start, uint32_t log_len, + size_t count, uint32_t buf_idx) { uint32_t wrap_start; uint32_t wrap_end; @@ -582,7 +603,6 @@ static int _disp_log_stats(struct tzdbg_log_t *log, int max_len; int len = 0; int i = 0; - wrap_start = log_start->wrap; wrap_end = log->log_pos.wrap; @@ -600,27 +620,37 @@ static int _disp_log_stats(struct tzdbg_log_t *log, log_start->wrap = log->log_pos.wrap - 1; log_start->offset = (log->log_pos.offset + 1) % log_len; } else if ((wrap_cnt == 1) && - (log->log_pos.offset > log_start->offset)) { + (log->log_pos.offset > log_start->offset)) { /* end position has overwritten start */ log_start->offset = (log->log_pos.offset + 1) % log_len; } - while (log_start->offset == log->log_pos.offset) { - /* - * No data in ring buffer, - * so we'll hang around until something happens - */ - unsigned long t = msleep_interruptible(50); + if (buf_idx == TZDBG_QSEE_LOG) { + while (log_start->offset == log->log_pos.offset) { + atomic_set(&qseelog_wait, 1); - if (t != 0) { - /* Some event woke us up, so let's quit */ - return 0; + if (wait_event_freezable(qseelog_waitqueue, atomic_read(&qseelog_wait) == 0)) { + /* Some event woke us up, so let's quit */ + return 0; + } } + } else { + while (log_start->offset == log->log_pos.offset) { + /* + * No data in ring buffer, + * so we'll hang around until something happens + */ + unsigned long t = msleep_interruptible(50); + + if (t != 0) { + /* Some event woke us up, so let's quit */ + return 0; + } - if (buf_idx == TZDBG_LOG) - memcpy_fromio((void *)tzdbg.diag_buf, tzdbg.virt_iobase, - debug_rw_buf_size); - + if (buf_idx == TZDBG_LOG) + memcpy_fromio((void *)tzdbg.diag_buf, tzdbg.virt_iobase, + debug_rw_buf_size); + } } max_len = (count > debug_rw_buf_size) ? debug_rw_buf_size : count; @@ -631,8 +661,11 @@ static int _disp_log_stats(struct tzdbg_log_t *log, while ((log_start->offset != log->log_pos.offset) && (len < max_len)) { tzdbg.disp_buf[i++] = log->log_buf[log_start->offset]; log_start->offset = (log_start->offset + 1) % log_len; - if (log_start->offset == 0) + + if (log_start->offset == 0) { ++log_start->wrap; + } + ++len; } @@ -644,8 +677,8 @@ static int _disp_log_stats(struct tzdbg_log_t *log, } static int __disp_hyp_log_stats(uint8_t *log, - struct hypdbg_log_pos_t *log_start, uint32_t log_len, - size_t count, uint32_t buf_idx) + struct hypdbg_log_pos_t *log_start, uint32_t log_len, + size_t count, uint32_t buf_idx) { struct hypdbg_t *hyp = tzdbg.hyp_diag_buf; unsigned long t = 0; @@ -655,7 +688,6 @@ static int __disp_hyp_log_stats(uint8_t *log, int max_len; int len = 0; int i = 0; - wrap_start = log_start->wrap; wrap_end = hyp->log_pos.wrap; @@ -673,7 +705,7 @@ static int __disp_hyp_log_stats(uint8_t *log, log_start->wrap = hyp->log_pos.wrap - 1; log_start->offset = (hyp->log_pos.offset + 1) % log_len; } else if ((wrap_cnt == 1) && - (hyp->log_pos.offset > log_start->offset)) { + (hyp->log_pos.offset > log_start->offset)) { /* end position has overwritten start */ log_start->offset = (hyp->log_pos.offset + 1) % log_len; } @@ -684,6 +716,7 @@ static int __disp_hyp_log_stats(uint8_t *log, * so we'll hang around until something happens */ t = msleep_interruptible(50); + if (t != 0) { /* Some event woke us up, so let's quit */ return 0; @@ -691,11 +724,11 @@ static int __disp_hyp_log_stats(uint8_t *log, /* TZDBG_HYP_LOG */ memcpy_fromio((void *)tzdbg.hyp_diag_buf, tzdbg.hyp_virt_iobase, - tzdbg.hyp_debug_rw_buf_size); + tzdbg.hyp_debug_rw_buf_size); } max_len = (count > tzdbg.hyp_debug_rw_buf_size) ? - tzdbg.hyp_debug_rw_buf_size : count; + tzdbg.hyp_debug_rw_buf_size : count; /* * Read from ring buff while there is data and space in return buff @@ -703,8 +736,11 @@ static int __disp_hyp_log_stats(uint8_t *log, while ((log_start->offset != hyp->log_pos.offset) && (len < max_len)) { tzdbg.disp_buf[i++] = log[log_start->offset]; log_start->offset = (log_start->offset + 1) % log_len; - if (log_start->offset == 0) + + if (log_start->offset == 0) { ++log_start->wrap; + } + ++len; } @@ -730,23 +766,20 @@ static int _disp_tz_log_stats(size_t count) } log_ptr = (struct tzdbg_log_t *)((unsigned char *)tzdbg.diag_buf + - tzdbg.diag_buf->ring_off - - offsetof(struct tzdbg_log_t, log_buf)); - + tzdbg.diag_buf->ring_off - + offsetof(struct tzdbg_log_t, log_buf)); return _disp_log_stats(log_ptr, &log_start, - tzdbg.diag_buf->ring_len, count, TZDBG_LOG); + tzdbg.diag_buf->ring_len, count, TZDBG_LOG); } static int _disp_hyp_log_stats(size_t count) { static struct hypdbg_log_pos_t log_start = {0}; uint8_t *log_ptr; - log_ptr = (uint8_t *)((unsigned char *)tzdbg.hyp_diag_buf + - tzdbg.hyp_diag_buf->ring_off); - + tzdbg.hyp_diag_buf->ring_off); return __disp_hyp_log_stats(log_ptr, &log_start, - tzdbg.hyp_debug_rw_buf_size, count, TZDBG_HYP_LOG); + tzdbg.hyp_debug_rw_buf_size, count, TZDBG_HYP_LOG); } static int _disp_qsee_log_stats(size_t count) @@ -764,8 +797,8 @@ static int _disp_qsee_log_stats(size_t count) } return _disp_log_stats(g_qsee_log, &log_start, - QSEE_LOG_BUF_SIZE - sizeof(struct tzdbg_log_pos_t), - count, TZDBG_QSEE_LOG); + QSEE_LOG_BUF_SIZE - sizeof(struct tzdbg_log_pos_t), + count, TZDBG_QSEE_LOG); } static int _disp_hyp_general_stats(size_t count) @@ -782,8 +815,8 @@ static int _disp_hyp_general_stats(size_t count) tzdbg.hyp_diag_buf->magic_num, tzdbg.hyp_diag_buf->cpu_count, tzdbg.hyp_diag_buf->s2_fault_counter); - ptr = tzdbg.hyp_diag_buf->boot_info; + for (i = 0; i < tzdbg.hyp_diag_buf->cpu_count; i++) { len += scnprintf((unsigned char *)tzdbg.disp_buf + len, (tzdbg.hyp_debug_rw_buf_size - 1) - len, @@ -794,9 +827,10 @@ static int _disp_hyp_general_stats(size_t count) if (len > (tzdbg.hyp_debug_rw_buf_size - 1)) { pr_warn("%s: Cannot fit all info into the buffer\n", - __func__); + __func__); break; } + ptr++; } @@ -805,66 +839,77 @@ static int _disp_hyp_general_stats(size_t count) } static ssize_t tzdbgfs_read(struct file *file, char __user *buf, - size_t count, loff_t *offp) + size_t count, loff_t *offp) { int len = 0; - int *tz_id = file->private_data; + int *tz_id = file->private_data; if (*tz_id == TZDBG_BOOT || *tz_id == TZDBG_RESET || - *tz_id == TZDBG_INTERRUPT || *tz_id == TZDBG_GENERAL || - *tz_id == TZDBG_VMID || *tz_id == TZDBG_LOG) + *tz_id == TZDBG_INTERRUPT || *tz_id == TZDBG_GENERAL || + *tz_id == TZDBG_VMID || *tz_id == TZDBG_LOG) memcpy_fromio((void *)tzdbg.diag_buf, tzdbg.virt_iobase, - debug_rw_buf_size); + debug_rw_buf_size); if (*tz_id == TZDBG_HYP_GENERAL || *tz_id == TZDBG_HYP_LOG) memcpy_fromio((void *)tzdbg.hyp_diag_buf, tzdbg.hyp_virt_iobase, - tzdbg.hyp_debug_rw_buf_size); + tzdbg.hyp_debug_rw_buf_size); switch (*tz_id) { - case TZDBG_BOOT: - len = _disp_tz_boot_stats(); - break; - case TZDBG_RESET: - len = _disp_tz_reset_stats(); - break; - case TZDBG_INTERRUPT: - len = _disp_tz_interrupt_stats(); - break; - case TZDBG_GENERAL: - len = _disp_tz_general_stats(); - break; - case TZDBG_VMID: - len = _disp_tz_vmid_stats(); - break; - case TZDBG_LOG: - if (TZBSP_DIAG_MAJOR_VERSION_LEGACY < - (tzdbg.diag_buf->version >> 16)) { - len = _disp_tz_log_stats(count); + case TZDBG_BOOT: + len = _disp_tz_boot_stats(); + break; + + case TZDBG_RESET: + len = _disp_tz_reset_stats(); + break; + + case TZDBG_INTERRUPT: + len = _disp_tz_interrupt_stats(); + break; + + case TZDBG_GENERAL: + len = _disp_tz_general_stats(); + break; + + case TZDBG_VMID: + len = _disp_tz_vmid_stats(); + break; + + case TZDBG_LOG: + if (TZBSP_DIAG_MAJOR_VERSION_LEGACY < + (tzdbg.diag_buf->version >> 16)) { + len = _disp_tz_log_stats(count); + *offp = 0; + } else { + len = _disp_tz_log_stats_legacy(); + } + + break; + + case TZDBG_QSEE_LOG: + len = _disp_qsee_log_stats(count); *offp = 0; - } else { - len = _disp_tz_log_stats_legacy(); - } - break; - case TZDBG_QSEE_LOG: - len = _disp_qsee_log_stats(count); - *offp = 0; - break; - case TZDBG_HYP_GENERAL: - len = _disp_hyp_general_stats(count); - break; - case TZDBG_HYP_LOG: - len = _disp_hyp_log_stats(count); - *offp = 0; - break; - default: - break; + break; + + case TZDBG_HYP_GENERAL: + len = _disp_hyp_general_stats(count); + break; + + case TZDBG_HYP_LOG: + len = _disp_hyp_log_stats(count); + *offp = 0; + break; + + default: + break; } - if (len > count) + if (len > count) { len = count; + } return simple_read_from_buffer(buf, len, offp, - tzdbg.stat[(*tz_id)].data, len); + tzdbg.stat[(*tz_id)].data, len); } static int tzdbgfs_open(struct inode *inode, struct file *pfile) @@ -874,12 +919,75 @@ static int tzdbgfs_open(struct inode *inode, struct file *pfile) } const struct file_operations tzdbg_fops = { - .owner = THIS_MODULE, - .read = tzdbgfs_read, - .open = tzdbgfs_open, + .owner = THIS_MODULE, + .read = tzdbgfs_read, + .open = tzdbgfs_open, +}; + + +static ssize_t qsee_log_dump_procfs_read(struct file *file, char __user *buf, + size_t count, loff_t *offp) +{ + int len = 0; + len = _disp_qsee_log_stats(count); + *offp = 0; + + if (len > count) { + len = count; + } + + return simple_read_from_buffer(buf, len, offp, + tzdbg.stat[TZDBG_QSEE_LOG].data, len); +} + + +static int qsee_log_dump_procfs_open(struct inode *inode, struct file *pfile) +{ + pfile->private_data = inode->i_private; + return 0; +} + +const struct file_operations qsee_log_dump_proc_fops = { + .owner = THIS_MODULE, + .read = qsee_log_dump_procfs_read, + .open = qsee_log_dump_procfs_open, }; +static ssize_t tz_log_dump_procfs_read(struct file *file, char __user *buf, + size_t count, loff_t *offp) +{ + int len = 0; + + if (TZBSP_DIAG_MAJOR_VERSION_LEGACY < + (tzdbg.diag_buf->version >> 16)) { + len = _disp_tz_log_stats(count); + *offp = 0; + } else { + len = _disp_tz_log_stats_legacy(); + } + + if (len > count) { + len = count; + } + + return simple_read_from_buffer(buf, len, offp, + tzdbg.stat[TZDBG_LOG].data, len); +} + + +static int tz_log_dump_procfs_open(struct inode *inode, struct file *pfile) +{ + pfile->private_data = inode->i_private; + return 0; +} + +const struct file_operations tz_log_dump_proc_fops = { + .owner = THIS_MODULE, + .read = tz_log_dump_procfs_read, + .open = tz_log_dump_procfs_open, +}; + /* * Allocates log buffer from ION, registers the buffer at TZ */ @@ -894,9 +1002,9 @@ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) int ret = 0; struct scm_desc desc = {0}; void *buf = NULL; - len = QSEE_LOG_BUF_SIZE; buf = dma_alloc_coherent(&pdev->dev, len, &coh_pmem, GFP_KERNEL); + if (buf == NULL) { pr_err("Failed to alloc memory for size %zu\n", len); return; @@ -918,9 +1026,10 @@ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) ret = scm_call2(SCM_QSEEOS_FNID(1, 6), &desc); resp.result = desc.ret[0]; } + if (ret) { pr_err("%s: scm_call to register log buffer failed\n", - __func__); + __func__); goto err; } @@ -933,20 +1042,18 @@ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) g_qsee_log->log_pos.wrap = g_qsee_log->log_pos.offset = 0; return; - err: dma_free_coherent(&pdev->dev, len, (void *)g_qsee_log, coh_pmem); return; } - -static int tzdbgfs_init(struct platform_device *pdev) +static int tzdbgfs_init(struct platform_device *pdev) { int rc = 0; int i; - struct dentry *dent_dir; - struct dentry *dent; - + struct dentry *dent_dir; + struct dentry *dent; dent_dir = debugfs_create_dir("tzdbg", NULL); + if (dent_dir == NULL) { dev_err(&pdev->dev, "tzdbg debugfs_create_dir failed\n"); return -ENOMEM; @@ -955,40 +1062,71 @@ static int tzdbgfs_init(struct platform_device *pdev) for (i = 0; i < TZDBG_STATS_MAX; i++) { tzdbg.debug_tz[i] = i; dent = debugfs_create_file_unsafe(tzdbg.stat[i].name, - 0444, dent_dir, - &tzdbg.debug_tz[i], &tzdbg_fops); + 0444, dent_dir, + &tzdbg.debug_tz[i], &tzdbg_fops); + if (dent == NULL) { dev_err(&pdev->dev, "TZ debugfs_create_file failed\n"); rc = -ENOMEM; goto err; } } + + g_proc_dir = proc_mkdir("tzdbg", 0); + + if (g_proc_dir == 0) { + printk("Unable to mkdir /proc/aMsg\n"); + pr_err("%s: qsee log dump dirs in proc create dir failed ! \n", __func__); + rc = -ENOMEM; + goto err; + } + + p_qsee_log_dump_handler = proc_create("qsee_log_dump", 0, g_proc_dir, + &qsee_log_dump_proc_fops); + + if (p_qsee_log_dump_handler == NULL) { + pr_err("%s: qsee log dump dirs in proc create qsee file failed ! \n", __func__); + } + + p_tz_log_dump_handler = proc_create("tz_log_dump", 0, g_proc_dir, + &tz_log_dump_proc_fops); + + if (p_tz_log_dump_handler == NULL) { + pr_err("%s: qsee log dump dirs in proc create tz file failed ! \n", __func__); + } + tzdbg.disp_buf = kzalloc(max(debug_rw_buf_size, - tzdbg.hyp_debug_rw_buf_size), GFP_KERNEL); - if (tzdbg.disp_buf == NULL) + tzdbg.hyp_debug_rw_buf_size), GFP_KERNEL); + + if (tzdbg.disp_buf == NULL) { goto err; + } + platform_set_drvdata(pdev, dent_dir); return 0; err: debugfs_remove_recursive(dent_dir); - return rc; } static void tzdbgfs_exit(struct platform_device *pdev) { - struct dentry *dent_dir; - + struct dentry *dent_dir; kzfree(tzdbg.disp_buf); dent_dir = platform_get_drvdata(pdev); debugfs_remove_recursive(dent_dir); + if (g_qsee_log) dma_free_coherent(&pdev->dev, QSEE_LOG_BUF_SIZE, - (void *)g_qsee_log, coh_pmem); + (void *)g_qsee_log, coh_pmem); + + if (p_qsee_log_dump_handler != NULL) { + proc_remove(p_qsee_log_dump_handler); + } } static int __update_hypdbg_base(struct platform_device *pdev, - void __iomem *virt_iobase) + void __iomem *virt_iobase) { phys_addr_t hypdiag_phy_iobase; uint32_t hyp_address_offset; @@ -997,23 +1135,24 @@ static int __update_hypdbg_base(struct platform_device *pdev, uint32_t *ptr = NULL; if (of_property_read_u32((&pdev->dev)->of_node, "hyplog-address-offset", - &hyp_address_offset)) { + &hyp_address_offset)) { dev_err(&pdev->dev, "hyplog address offset is not defined\n"); return -EINVAL; } + if (of_property_read_u32((&pdev->dev)->of_node, "hyplog-size-offset", - &hyp_size_offset)) { + &hyp_size_offset)) { dev_err(&pdev->dev, "hyplog size offset is not defined\n"); return -EINVAL; } hypdiag_phy_iobase = readl_relaxed(virt_iobase + hyp_address_offset); tzdbg.hyp_debug_rw_buf_size = readl_relaxed(virt_iobase + - hyp_size_offset); - + hyp_size_offset); tzdbg.hyp_virt_iobase = devm_ioremap_nocache(&pdev->dev, - hypdiag_phy_iobase, - tzdbg.hyp_debug_rw_buf_size); + hypdiag_phy_iobase, + tzdbg.hyp_debug_rw_buf_size); + if (!tzdbg.hyp_virt_iobase) { dev_err(&pdev->dev, "ERROR could not ioremap: start=%pr, len=%u\n", &hypdiag_phy_iobase, tzdbg.hyp_debug_rw_buf_size); @@ -1021,8 +1160,10 @@ static int __update_hypdbg_base(struct platform_device *pdev, } ptr = kzalloc(tzdbg.hyp_debug_rw_buf_size, GFP_KERNEL); - if (!ptr) + + if (!ptr) { return -ENOMEM; + } tzdbg.hyp_diag_buf = (struct hypdbg_t *)ptr; hyp = tzdbg.hyp_diag_buf; @@ -1067,14 +1208,14 @@ static int tz_log_probe(struct platform_device *pdev) phys_addr_t tzdiag_phy_iobase; uint32_t *ptr = NULL; int ret = 0; - /* * Get address that stores the physical location diagnostic data */ resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!resource) { dev_err(&pdev->dev, - "%s: ERROR Missing MEM resource\n", __func__); + "%s: ERROR Missing MEM resource\n", __func__); return -ENXIO; }; @@ -1087,7 +1228,8 @@ static int tz_log_probe(struct platform_device *pdev) * Map address that stores the physical location diagnostic data */ virt_iobase = devm_ioremap_nocache(&pdev->dev, resource->start, - debug_rw_buf_size); + debug_rw_buf_size); + if (!virt_iobase) { dev_err(&pdev->dev, "%s: ERROR could not ioremap: start=%pr, len=%u\n", @@ -1098,12 +1240,14 @@ static int tz_log_probe(struct platform_device *pdev) if (pdev->dev.of_node) { tzdbg.is_hyplog_enabled = of_property_read_bool( - (&pdev->dev)->of_node, "qcom,hyplog-enabled"); + (&pdev->dev)->of_node, "qcom,hyplog-enabled"); + if (tzdbg.is_hyplog_enabled) { ret = __update_hypdbg_base(pdev, virt_iobase); + if (ret) { dev_err(&pdev->dev, "%s() failed to get device tree data ret = %d\n", - __func__, ret); + __func__, ret); return -EINVAL; } } else { @@ -1117,12 +1261,11 @@ static int tz_log_probe(struct platform_device *pdev) * Retrieve the address of diagnostic data */ tzdiag_phy_iobase = readl_relaxed(virt_iobase); - /* * Map the diagnostic information area */ tzdbg.virt_iobase = devm_ioremap_nocache(&pdev->dev, - tzdiag_phy_iobase, debug_rw_buf_size); + tzdiag_phy_iobase, debug_rw_buf_size); if (!tzdbg.virt_iobase) { dev_err(&pdev->dev, @@ -1133,18 +1276,19 @@ static int tz_log_probe(struct platform_device *pdev) } ptr = kzalloc(debug_rw_buf_size, GFP_KERNEL); - if (ptr == NULL) + + if (ptr == NULL) { return -ENXIO; + } tzdbg.diag_buf = (struct tzdbg_t *)ptr; - if (tzdbgfs_init(pdev)) + if (tzdbgfs_init(pdev)) { goto err; + } tzdbg_register_qsee_log_buf(pdev); - tzdbg_get_tz_version(); - return 0; err: kfree(tzdbg.diag_buf); @@ -1154,10 +1298,12 @@ static int tz_log_probe(struct platform_device *pdev) static int tz_log_remove(struct platform_device *pdev) { kzfree(tzdbg.diag_buf); - if (tzdbg.hyp_diag_buf) + + if (tzdbg.hyp_diag_buf) { kzfree(tzdbg.hyp_diag_buf); - tzdbgfs_exit(pdev); + } + tzdbgfs_exit(pdev); return 0; } @@ -1208,15 +1354,16 @@ static const struct dev_pm_ops tz_log_pmops = { #endif static const struct of_device_id tzlog_match[] = { - { .compatible = "qcom,tz-log", + { + .compatible = "qcom,tz-log", }, {} }; static struct platform_driver tz_log_driver = { - .probe = tz_log_probe, - .remove = tz_log_remove, - .driver = { + .probe = tz_log_probe, + .remove = tz_log_remove, + .driver = { .name = "tz_log", .owner = THIS_MODULE, .of_match_table = tzlog_match, diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index d5b42cc86d718..ab1dccd0642f0 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -60,6 +60,18 @@ static dev_t gpio_devt; static struct bus_type gpio_bus_type = { .name = "gpio", }; +#ifdef CONFIG_DEBUG_FS +static u32 gpio_debug_suspend = 0; +#endif +#define gpio_debug_output(m, c, fmt, ...) \ +do { \ + if (m) \ + seq_printf(m, fmt, ##__VA_ARGS__); \ + else if (c) \ + pr_cont(fmt, ##__VA_ARGS__); \ + else \ + pr_info(fmt, ##__VA_ARGS__); \ +} while (0) /* gpio_lock prevents conflicts during gpio_desc[] table updates. * While any GPIO is requested, its gpio_chip is not removable; @@ -3685,7 +3697,7 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { if (gdesc->name) { - seq_printf(s, " gpio-%-3d (%-20.20s)\n", + gpio_debug_output(s, 1, " gpio-%-3d (%-20.20s)\n", gpio, gdesc->name); } continue; @@ -3694,14 +3706,14 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) gpiod_get_direction(gdesc); is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); - seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s", + gpio_debug_output(s, 1, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s", gpio, gdesc->name ? gdesc->name : "", gdesc->label, is_out ? "out" : "in ", chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ", is_irq ? "IRQ" : " "); - seq_printf(s, "\n"); + gpio_debug_output(s, 1, "\n"); } } @@ -3754,24 +3766,30 @@ static int gpiolib_seq_show(struct seq_file *s, void *v) struct device *parent; if (!chip) { - seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, - dev_name(&gdev->dev)); + if (s) + gpio_debug_output(s, 1, "%s%s: (dangling chip)", (char *)s->private, + dev_name(&gdev->dev)); + else + gpio_debug_output(s, 1, "%s: (dangling chip)", dev_name(&gdev->dev)); return 0; } - - seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, - dev_name(&gdev->dev), - gdev->base, gdev->base + gdev->ngpio - 1); + if (s) + gpio_debug_output(s, 1, "%s%s: GPIOs %d-%d", (char *)s->private, + dev_name(&gdev->dev), + gdev->base, gdev->base + gdev->ngpio - 1); + else + gpio_debug_output(s, 1, "%s: GPIOs %d-%d", dev_name(&gdev->dev), + gdev->base, gdev->base + gdev->ngpio - 1); parent = chip->parent; if (parent) - seq_printf(s, ", parent: %s/%s", + gpio_debug_output(s, 1, ", parent: %s/%s", parent->bus ? parent->bus->name : "no-bus", dev_name(parent)); if (chip->label) - seq_printf(s, ", %s", chip->label); + gpio_debug_output(s, 1, ", %s", chip->label); if (chip->can_sleep) - seq_printf(s, ", can sleep"); - seq_printf(s, ":\n"); + gpio_debug_output(s, 1, ", can sleep"); + gpio_debug_output(s, 1, ":\n"); if (chip->dbg_show) chip->dbg_show(s, chip); @@ -3788,8 +3806,31 @@ static const struct seq_operations gpiolib_seq_ops = { .show = gpiolib_seq_show, }; +void gpio_debug_print(void) +{ + struct gpio_chip *gpiochip; + int m = 0; + static const char * const gpio_chip_name[] = { + "3000000.pinctrl", + "c440000.qcom,spmi:qcom,pm8150l@4:pinctrl@c000", + "c440000.qcom,spmi:qcom,pm8150b@2:pinctrl@c000", + "c440000.qcom,spmi:qcom,pm8150@0:pinctrl@c000", + }; + + if (likely(!gpio_debug_suspend)) + return; + + pr_info("GPIOs dump:\n"); + for (m=0;mgpiodev); + } +} + static int gpiolib_open(struct inode *inode, struct file *file) { + gpio_debug_print(); return seq_open(file, &gpiolib_seq_ops); } @@ -3801,11 +3842,15 @@ static const struct file_operations gpiolib_operations = { .release = seq_release, }; +EXPORT_SYMBOL_GPL(gpio_debug_print); + static int __init gpiolib_debugfs_init(void) { /* /sys/kernel/debug/gpio */ (void) debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL, &gpiolib_operations); + + debugfs_create_u32("gpio_debug_suspend", 0644, NULL, &gpio_debug_suspend); return 0; } subsys_initcall(gpiolib_debugfs_init); diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 74efa90f47425..de61fdaf40383 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -18,7 +18,7 @@ drm-y := drm_auth.o drm_bufs.o drm_cache.o \ drm_encoder.o drm_mode_object.o drm_property.o \ drm_plane.o drm_color_mgmt.o drm_print.o \ drm_dumb_buffers.o drm_mode_config.o drm_vblank.o \ - drm_syncobj.o drm_lease.o + drm_syncobj.o drm_lease.o drm_notifier_mi.o drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o drm-$(CONFIG_DRM_VM) += drm_vm.o diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index 1669c42c40ed3..2915b6abacaa1 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -165,6 +165,8 @@ static int drm_new_set_master(struct drm_device *dev, struct drm_file *fpriv) if (old_master) drm_master_put(&old_master); + pr_info("%s: pid=%d, task_name=%s\n", __func__, task_pid_nr(current), current->comm); + return 0; out_err: diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index 83933522496d6..3f2475fa71454 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -301,9 +301,15 @@ void drm_bridge_post_disable(struct drm_bridge *bridge) if (!bridge) return; + if (bridge->is_dsi_drm_bridge) + mutex_lock(&bridge->lock); + if (bridge->funcs->post_disable) bridge->funcs->post_disable(bridge); + if (bridge->is_dsi_drm_bridge) + mutex_unlock(&bridge->lock); + drm_bridge_post_disable(bridge->next); } EXPORT_SYMBOL(drm_bridge_post_disable); @@ -352,11 +358,42 @@ void drm_bridge_pre_enable(struct drm_bridge *bridge) drm_bridge_pre_enable(bridge->next); + if (bridge->is_dsi_drm_bridge) + mutex_lock(&bridge->lock); + if (bridge->funcs->pre_enable) bridge->funcs->pre_enable(bridge); + + if (bridge->is_dsi_drm_bridge) + mutex_unlock(&bridge->lock); } EXPORT_SYMBOL(drm_bridge_pre_enable); +void drm_bridge_disp_param_set(struct drm_bridge *bridge, int cmd) +{ + if (!bridge) + return; + + drm_bridge_disp_param_set(bridge->next, cmd); + + if (bridge->funcs->disp_param_set) + bridge->funcs->disp_param_set(bridge, cmd); +} + +int drm_get_panel_info(struct drm_bridge *bridge, char *buf) +{ + int rc = 0; + if (!bridge) + return rc; + + if (bridge->funcs->disp_get_panel_info) + return bridge->funcs->disp_get_panel_info(bridge, buf); + + return rc; +} +EXPORT_SYMBOL(drm_get_panel_info); + + /** * drm_bridge_enable - enables all bridges in the encoder chain * @bridge: bridge control structure diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c old mode 100644 new mode 100755 index 392f0575de327..d7b4c0fb83b69 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -486,6 +486,31 @@ int drm_version(struct drm_device *dev, void *data, return err; } +#define MAX_TASK_NAME_LEN 30 +#define MAX_LIST_NUM 6 +char support_list[MAX_LIST_NUM][MAX_TASK_NAME_LEN] = { + "displayfeature", + "DisplayFeature", + "disp_pcc", + "displayeffect", + "factoryreset", + "recovery" +}; + +static bool drm_master_filter(char *task_name) +{ + unsigned int i = 0; + bool ret = false; + //pr_debug("%s task_name:%s \n", __func__, task_name); + for (i=0; icomm)) { + return -EACCES; + } + } /* Control clients must be explicitly allowed */ if (unlikely(!(flags & DRM_CONTROL_ALLOW) && diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 0746ac89fcc59..d72ba5dd71b07 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -1044,6 +1044,20 @@ int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline) } EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_scanline); +int mipi_dsi_dcs_set_display_brightness_ss(struct mipi_dsi_device *dsi, + u16 brightness) +{ + u8 payload[2] = { brightness >> 8, brightness & 0xff }; + ssize_t err; + + err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, + payload, sizeof(payload)); + if (err < 0) + return err; + + return 0; +} + /** * mipi_dsi_dcs_set_display_brightness() - sets the brightness value of the * display diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index 1acf3b1479a15..819e0062cc57d 100644 --- a/drivers/gpu/drm/drm_mm.c +++ b/drivers/gpu/drm/drm_mm.c @@ -118,7 +118,7 @@ static noinline void save_stack(struct drm_mm_node *node) trace.nr_entries--; /* May be called under spinlock, so avoid sleeping */ - node->stack = depot_save_stack(&trace, GFP_NOWAIT); + node->stack = depot_save_stack(&trace, GFP_NOWAIT, 0); } static void show_leaks(struct drm_mm *mm) diff --git a/drivers/gpu/drm/drm_notifier_mi.c b/drivers/gpu/drm/drm_notifier_mi.c new file mode 100644 index 0000000000000..3fa386bcdd15b --- /dev/null +++ b/drivers/gpu/drm/drm_notifier_mi.c @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include + +static BLOCKING_NOTIFIER_HEAD(mi_drm_notifier_list); + +/** + * mi_drm_register_client - register a client notifier + * @nb: notifier block to callback on events + * + * This function registers a notifier callback function + * to msm_drm_notifier_list, which would be called when + * received unblank/power down event. + */ +int mi_drm_register_client(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&mi_drm_notifier_list, nb); +} +EXPORT_SYMBOL(mi_drm_register_client); + +/** + * mi_drm_unregister_client - unregister a client notifier + * @nb: notifier block to callback on events + * + * This function unregisters the callback function from + * msm_drm_notifier_list. + */ +int mi_drm_unregister_client(struct notifier_block *nb) +{ + return blocking_notifier_chain_unregister(&mi_drm_notifier_list, nb); +} +EXPORT_SYMBOL(mi_drm_unregister_client); + +/** + * mi_drm_notifier_call_chain - notify clients of drm_events + * @val: event MSM_DRM_EARLY_EVENT_BLANK or MSM_DRM_EVENT_BLANK + * @v: notifier data, inculde display id and display blank + * event(unblank or power down). + */ +int mi_drm_notifier_call_chain(unsigned long val, void *v) +{ + return blocking_notifier_call_chain(&mi_drm_notifier_list, val, v); +} +EXPORT_SYMBOL(mi_drm_notifier_call_chain); diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c index 1c5b5ce1fd7f4..a4d850904ffbf 100644 --- a/drivers/gpu/drm/drm_sysfs.c +++ b/drivers/gpu/drm/drm_sysfs.c @@ -18,6 +18,7 @@ #include #include +#include #include #include #include "drm_internal.h" @@ -229,16 +230,189 @@ static ssize_t modes_show(struct device *device, return written; } +extern int drm_get_panel_info(struct drm_bridge *bridge, char *name); +static ssize_t panel_info_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + int written = 0; + char pname[128] = {0}; + struct drm_connector *connector = NULL; + struct drm_encoder *encoder = NULL; + struct drm_bridge *bridge = NULL; + + connector = to_drm_connector(device); + if (!connector) + return written; + + encoder = connector->encoder; + if (!encoder) + return written; + + bridge = encoder->bridge; + if (!bridge) + return written; + + written = drm_get_panel_info(bridge, pname); + if (written) + return snprintf(buf, PAGE_SIZE, "panel_name=%s\n", pname); + + return written; +} + +int dsi_bridge_disp_set_doze_backlight(struct drm_connector *connector, + int doze_backlight); +ssize_t dsi_bridge_disp_get_doze_backlight(struct drm_connector *connector, + char *buf); + +static ssize_t doze_brightness_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + struct drm_connector *connector = to_drm_connector(device); + struct drm_device *dev = connector->dev; + + return snprintf(buf, PAGE_SIZE, "%d\n", + dev->doze_brightness); +} + +static ssize_t doze_backlight_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct drm_connector *connector = to_drm_connector(device); + int doze_backlight; + int ret; + + ret = kstrtoint(buf, 0, &doze_backlight); + if (ret) + return ret; + + ret = dsi_bridge_disp_set_doze_backlight(connector, doze_backlight); + + return ret ? ret : count; +} + +static ssize_t doze_backlight_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct drm_connector *connector = to_drm_connector(dev); + return dsi_bridge_disp_get_doze_backlight(connector, buf); +} + +void drm_bridge_disp_param_set(struct drm_bridge *bridge, int cmd); +static ssize_t disp_param_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int param; + struct drm_connector *connector = NULL; + struct drm_encoder *encoder = NULL; + struct drm_bridge *bridge = NULL; + + if (!device) + return count; + + connector = to_drm_connector(device); + if (!connector) + return count; + + encoder = connector->encoder; + if (!encoder) + return count; + + bridge = encoder->bridge; + if (!bridge) + return count; + sscanf(buf, "0x%x", ¶m); + + drm_bridge_disp_param_set(bridge, param); + + return count; +} + + + +extern ssize_t get_fod_ui_status(struct drm_connector *connector); +static ssize_t fod_ui_ready_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + struct drm_connector *connector = NULL; + u32 fod_ui_ready = 0; + + connector = to_drm_connector(device); + if (!connector) + return 0; + + fod_ui_ready = get_fod_ui_status(connector); + return snprintf(buf, PAGE_SIZE, "%d\n", fod_ui_ready); +} + +ssize_t xm_fod_dim_layer_alpha_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +extern void set_fod_dimlayer_status(struct drm_connector *connector, bool enabled); +ssize_t dim_layer_enable_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct drm_connector *connector = NULL; + bool fod_dimlayer_enabled = false; + + connector = to_drm_connector(device); + if (!connector) + return 0; + + kstrtobool(buf, &fod_dimlayer_enabled); + set_fod_dimlayer_status(connector, fod_dimlayer_enabled); + + pr_info("set fod dimlayer %s", fod_dimlayer_enabled ? "true" : "false"); + return count; +} + +extern bool get_fod_dimlayer_status(struct drm_connector *connector); +static ssize_t dim_layer_enable_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + struct drm_connector *connector = NULL; + bool fod_dimlayer_enabled = false; + + connector = to_drm_connector(device); + if (!connector) + return 0; + + fod_dimlayer_enabled = get_fod_dimlayer_status(connector); + + return snprintf(buf, PAGE_SIZE, fod_dimlayer_enabled ? "enabled\n" : "disabled\n"); +} + +static DEVICE_ATTR_RW(dim_layer_enable); +static DEVICE_ATTR(dim_alpha, S_IRUGO|S_IWUSR, NULL, xm_fod_dim_layer_alpha_store); static DEVICE_ATTR_RW(status); static DEVICE_ATTR_RO(enabled); static DEVICE_ATTR_RO(dpms); static DEVICE_ATTR_RO(modes); +static DEVICE_ATTR_RO(panel_info); +static DEVICE_ATTR_WO(disp_param); +static DEVICE_ATTR_RO(doze_brightness); +static DEVICE_ATTR_RW(doze_backlight); +static DEVICE_ATTR_RO(fod_ui_ready); static struct attribute *connector_dev_attrs[] = { &dev_attr_status.attr, &dev_attr_enabled.attr, &dev_attr_dpms.attr, &dev_attr_modes.attr, + &dev_attr_panel_info.attr, + &dev_attr_disp_param.attr, + &dev_attr_doze_brightness.attr, + &dev_attr_doze_backlight.attr, + &dev_attr_dim_alpha.attr, + &dev_attr_fod_ui_ready.attr, + &dev_attr_dim_layer_enable.attr, NULL }; diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 5e1c40a8ac34d..6e6e9cac7c570 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -197,4 +197,7 @@ config DRM_SDE_RSC can vote their active state. Any active request from any client avoids the display core power collapse. A client can also register for display core power collapse events on rsc. - +config DRM_SDE_XLOG_DEBUG + bool "Trigger a panic after the dumping work has completed when SDE error" + default n + depends on DRM_MSM diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h b/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h index 7c95a128d7ea6..cae7255f94d27 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h @@ -302,12 +302,66 @@ enum dsi_cmd_set_type { DSI_CMD_SET_LP1, DSI_CMD_SET_LP2, DSI_CMD_SET_NOLP, + DSI_CMD_SET_DOZE_HBM, + DSI_CMD_SET_DOZE_LBM, DSI_CMD_SET_PPS, DSI_CMD_SET_ROI, DSI_CMD_SET_TIMING_SWITCH, DSI_CMD_SET_POST_TIMING_SWITCH, + DSI_CMD_SET_ELVSS_DIMMING_OFFSET, + DSI_CMD_SET_ELVSS_DIMMING_READ, + DSI_CMD_SET_DISP_WARM, + DSI_CMD_SET_DISP_DEFAULT, + DSI_CMD_SET_DISP_COLD, + DSI_CMD_SET_DISP_PAPER, + DSI_CMD_SET_DISP_PAPER1, + DSI_CMD_SET_DISP_PAPER2, + DSI_CMD_SET_DISP_PAPER3, + DSI_CMD_SET_DISP_PAPER4, + DSI_CMD_SET_DISP_PAPER5, + DSI_CMD_SET_DISP_PAPER6, + DSI_CMD_SET_DISP_PAPER7, + DSI_CMD_SET_DISP_NORMAL1, + DSI_CMD_SET_DISP_NORMAL2, + DSI_CMD_SET_DISP_SRGB, + DSI_CMD_SET_DISP_CEON, + DSI_CMD_SET_DISP_CEOFF, + DSI_CMD_SET_DISP_CABCUION, + DSI_CMD_SET_DISP_CABCSTILLON, + DSI_CMD_SET_DISP_CABCMOVIEON, + DSI_CMD_SET_DISP_CABCOFF, + DSI_CMD_SET_DISP_SKINCE_CABCUION, + DSI_CMD_SET_DISP_SKINCE_CABCSTILLON, + DSI_CMD_SET_DISP_SKINCE_CABCMOVIEON, + DSI_CMD_SET_DISP_SKINCE_CABCOFF, + DSI_CMD_SET_DISP_DIMMINGON, + DSI_CMD_SET_DISP_DIMMINGOFF, + DSI_CMD_SET_DISP_ACL_OFF, + DSI_CMD_SET_DISP_ACL_L1, + DSI_CMD_SET_DISP_ACL_L2, + DSI_CMD_SET_DISP_ACL_L3, + DSI_CMD_SET_DISP_LCD_HBM_L1_ON, + DSI_CMD_SET_DISP_LCD_HBM_L2_ON, + DSI_CMD_SET_DISP_LCD_HBM_OFF, + DSI_CMD_SET_DISP_HBM_ON, + DSI_CMD_SET_DISP_HBM_OFF, + DSI_CMD_SET_DISP_HBM_FOD_ON, + DSI_CMD_SET_DISP_HBM_FOD_OFF, + DSI_CMD_SET_DISP_HBM_FOD_OFF_DOZE_HBM_ON, + DSI_CMD_SET_DISP_HBM_FOD_OFF_DOZE_LBM_ON, + DSI_CMD_SET_DISP_HBM_FOD2NORM, + DSI_CMD_SET_DISP_OFF_MODE, + DSI_CMD_SET_DISP_ON_MODE, + DSI_CMD_SET_READ_XY_COORDINATE, + DSI_CMD_SET_READ_BRIGHTNESS, + DSI_CMD_SET_READ_MAX_LUMINANCE, + DSI_CMD_SET_MAX_LUMINANCE_VALID, DSI_CMD_SET_QSYNC_ON, DSI_CMD_SET_QSYNC_OFF, + DSI_CMD_SET_DISP_CRC_DCIP3, + DSI_CMD_SET_DISP_CRC_OFF, + DSI_CMD_SET_DISP_ELVSS_DIMMING_OFF, + DSI_CMD_SET_MI_READ_LOCKDOWN_INFO, DSI_CMD_SET_MAX }; diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index cf9e50a1f80d6..f9ee4e45de10c 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "msm_drv.h" #include "sde_connector.h" @@ -58,6 +59,14 @@ static const struct of_device_id dsi_display_dt_match[] = { {} }; +struct dsi_display *primary_display; +struct dsi_display *get_primary_display(void) +{ + return primary_display; +} + +EXPORT_SYMBOL(get_primary_display); + static void dsi_display_mask_ctrl_error_interrupts(struct dsi_display *display, u32 mask, bool enable) { @@ -188,6 +197,7 @@ int dsi_display_set_backlight(struct drm_connector *connector, { struct dsi_display *dsi_display = display; struct dsi_panel *panel; + struct drm_device *drm_dev; u32 bl_scale, bl_scale_ad; u64 bl_temp; int rc = 0; @@ -196,6 +206,7 @@ int dsi_display_set_backlight(struct drm_connector *connector, return -EINVAL; panel = dsi_display->panel; + drm_dev = dsi_display->drm_dev; mutex_lock(&panel->panel_lock); if (!dsi_panel_initialized(panel)) { @@ -226,6 +237,8 @@ int dsi_display_set_backlight(struct drm_connector *connector, rc = dsi_panel_set_backlight(panel, (u32)bl_temp); if (rc) pr_err("unable to set backlight\n"); + else + pr_info("set backlight successfully at: bl_scale = %u, bl_scale_ad = %u, bl_lvl = %u\n", bl_scale, bl_scale_ad, (u32)bl_temp); rc = dsi_display_clk_ctrl(dsi_display->dsi_clk_handle, DSI_CORE_CLK, DSI_CLK_OFF); @@ -240,7 +253,7 @@ int dsi_display_set_backlight(struct drm_connector *connector, return rc; } -static int dsi_display_cmd_engine_enable(struct dsi_display *display) +int dsi_display_cmd_engine_enable(struct dsi_display *display) { int rc = 0; int i; @@ -284,7 +297,7 @@ static int dsi_display_cmd_engine_enable(struct dsi_display *display) return rc; } -static int dsi_display_cmd_engine_disable(struct dsi_display *display) +int dsi_display_cmd_engine_disable(struct dsi_display *display) { int rc = 0; int i; @@ -470,7 +483,7 @@ static void dsi_display_register_te_irq(struct dsi_display *display) } /* Allocate memory for cmd dma tx buffer */ -static int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display) +int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display) { int rc = 0, cnt = 0; struct dsi_display_ctrl *display_ctrl; @@ -741,6 +754,7 @@ static int dsi_display_status_reg_read(struct dsi_display *display) done: return rc; } +EXPORT_SYMBOL(dsi_display_status_reg_read); static int dsi_display_status_bta_request(struct dsi_display *display) { @@ -853,6 +867,149 @@ int dsi_display_check_status(struct drm_connector *connector, void *display, return rc; } +static int dsi_display_write_panel(struct dsi_display *display, + struct dsi_panel_cmd_set *cmd_sets) +{ + int rc = 0, i = 0; + ssize_t len; + u32 count; + struct dsi_cmd_desc *cmds; + enum dsi_cmd_set_state state; + struct dsi_display_mode *mode; + struct dsi_panel *panel = display->panel; + const struct mipi_dsi_host_ops *ops = panel->host->ops; + + rc = dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_CORE_CLK, DSI_CLK_ON); + if (rc) { + pr_err("[%s] failed to enable DSI core clocks, rc=%d\n", + display->name, rc); + goto error; + } + + mode = panel->cur_mode; + + cmds = cmd_sets->cmds; + count = cmd_sets->count; + state = cmd_sets->state; + + if (count == 0) { + pr_debug("[%s] No commands to be sent for state\n", + panel->name); + goto error; + } + + for (i = 0; i < count; i++) { + if (state == DSI_CMD_SET_STATE_LP) + cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM; + + if (cmds->last_command) + cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND; + + len = ops->transfer(panel->host, &cmds->msg);//dsi_host_transfer, + if (len < 0) { + rc = len; + pr_err("failed to set cmds, rc=%d\n", rc); + goto error; + } + if (cmds->post_wait_ms) + usleep_range(cmds->post_wait_ms*1000, + ((cmds->post_wait_ms*1000)+10)); + cmds++; + } + + rc = dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_CORE_CLK, DSI_CLK_OFF); + if (rc) { + pr_err("[%s] failed to disable DSI core clocks, rc=%d\n", + display->name, rc); + goto error; + } +error: + return rc; +} + +int dsi_display_read_panel(struct dsi_panel *panel, struct dsi_read_config *read_config) +{ + struct mipi_dsi_host *host; + struct dsi_display *display; + struct dsi_display_ctrl *ctrl; + struct dsi_cmd_desc *cmds; + int i, rc = 0, count = 0; + u32 flags = 0; + + if (panel == NULL || read_config == NULL) + return -EINVAL; + + host = panel->host; + if (host) { + display = to_dsi_display(host); + if (display == NULL) + return -EINVAL; + } else + return -EINVAL; + + if (!panel->panel_initialized) { + pr_info("Panel not initialized\n"); + return -EINVAL; + } + + if (!read_config->enabled) { + pr_info("read operation was not permitted\n"); + return -EPERM; + } + + dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_ALL_CLKS, DSI_CLK_ON); + + ctrl = &display->ctrl[display->cmd_master_idx]; + + rc = dsi_display_cmd_engine_enable(display); + if (rc) { + pr_err("cmd engine enable failed\n"); + rc = -EPERM; + goto exit_ctrl; + } + + if (display->tx_cmd_buf == NULL) { + rc = dsi_host_alloc_cmd_tx_buffer(display); + if (rc) { + pr_err("failed to allocate cmd tx buffer memory\n"); + goto exit; + } + } + + count = read_config->read_cmd.count; + cmds = read_config->read_cmd.cmds; + if (cmds->last_command) { + cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND; + flags |= DSI_CTRL_CMD_LAST_COMMAND; + } + flags |= (DSI_CTRL_CMD_FETCH_MEMORY | DSI_CTRL_CMD_READ); + + memset(read_config->rbuf, 0x0, sizeof(read_config->rbuf)); + cmds->msg.rx_buf = read_config->rbuf; + cmds->msg.rx_len = read_config->cmds_rlen; + + rc = dsi_ctrl_cmd_transfer(ctrl->ctrl, &(cmds->msg), flags); + if (rc <= 0) { + pr_err("rx cmd transfer failed rc=%d\n", rc); + goto exit; + } + + for (i = 0; i < read_config->cmds_rlen; i++) //debug + pr_info("0x%x ", read_config->rbuf[i]); + pr_info("\n"); + +exit: + dsi_display_cmd_engine_disable(display); +exit_ctrl: + dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_ALL_CLKS, DSI_CLK_OFF); + + return rc; +} + static int dsi_display_cmd_prepare(const char *cmd_buf, u32 cmd_buf_len, struct dsi_cmd_desc *cmd, u8 *payload, u32 payload_len) { @@ -1058,23 +1215,46 @@ int dsi_display_set_power(struct drm_connector *connector, { struct dsi_display *display = disp; int rc = 0; + struct drm_notify_data g_notify_data; + struct drm_device *dev = NULL; + int event = 0; + if (!display || !display->panel) { pr_err("invalid display/panel\n"); return -EINVAL; } + if (!connector || !connector->dev) { + pr_err("invalid connector/dev\n"); + return -EINVAL; + } else { + dev = connector->dev; + event = dev->doze_state; + } + + g_notify_data.data = &event; + pr_info("%s %d\n", __func__, event); switch (power_mode) { case SDE_MODE_DPMS_LP1: + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); rc = dsi_panel_set_lp1(display->panel); + if (!rc) + dsi_panel_set_doze_backlight(display); + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); break; case SDE_MODE_DPMS_LP2: + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); rc = dsi_panel_set_lp2(display->panel); + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); break; case SDE_MODE_DPMS_ON: if (display->panel->power_mode == SDE_MODE_DPMS_LP1 || - display->panel->power_mode == SDE_MODE_DPMS_LP2) + display->panel->power_mode == SDE_MODE_DPMS_LP2) { + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); rc = dsi_panel_set_nolp(display->panel); + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); + } break; case SDE_MODE_DPMS_OFF: default: @@ -5420,6 +5600,8 @@ int dsi_display_dev_probe(struct platform_device *pdev) dsi_type = of_get_property(pdev->dev.of_node, "label", NULL); if (!dsi_type) dsi_type = "primary"; + else + pr_info("label not found\n"); if (!strcmp(dsi_type, "primary")) index = DSI_PRIMARY; @@ -5474,9 +5656,13 @@ int dsi_display_dev_probe(struct platform_device *pdev) display->disp_node = disp_node; display->name = name; + pr_info("panel name is %s\n", display->name); + display->pdev = pdev; display->boot_disp = boot_disp; display->dsi_type = dsi_type; + display->is_prim_display = true; + display->is_first_boot = true; dsi_display_parse_cmdline_topology(display, index); @@ -6396,7 +6582,7 @@ int dsi_display_get_modes(struct dsi_display *display, exit: *out_modes = display->modes; rc = 0; - + primary_display = display; error: if (rc) kfree(display->modes); @@ -7478,6 +7664,7 @@ int dsi_display_enable(struct dsi_display *display) { int rc = 0; struct dsi_display_mode *mode; + struct dsi_panel *panel; if (!display || !display->panel) { pr_err("Invalid params\n"); @@ -7489,7 +7676,7 @@ int dsi_display_enable(struct dsi_display *display) return -EINVAL; } SDE_EVT32(SDE_EVTLOG_FUNC_ENTRY); - + panel = display->panel; /* Engine states and panel states are populated during splash * resource init and hence we return early */ @@ -7504,8 +7691,37 @@ int dsi_display_enable(struct dsi_display *display) return -EINVAL; } + dsi_panel_acquire_panel_lock(display->panel); + display->panel->panel_initialized = true; pr_debug("cont splash enabled, display enable not required\n"); + + if (panel->elvss_dimming_check_enable) { + rc = dsi_display_write_panel(display, &panel->elvss_dimming_offset); + if (rc) { + dsi_panel_release_panel_lock(display->panel); + pr_err("Write elvss_dimming_offset cmds failed, rc=%d\n", rc); + return 0; + } + + rc = dsi_display_read_panel(panel, &panel->elvss_dimming_cmds); + if (rc <= 0) { + dsi_panel_release_panel_lock(display->panel); + pr_err("Read elvss_dimming_cmds failed, rc=%d\n", rc); + return 0; + } + pr_info("elvss dimming read result %x\n", panel->elvss_dimming_cmds.rbuf[0]); + ((u8 *)panel->hbm_fod_on.cmds[4].msg.tx_buf)[1] = (panel->elvss_dimming_cmds.rbuf[0]) & 0x7F; + pr_info("fod hbm on change to %x\n", ((u8 *)panel->hbm_fod_on.cmds[4].msg.tx_buf)[1]); + ((u8 *)panel->hbm_fod_off.cmds[6].msg.tx_buf)[1] = panel->elvss_dimming_cmds.rbuf[0]; + pr_info("fod hbm off change to %x\n", ((u8 *)panel->hbm_fod_off.cmds[6].msg.tx_buf)[1]); + ((u8 *)panel->hbm_fod_off_doze_hbm_on.cmds[6].msg.tx_buf)[1] = panel->elvss_dimming_cmds.rbuf[0]; + pr_info("fod hbm off doze hbm on change to %x\n", ((u8 *)panel->hbm_fod_off_doze_hbm_on.cmds[6].msg.tx_buf)[1]); + ((u8 *)panel->hbm_fod_off_doze_lbm_on.cmds[6].msg.tx_buf)[1] = panel->elvss_dimming_cmds.rbuf[0]; + pr_info("fod hbm off doze lbm on change to %x\n", ((u8 *)panel->hbm_fod_off_doze_lbm_on.cmds[6].msg.tx_buf)[1]); + } + + dsi_panel_release_panel_lock(display->panel); return 0; } diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.h b/drivers/gpu/drm/msm/dsi-staging/dsi_display.h index 7bf06a243c5ae..39b2016d887ec 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.h +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.h @@ -202,6 +202,8 @@ struct dsi_display { struct drm_connector *ext_conn; const char *name; + bool is_prim_display; + bool is_first_boot; const char *display_type; const char *dsi_type; struct list_head list; @@ -614,6 +616,10 @@ void dsi_display_enable_event(struct drm_connector *connector, int dsi_display_set_backlight(struct drm_connector *connector, void *display, u32 bl_lvl); +int dsi_panel_set_doze_backlight(struct dsi_display *display); + +ssize_t dsi_panel_get_doze_backlight(struct dsi_display *display, char *buf); + /** * dsi_display_check_status() - check if panel is dead or alive * @connector: Pointer to drm connector structure @@ -712,4 +718,10 @@ int dsi_display_cont_splash_config(void *display); int dsi_display_get_panel_vfp(void *display, int h_active, int v_active); +struct dsi_display *get_primary_display(void); + +int dsi_display_cmd_engine_enable(struct dsi_display *display); +int dsi_display_cmd_engine_disable(struct dsi_display *display); +int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display); + #endif /* _DSI_DISPLAY_H_ */ diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c index 47fc722190b33..fc611e2ed4919 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c @@ -16,6 +16,10 @@ #define pr_fmt(fmt) "dsi-drm:[%s] " fmt, __func__ #include #include +#include +#include +#include +#include #include "msm_kms.h" #include "sde_connector.h" @@ -23,21 +27,63 @@ #include "sde_trace.h" #include "sde_encoder.h" +static BLOCKING_NOTIFIER_HEAD(drm_notifier_list); + #define to_dsi_bridge(x) container_of((x), struct dsi_bridge, base) #define to_dsi_state(x) container_of((x), struct dsi_connector_state, base) - -#define DEFAULT_PANEL_JITTER_NUMERATOR 2 -#define DEFAULT_PANEL_JITTER_DENOMINATOR 1 -#define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2 -#define DEFAULT_PANEL_PREFILL_LINES 25 +#define DEFAULT_PANEL_JITTER_NUMERATOR 2 +#define DEFAULT_PANEL_JITTER_DENOMINATOR 1 +#define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2 +#define DEFAULT_PANEL_PREFILL_LINES 25 static struct dsi_display_mode_priv_info default_priv_info = { - .panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR, - .panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR, - .panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES, - .dsc_enabled = false, + .panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR, + .panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR, + .panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES, + .dsc_enabled = false, }; + +#define WAIT_RESUME_TIMEOUT 200 + +struct dsi_bridge *gbridge; +static struct delayed_work prim_panel_work; +static atomic_t prim_panel_is_on; +static struct wakeup_source prim_panel_wakelock; + +struct drm_notify_data g_notify_data; + +/* + * drm_register_client - register a client notifier + * @nb:notifier block to callback when event happen + */ +int drm_register_client(struct notifier_block *nb) +{ + return blocking_notifier_chain_register(&drm_notifier_list, nb); +} +EXPORT_SYMBOL(drm_register_client); + +/* + * drm_unregister_client - unregister a client notifier + * @nb:notifier block to callback when event happen + */ +int drm_unregister_client(struct notifier_block *nb) +{ + return blocking_notifier_chain_unregister(&drm_notifier_list, nb); +} +EXPORT_SYMBOL(drm_unregister_client); + +/* + * drm_notifier_call_chain - notify clients of drm_event + * + */ + +int drm_notifier_call_chain(unsigned long val, void *v) +{ + return blocking_notifier_call_chain(&drm_notifier_list, val, v); +} +EXPORT_SYMBOL(drm_notifier_call_chain); + static void convert_to_dsi_mode(const struct drm_display_mode *drm_mode, struct dsi_display_mode *dsi_mode) { @@ -172,6 +218,17 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) { int rc = 0; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + struct drm_device *dev = bridge->dev; + int event = 0; + + if (dev->doze_state == DRM_BLANK_POWERDOWN) { + dev->doze_state = DRM_BLANK_UNBLANK; + pr_info("%s power on from power off\n", __func__); + } + + event = dev->doze_state; + + g_notify_data.data = &event; if (!bridge) { pr_err("Invalid params\n"); @@ -185,6 +242,22 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) atomic_set(&c_bridge->display->panel->esd_recovery_pending, 0); + if (c_bridge->display->is_prim_display && atomic_read(&prim_panel_is_on)) { + cancel_delayed_work_sync(&prim_panel_work); + __pm_relax(&prim_panel_wakelock); + if (dev->fp_quickon && + (dev->doze_state == DRM_BLANK_LP1 || dev->doze_state == DRM_BLANK_LP2)) { + event = DRM_BLANK_POWERDOWN; + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); + dev->fp_quickon = false; + } + pr_info("%s panel already on\n", __func__); + return; + } + + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); + /* By this point mode should have been validated through mode_fixup */ rc = dsi_display_set_mode(c_bridge->display, &(c_bridge->dsi_mode), 0x0); @@ -218,12 +291,147 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) c_bridge->id, rc); (void)dsi_display_unprepare(c_bridge->display); } + + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); + SDE_ATRACE_END("dsi_display_enable"); rc = dsi_display_splash_res_cleanup(c_bridge->display); if (rc) pr_err("Continuous splash pipeline cleanup failed, rc=%d\n", rc); + if (c_bridge->display->is_prim_display) + atomic_set(&prim_panel_is_on, true); +} + +/** + * dsi_bridge_interface_enable - Panel light on interface for fingerprint + * In order to improve panel light on performance when unlock device by + * fingerprint, export this interface for fingerprint.Once finger touch + * happened, it could light on LCD panel in advance of android resume. + * + * @timeout: DSI bridge wait time for android resume and set panel on. + * If timeout, dsi bridge will disable panel to avoid fingerprint + * touch by mistake. + */ + +int dsi_bridge_interface_enable(int timeout) +{ + int ret = 0; + + ret = wait_event_timeout(resume_wait_q, + !atomic_read(&resume_pending), + msecs_to_jiffies(WAIT_RESUME_TIMEOUT)); + if (!ret) { + pr_info("Primary fb resume timeout\n"); + return -ETIMEDOUT; + } + + mutex_lock(&gbridge->base.lock); + + if (atomic_read(&prim_panel_is_on)) { + mutex_unlock(&gbridge->base.lock); + return 0; + } + + gbridge->base.dev->fp_quickon = true; + + __pm_stay_awake(&prim_panel_wakelock); + dsi_bridge_pre_enable(&gbridge->base); + + if (timeout > 0) + schedule_delayed_work(&prim_panel_work, msecs_to_jiffies(timeout)); + else + __pm_relax(&prim_panel_wakelock); + + mutex_unlock(&gbridge->base.lock); + return ret; +} +EXPORT_SYMBOL(dsi_bridge_interface_enable); + +int panel_disp_param_send(struct dsi_display *display, int cmd); +static void dsi_bridge_disp_param_set(struct drm_bridge *bridge, int cmd) +{ + int rc = 0; + struct dsi_bridge *c_bridge; + + if (!bridge) { + pr_err("Invalid params\n"); + return; + } + + c_bridge = to_dsi_bridge(bridge); + + SDE_ATRACE_BEGIN("panel_disp_param_send"); + rc = panel_disp_param_send(c_bridge->display, cmd); + if (rc) { + pr_err("[%d] DSI disp param send failed, rc=%d\n", + c_bridge->id, rc); + } + SDE_ATRACE_END("panel_disp_param_send"); +} + +static int dsi_bridge_get_panel_info(struct drm_bridge *bridge, char *buf) +{ + int rc = 0; + struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + + if (!c_bridge) { + pr_err("Invalid params\n"); + return rc; + } + + if (c_bridge->display->name) + return snprintf(buf, PAGE_SIZE, c_bridge->display->name); + + return rc; +} + +int dsi_panel_set_doze_backlight(struct dsi_display *display); + +ssize_t dsi_panel_get_doze_backlight(struct dsi_display *display, char *buf); + +int dsi_bridge_disp_set_doze_backlight(struct drm_connector *connector, + int doze_backlight) +{ + struct dsi_display *display = NULL; + struct dsi_bridge *c_bridge = NULL; + + if (!connector || !connector->encoder || !connector->encoder->bridge) { + pr_err("Invalid connector/encoder/bridge ptr\n"); + return -EINVAL; + } + + c_bridge = to_dsi_bridge(connector->encoder->bridge); + display = c_bridge->display; + if (!display || !display->panel || !display->drm_dev) { + pr_err("Invalid display/panel/drm_dev ptr\n"); + return -EINVAL; + } else + display->drm_dev->doze_brightness = doze_backlight; + + return dsi_panel_set_doze_backlight(display); +} + +ssize_t dsi_bridge_disp_get_doze_backlight(struct drm_connector *connector, + char *buf) +{ + struct dsi_display *display = NULL; + struct dsi_bridge *c_bridge = NULL; + + if (!connector || !connector->encoder || !connector->encoder->bridge) { + pr_err("Invalid connector/encoder/bridge ptr\n"); + return -EINVAL; + } + + c_bridge = to_dsi_bridge(connector->encoder->bridge); + display = c_bridge->display; + if (!display || !display->panel) { + pr_err("Invalid display/panel ptr\n"); + return -EINVAL; + } + + return dsi_panel_get_doze_backlight(display, buf); } static void dsi_bridge_enable(struct drm_bridge *bridge) @@ -291,12 +499,38 @@ static void dsi_bridge_post_disable(struct drm_bridge *bridge) { int rc = 0; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + struct drm_device *dev = bridge->dev; + int event = 0; + + if (dev->doze_state == DRM_BLANK_UNBLANK) { + dev->doze_state = DRM_BLANK_POWERDOWN; + pr_info("%s wrong doze state\n", __func__); + } + + event = dev->doze_state; + + g_notify_data.data = &event; if (!bridge) { pr_err("Invalid params\n"); return; } + if (c_bridge->display->is_prim_display && !atomic_read(&prim_panel_is_on)) { + pr_err("%s Already power off\n", __func__); + return; + } + + if (dev->doze_state == DRM_BLANK_LP1 || dev->doze_state == DRM_BLANK_LP2) { + pr_err("%s doze state can't power off panel\n", __func__); + event = DRM_BLANK_POWERDOWN; + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); + return; + } + + drm_notifier_call_chain(DRM_EARLY_EVENT_BLANK, &g_notify_data); + SDE_ATRACE_BEGIN("dsi_bridge_post_disable"); SDE_ATRACE_BEGIN("dsi_display_disable"); rc = dsi_display_disable(c_bridge->display); @@ -316,6 +550,27 @@ static void dsi_bridge_post_disable(struct drm_bridge *bridge) return; } SDE_ATRACE_END("dsi_bridge_post_disable"); + + drm_notifier_call_chain(DRM_EVENT_BLANK, &g_notify_data); + + if (gbridge) + gbridge->base.dev->fp_quickon = false; + + if (c_bridge->display->is_prim_display) + atomic_set(&prim_panel_is_on, false); +} + +static void prim_panel_off_delayed_work(struct work_struct *work) +{ + mutex_lock(&gbridge->base.lock); + if (atomic_read(&prim_panel_is_on)) { + dsi_bridge_post_disable(&gbridge->base); + __pm_relax(&prim_panel_wakelock); + gbridge->base.dev->fp_quickon = false; + mutex_unlock(&gbridge->base.lock); + return; + } + mutex_unlock(&gbridge->base.lock); } static void dsi_bridge_mode_set(struct drm_bridge *bridge, @@ -544,6 +799,8 @@ static const struct drm_bridge_funcs dsi_bridge_ops = { .disable = dsi_bridge_disable, .post_disable = dsi_bridge_post_disable, .mode_set = dsi_bridge_mode_set, + .disp_param_set = dsi_bridge_disp_param_set, + .disp_get_panel_info = dsi_bridge_get_panel_info, }; int dsi_conn_set_info_blob(struct drm_connector *connector, @@ -1051,6 +1308,18 @@ struct dsi_bridge *dsi_drm_bridge_init(struct dsi_display *display, } encoder->bridge = &bridge->base; + encoder->bridge->is_dsi_drm_bridge = true; + mutex_init(&encoder->bridge->lock); + + if (display->is_prim_display) { + gbridge = bridge; + atomic_set(&resume_pending, 0); + wakeup_source_init(&prim_panel_wakelock, "prim_panel_wakelock"); + atomic_set(&prim_panel_is_on, false); + init_waitqueue_head(&resume_wait_q); + INIT_DELAYED_WORK(&prim_panel_work, prim_panel_off_delayed_work); + } + return bridge; error_free_bridge: kfree(bridge); @@ -1063,5 +1332,11 @@ void dsi_drm_bridge_cleanup(struct dsi_bridge *bridge) if (bridge && bridge->base.encoder) bridge->base.encoder->bridge = NULL; + if (bridge == gbridge) { + atomic_set(&prim_panel_is_on, false); + cancel_delayed_work_sync(&prim_panel_work); + wakeup_source_trash(&prim_panel_wakelock); + } + kfree(bridge); } diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.h b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.h index e0d89f8b57bab..272639855ee7d 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.h +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.h @@ -30,6 +30,7 @@ struct dsi_bridge { struct dsi_display *display; struct dsi_display_mode dsi_mode; + struct mutex lock; }; /** diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c old mode 100644 new mode 100755 index 42ab09cf3b276..2c09e234b0ced --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -19,11 +19,25 @@ #include #include #include