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[test][AArch64][CodeGen] Enhance GOT-related tests (llvm#101968)
- use `-NEXT` for check lines where applicable (as discussed in llvm#96164 (comment)); - move to shorter check prefixes where applicable (e.g. `CHECK` instead of `CHECK-PIC` if it's the only prefix used in the file); - minor formatting.
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‎llvm/test/CodeGen/AArch64/basic-pic.ll‎

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -4,21 +4,19 @@
44

55
define i32 @get_globalvar() {
66
; CHECK-LABEL: get_globalvar:
7+
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
8+
; CHECK-NEXT: ldr x[[GOTLOC:[0-9]+]], [x[[GOTHI]], :got_lo12:var]
9+
; CHECK-NEXT: ldr w0, [x[[GOTLOC]]]
710

811
%val = load i32, ptr @var
9-
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
10-
; CHECK: ldr x[[GOTLOC:[0-9]+]], [x[[GOTHI]], :got_lo12:var]
11-
; CHECK: ldr w0, [x[[GOTLOC]]]
12-
1312
ret i32 %val
1413
}
1514

1615
define ptr @get_globalvaraddr() {
1716
; CHECK-LABEL: get_globalvaraddr:
17+
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
18+
; CHECK-NEXT: ldr x0, [x[[GOTHI]], :got_lo12:var]
1819

1920
%val = load i32, ptr @var
20-
; CHECK: adrp x[[GOTHI:[0-9]+]], :got:var
21-
; CHECK: ldr x0, [x[[GOTHI]], :got_lo12:var]
22-
2321
ret ptr @var
2422
}

‎llvm/test/CodeGen/AArch64/elf-globals-pic.ll‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
; RUN: llc -mtriple=arm64 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC
2-
; RUN: llc -mtriple=arm64 -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC
1+
; RUN: llc -mtriple=arm64 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK
2+
; RUN: llc -mtriple=arm64 -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
33

44
@var8 = external global i8, align 1
55
@var16 = external global i16, align 2
@@ -10,14 +10,14 @@ define i8 @test_i8(i8 %new) {
1010
%val = load i8, ptr @var8, align 1
1111
store i8 %new, ptr @var8
1212
ret i8 %val
13-
; CHECK-PIC-LABEL: test_i8:
14-
; CHECK-PIC: adrp x[[HIREG:[0-9]+]], :got:var8
15-
; CHECK-PIC: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
16-
; CHECK-PIC: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]]
13+
; CHECK-LABEL: test_i8:
14+
; CHECK: adrp x[[HIREG:[0-9]+]], :got:var8
15+
; CHECK-NEXT: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
16+
; CHECK-NEXT: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]]
1717

18-
; CHECK-FAST-PIC: adrp x[[HIREG:[0-9]+]], :got:var8
19-
; CHECK-FAST-PIC: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
20-
; CHECK-FAST-PIC: ldr {{w[0-9]+}}, [x[[VARADDR]]]
18+
; CHECK-FAST: adrp x[[HIREG:[0-9]+]], :got:var8
19+
; CHECK-FAST-NEXT: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
20+
; CHECK-FAST-NEXT: ldrb {{w[0-9]+}}, [x[[VARADDR]]]
2121
}
2222

2323
define i16 @test_i16(i16 %new) {
@@ -50,11 +50,11 @@ define i32 @test_vis() {
5050
%rhs = load i32, ptr @protectedvar, align 4
5151
%ret = add i32 %lhs, %rhs
5252
ret i32 %ret
53-
; CHECK-PIC-LABEL: test_vis:
54-
; CHECK-PIC: adrp {{x[0-9]+}}, hiddenvar
55-
; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar]
56-
; CHECK-PIC: adrp {{x[0-9]+}}, protectedvar
57-
; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar]
53+
; CHECK-LABEL: test_vis:
54+
; CHECK: adrp {{x[0-9]+}}, hiddenvar
55+
; CHECK-NEXT: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar]
56+
; CHECK-NEXT: adrp {{x[0-9]+}}, protectedvar
57+
; CHECK-NEXT: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar]
5858
}
5959

6060
@var_default = external global [2 x i32]

‎llvm/test/CodeGen/AArch64/extern-weak.ll‎

Lines changed: 19 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -11,19 +11,18 @@ define ptr @foo() {
1111
; otherwise a litpool entry.
1212
ret ptr @var
1313

14-
15-
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:var
16-
; CHECK: ldr x0, [x[[ADDRHI]], :got_lo12:var]
14+
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:var
15+
; CHECK-NEXT: ldr x0, [x[[ADDRHI]], :got_lo12:var]
1716

1817
; In the large model, the usual relocations are absolute and can
1918
; materialise 0.
20-
; CHECK-LARGE: movz x0, #:abs_g0_nc:var
21-
; CHECK-LARGE: movk x0, #:abs_g1_nc:var
22-
; CHECK-LARGE: movk x0, #:abs_g2_nc:var
23-
; CHECK-LARGE: movk x0, #:abs_g3:var
19+
; CHECK-LARGE: movz x0, #:abs_g0_nc:var
20+
; CHECK-LARGE-NEXT: movk x0, #:abs_g1_nc:var
21+
; CHECK-LARGE-NEXT: movk x0, #:abs_g2_nc:var
22+
; CHECK-LARGE-NEXT: movk x0, #:abs_g3:var
2423

2524
; In the tiny codemodel we us a got relocated LDR.
26-
; CHECK-TINY: ldr x0, :got:var
25+
; CHECK-TINY: ldr x0, :got:var
2726
}
2827

2928

@@ -32,10 +31,9 @@ define ptr @foo() {
3231
define ptr @bar() {
3332
%addr = getelementptr [10 x i32], ptr @arr_var, i32 0, i32 5
3433

35-
36-
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:arr_var
37-
; CHECK: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
38-
; CHECK: add x0, [[BASE]], #20
34+
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:arr_var
35+
; CHECK-NEXT: ldr [[BASE:x[0-9]+]], [x[[ADDRHI]], :got_lo12:arr_var]
36+
; CHECK-NEXT: add x0, [[BASE]], #20
3937

4038
ret ptr %addr
4139

@@ -44,22 +42,22 @@ define ptr @bar() {
4442
; CHECK-LARGE-NEXT: ldr x[[ADDR]], [x[[ADDR]], :got_lo12:arr_var]
4543
; CHECK-LARGE-NEXT: add x0, x[[ADDR]], #20
4644

47-
; CHECK-TINY: ldr [[BASE:x[0-9]+]], :got:arr_var
48-
; CHECK-TINY: add x0, [[BASE]], #20
45+
; CHECK-TINY: ldr [[BASE:x[0-9]+]], :got:arr_var
46+
; CHECK-TINY-NEXT: add x0, [[BASE]], #20
4947
}
5048

5149
@defined_weak_var = internal unnamed_addr global i32 0
5250

5351
define ptr @wibble() {
5452
ret ptr @defined_weak_var
5553

56-
; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
57-
; CHECK: add x0, [[BASE]], :lo12:defined_weak_var
54+
; CHECK: adrp [[BASE:x[0-9]+]], defined_weak_var
55+
; CHECK-NEXT: add x0, [[BASE]], :lo12:defined_weak_var
5856

59-
; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
60-
; CHECK-LARGE: movk x0, #:abs_g1_nc:defined_weak_var
61-
; CHECK-LARGE: movk x0, #:abs_g2_nc:defined_weak_var
62-
; CHECK-LARGE: movk x0, #:abs_g3:defined_weak_var
57+
; CHECK-LARGE: movz x0, #:abs_g0_nc:defined_weak_var
58+
; CHECK-LARGE-NEXT: movk x0, #:abs_g1_nc:defined_weak_var
59+
; CHECK-LARGE-NEXT: movk x0, #:abs_g2_nc:defined_weak_var
60+
; CHECK-LARGE-NEXT: movk x0, #:abs_g3:defined_weak_var
6361

64-
; CHECK-TINY: adr x0, defined_weak_var
62+
; CHECK-TINY: adr x0, defined_weak_var
6563
}

‎llvm/test/CodeGen/AArch64/got-abuse.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@ define void @foo() nounwind {
1616
; CHECK-LABEL: foo:
1717
entry:
1818
call void @consume(i32 ptrtoint (ptr @func to i32))
19-
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:func
20-
; CHECK: ldr {{x[0-9]+}}, [x[[ADDRHI]], {{#?}}:got_lo12:func]
19+
; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:func
20+
; CHECK-NEXT: ldr {{x[0-9]+}}, [x[[ADDRHI]], {{#?}}:got_lo12:func]
2121
ret void
2222
}
2323

‎llvm/test/CodeGen/AArch64/tagged-globals-pic.ll‎

Lines changed: 20 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
1-
; RUN: llc --relocation-model=pic < %s \
2-
; RUN: | FileCheck %s --check-prefix=CHECK-PIC
1+
; RUN: llc --relocation-model=pic < %s | FileCheck %s
32

43
; Ensure that GlobalISel lowers correctly. GlobalISel is the default ISel for
54
; -O0 on aarch64. GlobalISel lowers the instruction sequence in the static
@@ -13,7 +12,7 @@
1312
; mind the code size and performance increase.
1413

1514
; RUN: llc --aarch64-enable-global-isel-at-O=0 -O0 --relocation-model=pic < %s \
16-
; RUN: | FileCheck %s --check-prefix=CHECK-PIC
15+
; RUN: | FileCheck %s
1716

1817
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
1918
target triple = "aarch64-unknown-linux-android"
@@ -22,41 +21,41 @@ target triple = "aarch64-unknown-linux-android"
2221
declare void @func()
2322

2423
define ptr @global_addr() #0 {
25-
; CHECK-PIC: global_addr:
26-
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
27-
; CHECK-PIC: ldr x0, [[[REG]], :got_lo12:global]
28-
; CHECK-PIC: ret
24+
; CHECK-LABEL: global_addr:
25+
; CHECK: adrp [[REG:x[0-9]+]], :got:global
26+
; CHECK-NEXT: ldr x0, [[[REG]], :got_lo12:global]
27+
; CHECK-NEXT: ret
2928

3029
ret ptr @global
3130
}
3231

3332
define i32 @global_load() #0 {
34-
; CHECK-PIC: global_load:
35-
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
36-
; CHECK-PIC: ldr [[REG]], [[[REG]], :got_lo12:global]
37-
; CHECK-PIC: ldr w0, [[[REG]]]
38-
; CHECK-PIC: ret
33+
; CHECK-LABEL: global_load:
34+
; CHECK: adrp [[REG:x[0-9]+]], :got:global
35+
; CHECK-NEXT: ldr [[REG]], [[[REG]], :got_lo12:global]
36+
; CHECK-NEXT: ldr w0, [[[REG]]]
37+
; CHECK-NEXT: ret
3938

4039
%load = load i32, ptr @global
4140
ret i32 %load
4241
}
4342

4443
define void @global_store() #0 {
45-
; CHECK-PIC: global_store:
46-
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:global
47-
; CHECK-PIC: ldr [[REG]], [[[REG]], :got_lo12:global]
48-
; CHECK-PIC: str wzr, [[[REG]]]
49-
; CHECK-PIC: ret
44+
; CHECK-LABEL: global_store:
45+
; CHECK: adrp [[REG:x[0-9]+]], :got:global
46+
; CHECK-NEXT: ldr [[REG]], [[[REG]], :got_lo12:global]
47+
; CHECK-NEXT: str wzr, [[[REG]]]
48+
; CHECK-NEXT: ret
5049

5150
store i32 0, ptr @global
5251
ret void
5352
}
5453

5554
define ptr @func_addr() #0 {
56-
; CHECK-PIC: func_addr:
57-
; CHECK-PIC: adrp [[REG:x[0-9]+]], :got:func
58-
; CHECK-PIC: ldr x0, [[[REG]], :got_lo12:func]
59-
; CHECK-PIC: ret
55+
; CHECK-LABEL: func_addr:
56+
; CHECK: adrp [[REG:x[0-9]+]], :got:func
57+
; CHECK-NEXT: ldr x0, [[[REG]], :got_lo12:func]
58+
; CHECK-NEXT: ret
6059

6160
ret ptr @func
6261
}

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