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1. AUCOHL/Fault AUCOHL/Fault Public

   A complete open-source design-for-testing (DFT) Solution

   Swift 169 34

2. scale-lab/MetRex scale-lab/MetRex Public

   A Benchmark for Verilog Code Metric Reasoning (ASPDAC'25)

   Python 8

3. scale-lab/ChipXplore scale-lab/ChipXplore Public

   Natural Language Exploration of Hardware Designs and Libraries (ICLAD'25) -- Best Paper Award

   Python 4

4. efabless/caravel efabless/caravel Public

   Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.

   Verilog 366 99

5. efabless/caravel_user_project efabless/caravel_user_project Public template

   https://caravel-user-project.readthedocs.io

   Verilog 223 369

6. Fault-SPM Fault-SPM Public

   SPM with DFT structure automatically injected by Fault

   Verilog 5 1