zephyr-cp: SPI loopback device and bus construction from pins on native_sim

A circuitpython,spi-loopback emulator on spi0 reads back every byte
sent. On native_sim, iobroker now gives any pins the emulated SPI
controller, so a bus can be constructed from pins, as on real boards.
tests/test_spi.py checks busio.SPI through the loopback.

Author: lynt-smitka

ports/zephyr-cp/CMakeLists.txt

@@ -19,7 +19,7 @@ target_sources(app PRIVATE zephyr_main.c)
 
 # Add I2C emulator control for native_sim testing
 if(CONFIG_BOARD_NATIVE_SIM)
-    target_sources(app PRIVATE native_sim_i2c_emul_control.c)
+    target_sources(app PRIVATE native_sim_i2c_emul_control.c native_sim_spi_loopback_emul.c)
 endif()
 
 if(CONFIG_TRACING_PERFETTO)

ports/zephyr-cp/boards/native/native_sim/board.overlay

@@ -36,4 +36,13 @@
 	};
 };
 
+/* An SPI loopback for testing: MOSI wired to MISO. */
+&spi0 {
+	loopback: loopback@0 {
+		compatible = "circuitpython,spi-loopback";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
 #include "../../../app.overlay"

ports/zephyr-cp/boards/native/native_sim_lfs/board.overlay

@@ -68,3 +68,12 @@
 };
 
 #include "../../../app.overlay"
+
+/* An SPI loopback for testing: MOSI wired to MISO. */
+&spi0 {
+	loopback: loopback@0 {
+		compatible = "circuitpython,spi-loopback";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};

ports/zephyr-cp/dts/bindings/circuitpython,spi-loopback.yaml

@@ -0,0 +1,8 @@
+# SPDX-FileCopyrightText: 2026 Vladimir Smitka
+# SPDX-License-Identifier: MIT
+
+description: SPI loopback for tests, MOSI wired to MISO
+
+compatible: "circuitpython,spi-loopback"
+
+include: spi-device.yaml

ports/zephyr-cp/internal-modules/iobroker/src/iobroker.c

@@ -14,6 +14,8 @@
 #include <errno.h>
 #include <stddef.h>
 
+#include <zephyr/device.h>
+#include <zephyr/devicetree.h>
 #include <zephyr/logging/log.h>
 #include <zephyr/sys/util.h>
 
@@ -87,13 +89,29 @@ int iobroker_i2c_allocate(package_pin_t sda, package_pin_t scl,
     return -ENOSYS;
 }
 
+#if defined(CONFIG_BOARD_NATIVE_SIM) && DT_HAS_COMPAT_STATUS_OKAY(zephyr_spi_emul_controller)
+// native_sim has no pins to route. Any pins get the emulated SPI controller, so that tests can
+// construct an SPI bus from pins.
+#define NATIVE_SIM_SPI DEVICE_DT_GET_ONE(zephyr_spi_emul_controller)
+static bool native_sim_spi_in_use;
+#endif
+
 int iobroker_spi_allocate(package_pin_t clock, package_pin_t mosi,
     package_pin_t miso, const struct device **dev_out) {
     (void)clock;
     (void)mosi;
     (void)miso;
+    #ifdef NATIVE_SIM_SPI
+    if (native_sim_spi_in_use) {
+        return -ENODEV;
+    }
+    native_sim_spi_in_use = true;
+    *dev_out = NATIVE_SIM_SPI;
+    return 0;
+    #else
     (void)dev_out;
     return -ENOSYS;
+    #endif
 }
 
 int iobroker_uart_allocate(package_pin_t tx, package_pin_t rx,
@@ -107,6 +125,11 @@ int iobroker_uart_allocate(package_pin_t tx, package_pin_t rx,
 }
 
 bool iobroker_release(const struct device *dev) {
+    #ifdef NATIVE_SIM_SPI
+    if (dev == NATIVE_SIM_SPI) {
+        native_sim_spi_in_use = false;
+    }
+    #endif
     (void)dev;
     LOG_DBG("release: no routing support on this SoC, nothing to release");
     return false;

ports/zephyr-cp/native_sim_spi_loopback_emul.c

@@ -0,0 +1,64 @@
+// This file is part of the CircuitPython project: https://circuitpython.org
+//
+// SPDX-FileCopyrightText: Copyright (c) 2026 Vladimir Smitka
+//
+// SPDX-License-Identifier: MIT
+
+// An SPI loopback device for native_sim: MOSI is wired to MISO, so every byte sent is read back.
+// With nothing to send the line idles low. Tests use it through busio.SPI and async_spi.SPI.
+
+#define DT_DRV_COMPAT circuitpython_spi_loopback
+
+#include <zephyr/device.h>
+#include <zephyr/drivers/emul.h>
+#include <zephyr/drivers/spi.h>
+#include <zephyr/drivers/spi_emul.h>
+
+static int loopback_io(const struct emul *target, const struct spi_config *config,
+    const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs) {
+    ARG_UNUSED(target);
+    ARG_UNUSED(config);
+    if (rx_bufs == NULL) {
+        return 0;
+    }
+    // A buffer with no data stands for that many idle or dropped bytes, as in Zephyr's drivers.
+    size_t tx_i = 0;
+    size_t tx_pos = 0;
+    for (size_t i = 0; i < rx_bufs->count; i++) {
+        uint8_t *rx = rx_bufs->buffers[i].buf;
+        for (size_t j = 0; j < rx_bufs->buffers[i].len; j++) {
+            uint8_t value = 0;
+            while (tx_bufs != NULL && tx_i < tx_bufs->count && tx_pos >= tx_bufs->buffers[tx_i].len) {
+                tx_i++;
+                tx_pos = 0;
+            }
+            if (tx_bufs != NULL && tx_i < tx_bufs->count) {
+                const uint8_t *tx = tx_bufs->buffers[tx_i].buf;
+                if (tx != NULL) {
+                    value = tx[tx_pos];
+                }
+                tx_pos++;
+            }
+            if (rx != NULL) {
+                rx[j] = value;
+            }
+        }
+    }
+    return 0;
+}
+
+static int loopback_init(const struct emul *target, const struct device *parent) {
+    ARG_UNUSED(target);
+    ARG_UNUSED(parent);
+    return 0;
+}
+
+static const struct spi_emul_api loopback_api = {
+    .io = loopback_io,
+};
+
+#define LOOPBACK_DEFINE(n) \
+    DEVICE_DT_INST_DEFINE(n, NULL, NULL, NULL, NULL, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, NULL); \
+    EMUL_DT_INST_DEFINE(n, loopback_init, NULL, NULL, &loopback_api, NULL);
+
+DT_INST_FOREACH_STATUS_OKAY(LOOPBACK_DEFINE)

ports/zephyr-cp/tests/test_spi.py

@@ -0,0 +1,54 @@
+# SPDX-FileCopyrightText: 2026 Vladimir Smitka
+# SPDX-License-Identifier: MIT
+
+"""busio.SPI on native_sim, through the SPI loopback device."""
+
+import pytest
+
+LOOPBACK_CODE = """\
+import board
+
+spi = board.SPI()
+while not spi.try_lock():
+    pass
+spi.configure(baudrate=1_000_000)
+bad = 0
+for n in (1, 31, 32, 33, 4096):
+    out = bytes(i * 7 & 0xFF for i in range(n))
+    inb = bytearray(n)
+    spi.write_readinto(out, inb)
+    if inb != out:
+        bad += 1
+        print("write_readinto", n, "differs")
+    spi.readinto(inb, write_value=0xA5)
+    if inb != b"\\xa5" * n:
+        bad += 1
+        print("readinto 0xA5", n, "differs")
+    spi.readinto(inb)
+    if inb != bytes(n):
+        bad += 1
+        print("readinto 0", n, "differs")
+    spi.write(out)
+out = bytes(range(64))
+inb = bytearray(64)
+spi.write_readinto(out, inb, out_start=8, out_end=40, in_start=8, in_end=40)
+if inb[8:40] != out[8:40] or any(inb[:8]) or any(inb[40:]):
+    bad += 1
+    print("slices differ")
+spi.unlock()
+spi.deinit()
+print("frequency", spi.frequency if False else "ok")
+print("bad", bad)
+print("done")
+"""
+
+
+@pytest.mark.circuitpy_drive({"code.py": LOOPBACK_CODE})
+def test_spi_loopback(circuitpython):
+    """Blocking transfers come back through the loopback, including slices and reads."""
+    circuitpython.wait_until_done()
+
+    output = circuitpython.serial.all_output
+    assert "differs" not in output
+    assert "bad 0" in output
+    assert "done" in output