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SDCard.c
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SDCard.c
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#include <stdbool.h> // Needed for bool and true/false
#include <stdint.h> // Needed for uint8_t, uint32_t, uint64_t etc
#include <ctype.h> // Needed for toupper for wildcard string match
#include <wchar.h> // Needed for UTF for long file name support
#include <string.h> // Needed for string copy
#include "rpi-smartstart.h" // Provides all basic hardware access
#include "emb-stdio.h" // Provides printf functionality
#include "SDCard.h" // This units header
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++}
{ }
{ Filename: SDCard.c }
{ Copyright(c): Leon de Boer(LdB) 2017 }
{ Version: 1.01 }
{ Original start code from hldswrth use from the Pi Forum }
{ }
{***************[ THIS CODE IS FREEWARE UNDER CC Attribution]***************}
{ }
{ This sourcecode is released for the purpose to promote programming }
{ on the Raspberry Pi. You may redistribute it and/or modify with the }
{ following disclaimer and condition. }
{ }
{ The SOURCE CODE is distributed "AS IS" WITHOUT WARRANTIES AS TO }
{ PERFORMANCE OF MERCHANTABILITY WHETHER EXPRESSED OR IMPLIED. }
{ Redistributions of source code must retain the copyright notices to }
{ maintain the author credit (attribution) . }
{ }
{***************************************************************************/
/*--------------------------------------------------------------------------}
{ These are SmartStart functions we use. If you wish to port this code }
{ you will need to provide equivalent 3 functions on any new system. }
{--------------------------------------------------------------------------*/
#define waitMicro timer_wait // Waits a number of microseconds
#define TICKCOUNT timer_getTickCount // Gets current system clock value (1Mhz accuracy)
#define TIMEDIFF tick_difference // Given two TICKCOUNT values calculates microseconds between them.
/* Smartstart also defines a function pointer .... int (*printhandler) (const char *fmt, ...); */
printhandler LOG_ERROR = NULL; // LOG_ERROR is a function pointer of that printhandler format
/*--------------------------------------------------------------------------}
{ This controls if debugging code is compiled or removed at compile time }
{--------------------------------------------------------------------------*/
#define DEBUG_INFO 0 // Compile debugging message code .... set to 1 and other value means no compilation
/*--------------------------------------------------------------------------}
{ The working part of the DEBUG_INFO macro to make compilation on or off }
{--------------------------------------------------------------------------*/
#if DEBUG_INFO == 1
#define LOG_DEBUG(...) printf( __VA_ARGS__ ) // This displays debugging messages to function given
#else
#define LOG_DEBUG(...) // This just swallows debug code, it doesn't even get compiled
#endif
/***************************************************************************}
{ PRIVATE INTERNAL SD HOST REGISTER STRUCTURES AS PER BCM2835 MANUAL }
****************************************************************************/
/*--------------------------------------------------------------------------}
{ EMMC BLKSIZECNT register - BCM2835.PDF Manual Section 5 page 68 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regBLKSIZECNT {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned BLKSIZE : 10; // @0-9 Block size in bytes
unsigned reserved : 6; // @10-15 Write as zero read as don't care
volatile unsigned BLKCNT : 16; // @16-31 Number of blocks to be transferred
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC CMDTM register - BCM2835.PDF Manual Section 5 pages 69-70 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regCMDTM {
union {
struct __attribute__((__packed__, aligned(1))) {
unsigned reserved : 1; // @0 Write as zero read as don't care
volatile unsigned TM_BLKCNT_EN : 1; // @1 Enable the block counter for multiple block transfers
volatile enum { TM_NO_COMMAND = 0, // no command
TM_CMD12 = 1, // command CMD12
TM_CMD23 = 2, // command CMD23
TM_RESERVED = 3,
} TM_AUTO_CMD_EN : 2; // @2-3 Select the command to be send after completion of a data transfer
volatile unsigned TM_DAT_DIR : 1; // @4 Direction of data transfer (0 = host to card , 1 = card to host )
volatile unsigned TM_MULTI_BLOCK : 1; // @5 Type of data transfer (0 = single block, 1 = muli block)
unsigned reserved1 : 10; // @6-15 Write as zero read as don't care
volatile enum { CMD_NO_RESP = 0, // no response
CMD_136BIT_RESP = 1, // 136 bits response
CMD_48BIT_RESP = 2, // 48 bits response
CMD_BUSY48BIT_RESP = 3, // 48 bits response using busy
} CMD_RSPNS_TYPE : 2; // @16-17
unsigned reserved2 : 1; // @18 Write as zero read as don't care
volatile unsigned CMD_CRCCHK_EN : 1; // @19 Check the responses CRC (0=disabled, 1= enabled)
volatile unsigned CMD_IXCHK_EN : 1; // @20 Check that response has same index as command (0=disabled, 1= enabled)
volatile unsigned CMD_ISDATA : 1; // @21 Command involves data transfer (0=disabled, 1= enabled)
volatile enum { CMD_TYPE_NORMAL = 0, // normal command
CMD_TYPE_SUSPEND = 1, // suspend command
CMD_TYPE_RESUME = 2, // resume command
CMD_TYPE_ABORT = 3, // abort command
} CMD_TYPE : 2; // @22-23
volatile unsigned CMD_INDEX : 6; // @24-29
unsigned reserved3 : 2; // @30-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC STATUS register - BCM2835.PDF Manual Section 5 page 72 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regSTATUS {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned CMD_INHIBIT : 1; // @0 Command line still used by previous command
volatile unsigned DAT_INHIBIT : 1; // @1 Data lines still used by previous data transfer
volatile unsigned DAT_ACTIVE : 1; // @2 At least one data line is active
unsigned reserved : 5; // @3-7 Write as zero read as don't care
volatile unsigned WRITE_TRANSFER : 1; // @8 New data can be written to EMMC
volatile unsigned READ_TRANSFER : 1; // @9 New data can be read from EMMC
unsigned reserved1 : 10; // @10-19 Write as zero read as don't care
volatile unsigned DAT_LEVEL0 : 4; // @20-23 Value of data lines DAT3 to DAT0
volatile unsigned CMD_LEVEL : 1; // @24 Value of command line CMD
volatile unsigned DAT_LEVEL1 : 4; // @25-28 Value of data lines DAT7 to DAT4
unsigned reserved2 : 3; // @29-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC CONTROL0 register - BCM2835.PDF Manual Section 5 page 73/74 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regCONTROL0 {
union {
struct __attribute__((__packed__, aligned(1))) {
unsigned reserved : 1; // @0 Write as zero read as don't care
volatile unsigned HCTL_DWIDTH : 1; // @1 Use 4 data lines (true = enable)
volatile unsigned HCTL_HS_EN : 1; // @2 Select high speed mode (true = enable)
unsigned reserved1 : 2; // @3-4 Write as zero read as don't care
volatile unsigned HCTL_8BIT : 1; // @5 Use 8 data lines (true = enable)
unsigned reserved2 : 10; // @6-15 Write as zero read as don't care
volatile unsigned GAP_STOP : 1; // @16 Stop the current transaction at the next block gap
volatile unsigned GAP_RESTART : 1; // @17 Restart a transaction last stopped using the GAP_STOP
volatile unsigned READWAIT_EN : 1; // @18 Use DAT2 read-wait protocol for cards supporting this
volatile unsigned GAP_IEN : 1; // @19 Enable SDIO interrupt at block gap
volatile unsigned SPI_MODE : 1; // @20 SPI mode enable
volatile unsigned BOOT_EN : 1; // @21 Boot mode access
volatile unsigned ALT_BOOT_EN : 1; // @22 Enable alternate boot mode access
unsigned reserved3 : 9; // @23-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC CONTROL1 register - BCM2835.PDF Manual Section 5 page 74/75 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regCONTROL1 {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned CLK_INTLEN : 1; // @0 Clock enable for internal EMMC clocks for power saving
volatile const unsigned CLK_STABLE : 1; // @1 SD clock stable 0=No 1=yes **read only
volatile unsigned CLK_EN : 1; // @2 SD clock enable 0=disable 1=enable
unsigned reserved : 2; // @3-4 Write as zero read as don't care
volatile unsigned CLK_GENSEL : 1; // @5 Mode of clock generation (0=Divided, 1=Programmable)
volatile unsigned CLK_FREQ_MS2 : 2; // @6-7 SD clock base divider MSBs (Version3+ only)
volatile unsigned CLK_FREQ8 : 8; // @8-15 SD clock base divider LSBs
volatile unsigned DATA_TOUNIT : 4; // @16-19 Data timeout unit exponent
unsigned reserved1 : 4; // @20-23 Write as zero read as don't care
volatile unsigned SRST_HC : 1; // @24 Reset the complete host circuit
volatile unsigned SRST_CMD : 1; // @25 Reset the command handling circuit
volatile unsigned SRST_DATA : 1; // @26 Reset the data handling circuit
unsigned reserved2 : 5; // @27-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC CONTROL2 register - BCM2835.PDF Manual Section 5 pages 81-84 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regCONTROL2 {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile const unsigned ACNOX_ERR : 1; // @0 Auto command not executed due to an error **read only
volatile const unsigned ACTO_ERR : 1; // @1 Timeout occurred during auto command execution **read only
volatile const unsigned ACCRC_ERR : 1; // @2 Command CRC error occurred during auto command execution **read only
volatile const unsigned ACEND_ERR : 1; // @3 End bit is not 1 during auto command execution **read only
volatile const unsigned ACBAD_ERR : 1; // @4 Command index error occurred during auto command execution **read only
unsigned reserved : 2; // @5-6 Write as zero read as don't care
volatile const unsigned NOTC12_ERR : 1; // @7 Error occurred during auto command CMD12 execution **read only
unsigned reserved1 : 8; // @8-15 Write as zero read as don't care
volatile enum { SDR12 = 0,
SDR25 = 1,
SDR50 = 2,
SDR104 = 3,
DDR50 = 4,
} UHSMODE : 3; // @16-18 Select the speed mode of the SD card (SDR12, SDR25 etc)
unsigned reserved2 : 3; // @19-21 Write as zero read as don't care
volatile unsigned TUNEON : 1; // @22 Start tuning the SD clock
volatile unsigned TUNED : 1; // @23 Tuned clock is used for sampling data
unsigned reserved3 : 8; // @24-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC INTERRUPT register - BCM2835.PDF Manual Section 5 pages 75-77 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regINTERRUPT {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned CMD_DONE : 1; // @0 Command has finished
volatile unsigned DATA_DONE : 1; // @1 Data transfer has finished
volatile unsigned BLOCK_GAP : 1; // @2 Data transfer has stopped at block gap
unsigned reserved : 1; // @3 Write as zero read as don't care
volatile unsigned WRITE_RDY : 1; // @4 Data can be written to DATA register
volatile unsigned READ_RDY : 1; // @5 DATA register contains data to be read
unsigned reserved1 : 2; // @6-7 Write as zero read as don't care
volatile unsigned CARD : 1; // @8 Card made interrupt request
unsigned reserved2 : 3; // @9-11 Write as zero read as don't care
volatile unsigned RETUNE : 1; // @12 Clock retune request was made
volatile unsigned BOOTACK : 1; // @13 Boot acknowledge has been received
volatile unsigned ENDBOOT : 1; // @14 Boot operation has terminated
volatile unsigned ERR : 1; // @15 An error has occured
volatile unsigned CTO_ERR : 1; // @16 Timeout on command line
volatile unsigned CCRC_ERR : 1; // @17 Command CRC error
volatile unsigned CEND_ERR : 1; // @18 End bit on command line not 1
volatile unsigned CBAD_ERR : 1; // @19 Incorrect command index in response
volatile unsigned DTO_ERR : 1; // @20 Timeout on data line
volatile unsigned DCRC_ERR : 1; // @21 Data CRC error
volatile unsigned DEND_ERR : 1; // @22 End bit on data line not 1
unsigned reserved3 : 1; // @23 Write as zero read as don't care
volatile unsigned ACMD_ERR : 1; // @24 Auto command error
unsigned reserved4 : 7; // @25-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC IRPT_MASK register - BCM2835.PDF Manual Section 5 pages 77-79 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regIRPT_MASK {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned CMD_DONE : 1; // @0 Command has finished
volatile unsigned DATA_DONE : 1; // @1 Data transfer has finished
volatile unsigned BLOCK_GAP : 1; // @2 Data transfer has stopped at block gap
unsigned reserved : 1; // @3 Write as zero read as don't care
volatile unsigned WRITE_RDY : 1; // @4 Data can be written to DATA register
volatile unsigned READ_RDY : 1; // @5 DATA register contains data to be read
unsigned reserved1 : 2; // @6-7 Write as zero read as don't care
volatile unsigned CARD : 1; // @8 Card made interrupt request
unsigned reserved2 : 3; // @9-11 Write as zero read as don't care
volatile unsigned RETUNE : 1; // @12 Clock retune request was made
volatile unsigned BOOTACK : 1; // @13 Boot acknowledge has been received
volatile unsigned ENDBOOT : 1; // @14 Boot operation has terminated
volatile unsigned ERR : 1; // @15 An error has occured
volatile unsigned CTO_ERR : 1; // @16 Timeout on command line
volatile unsigned CCRC_ERR : 1; // @17 Command CRC error
volatile unsigned CEND_ERR : 1; // @18 End bit on command line not 1
volatile unsigned CBAD_ERR : 1; // @19 Incorrect command index in response
volatile unsigned DTO_ERR : 1; // @20 Timeout on data line
volatile unsigned DCRC_ERR : 1; // @21 Data CRC error
volatile unsigned DEND_ERR : 1; // @22 End bit on data line not 1
unsigned reserved3 : 1; // @23 Write as zero read as don't care
volatile unsigned ACMD_ERR : 1; // @24 Auto command error
unsigned reserved4 : 7; // @25-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC IRPT_EN register - BCM2835.PDF Manual Section 5 pages 79-71 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regIRPT_EN {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned CMD_DONE : 1; // @0 Command has finished
volatile unsigned DATA_DONE : 1; // @1 Data transfer has finished
volatile unsigned BLOCK_GAP : 1; // @2 Data transfer has stopped at block gap
unsigned reserved : 1; // @3 Write as zero read as don't care
volatile unsigned WRITE_RDY : 1; // @4 Data can be written to DATA register
volatile unsigned READ_RDY : 1; // @5 DATA register contains data to be read
unsigned reserved1 : 2; // @6-7 Write as zero read as don't care
volatile unsigned CARD : 1; // @8 Card made interrupt request
unsigned reserved2 : 3; // @9-11 Write as zero read as don't care
volatile unsigned RETUNE : 1; // @12 Clock retune request was made
volatile unsigned BOOTACK : 1; // @13 Boot acknowledge has been received
volatile unsigned ENDBOOT : 1; // @14 Boot operation has terminated
volatile unsigned ERR : 1; // @15 An error has occured
volatile unsigned CTO_ERR : 1; // @16 Timeout on command line
volatile unsigned CCRC_ERR : 1; // @17 Command CRC error
volatile unsigned CEND_ERR : 1; // @18 End bit on command line not 1
volatile unsigned CBAD_ERR : 1; // @19 Incorrect command index in response
volatile unsigned DTO_ERR : 1; // @20 Timeout on data line
volatile unsigned DCRC_ERR : 1; // @21 Data CRC error
volatile unsigned DEND_ERR : 1; // @22 End bit on data line not 1
unsigned reserved3 : 1; // @23 Write as zero read as don't care
volatile unsigned ACMD_ERR : 1; // @24 Auto command error
unsigned reserved4 : 7; // @25-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC TUNE_STEP register - BCM2835.PDF Manual Section 5 page 86 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regTUNE_STEP {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile enum { TUNE_DELAY_200ps = 0,
TUNE_DELAY_400ps = 1,
TUNE_DELAY_400psA = 2, // I dont understand the duplicate value???
TUNE_DELAY_600ps = 3,
TUNE_DELAY_700ps = 4,
TUNE_DELAY_900ps = 5,
TUNE_DELAY_900psA = 6, // I dont understand the duplicate value??
TUNE_DELAY_1100ps = 7,
} DELAY : 3; // @0-2 Select the speed mode of the SD card (SDR12, SDR25 etc)
unsigned reserved : 29; // @3-31 Write as zero read as don't care
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ EMMC SLOTISR_VER register - BCM2835.PDF Manual Section 5 pages 87-88 }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regSLOTISR_VER {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned SLOT_STATUS : 8; // @0-7 Logical OR of interrupt and wakeup signal for each slot
unsigned reserved : 8; // @8-15 Write as zero read as don't care
volatile unsigned SDVERSION : 8; // @16-23 Host Controller specification version
volatile unsigned VENDOR : 8; // @24-31 Vendor Version Number
};
volatile uint32_t Raw32; // @0-31 Union to access all 32 bits as a uint32_t
};
};
/***************************************************************************}
{ PRIVATE POINTERS TO ALL THE BCM2835 EMMC HOST REGISTERS }
****************************************************************************/
#define EMMC_ARG2 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300000))
#define EMMC_BLKSIZECNT ((volatile struct __attribute__((aligned(4))) regBLKSIZECNT*)(uintptr_t)(RPi_IO_Base_Addr + 0x300004))
#define EMMC_ARG1 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300008))
#define EMMC_CMDTM ((volatile struct __attribute__((aligned(4))) regCMDTM*)(uintptr_t)(RPi_IO_Base_Addr + 0x30000c))
#define EMMC_RESP0 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300010))
#define EMMC_RESP1 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300014))
#define EMMC_RESP2 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300018))
#define EMMC_RESP3 ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x30001C))
#define EMMC_DATA ((volatile __attribute__((aligned(4))) uint32_t*)(uintptr_t)(RPi_IO_Base_Addr + 0x300020))
#define EMMC_STATUS ((volatile struct __attribute__((aligned(4))) regSTATUS*)(uintptr_t)(RPi_IO_Base_Addr + 0x300024))
#define EMMC_CONTROL0 ((volatile struct __attribute__((aligned(4))) regCONTROL0*)(uintptr_t)(RPi_IO_Base_Addr + 0x300028))
#define EMMC_CONTROL1 ((volatile struct __attribute__((aligned(4))) regCONTROL1*)(uintptr_t)(RPi_IO_Base_Addr + 0x30002C))
#define EMMC_INTERRUPT ((volatile struct __attribute__((aligned(4))) regINTERRUPT*)(uintptr_t)(RPi_IO_Base_Addr + 0x300030))
#define EMMC_IRPT_MASK ((volatile struct __attribute__((aligned(4))) regIRPT_MASK*)(uintptr_t)(RPi_IO_Base_Addr + 0x300034))
#define EMMC_IRPT_EN ((volatile struct __attribute__((aligned(4))) regIRPT_EN*)(uintptr_t)(RPi_IO_Base_Addr + 0x300038))
#define EMMC_CONTROL2 ((volatile struct __attribute__((aligned(4))) regCONTROL2*)(uintptr_t)(RPi_IO_Base_Addr + 0x30003C))
#define EMMC_TUNE_STEP ((volatile struct __attribute__((aligned(4))) regTUNE_STEP*)(uintptr_t)(RPi_IO_Base_Addr + 0x300088))
#define EMMC_SLOTISR_VER ((volatile struct __attribute__((aligned(4))) regSLOTISR_VER*)(uintptr_t)(RPi_IO_Base_Addr + 0x3000fC))
/***************************************************************************}
{ PRIVATE INTERNAL SD CARD REGISTER STRUCTURES AS PER SD CARD STANDARD }
****************************************************************************/
/*--------------------------------------------------------------------------}
{ SD CARD OCR register }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regOCR {
union {
struct __attribute__((__packed__, aligned(1))) {
unsigned reserved : 15; // @0-14 Write as zero read as don't care
unsigned voltage2v7to2v8 : 1; // @15 Voltage window 2.7v to 2.8v
unsigned voltage2v8to2v9 : 1; // @16 Voltage window 2.8v to 2.9v
unsigned voltage2v9to3v0 : 1; // @17 Voltage window 2.9v to 3.0v
unsigned voltage3v0to3v1 : 1; // @18 Voltage window 3.0v to 3.1v
unsigned voltage3v1to3v2 : 1; // @19 Voltage window 3.1v to 3.2v
unsigned voltage3v2to3v3 : 1; // @20 Voltage window 3.2v to 3.3v
unsigned voltage3v3to3v4 : 1; // @21 Voltage window 3.3v to 3.4v
unsigned voltage3v4to3v5 : 1; // @22 Voltage window 3.4v to 3.5v
unsigned voltage3v5to3v6 : 1; // @23 Voltage window 3.5v to 3.6v
unsigned reserved1 : 6; // @24-29 Write as zero read as don't care
unsigned card_capacity : 1; // @30 Card Capacity status
unsigned card_power_up_busy : 1; // @31 Card power up status (busy)
};
volatile uint32_t Raw32; // @0-31 Union to access 32 bits as a uint32_t
};
};
/*--------------------------------------------------------------------------}
{ SD CARD SCR register }
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) regSCR {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile enum { SD_SPEC_1_101 = 0, // ..enum.. Version 1.0-1.01
SD_SPEC_11 = 1, // ..enum.. Version 1.10
SD_SPEC_2_3 = 2, // ..enum.. Version 2.00 or Version 3.00 (check bit SD_SPEC3)
} SD_SPEC : 4; // @0-3 SD Memory Card Physical Layer Specification version
volatile enum { SCR_VER_1 = 0, // ..enum.. SCR version 1.0
} SCR_STRUCT : 4; // @4-7 SCR structure version
volatile enum { BUS_WIDTH_1 = 1, // ..enum.. Card supports bus width 1
BUS_WIDTH_4 = 4, // ..enum.. Card supports bus width 4
} BUS_WIDTH : 4; // @8-11 SD Bus width
volatile enum { SD_SEC_NONE = 0, // ..enum.. No Security
SD_SEC_NOT_USED = 1, // ..enum.. Security Not Used
SD_SEC_101 = 2, // ..enum.. SDSC Card (Security Version 1.01)
SD_SEC_2 = 3, // ..enum.. SDHC Card (Security Version 2.00)
SD_SEC_3 = 4, // ..enum.. SDXC Card (Security Version 3.xx)
} SD_SECURITY : 3; // @12-14 Card security in use
volatile unsigned DATA_AFTER_ERASE : 1; // @15 Defines the data status after erase, whether it is 0 or 1
unsigned reserved : 3; // @16-18 Write as zero read as don't care
volatile enum { EX_SEC_NONE = 0, // ..enum.. No extended Security
} EX_SECURITY : 4; // @19-22 Extended security
volatile unsigned SD_SPEC3 : 1; // @23 Spec. Version 3.00 or higher
volatile enum { CMD_SUPP_SPEED_CLASS = 1,
CMD_SUPP_SET_BLKCNT = 2,
} CMD_SUPPORT : 2; // @24-25 CMD support
unsigned reserved1 : 6; // @26-63 Write as zero read as don't care
};
volatile uint32_t Raw32_Lo; // @0-31 Union to access low 32 bits as a uint32_t
};
volatile uint32_t Raw32_Hi; // @32-63 Access upper 32 bits as a uint32_t
};
/*--------------------------------------------------------------------------}
{ PI SD CARD CID register }
{--------------------------------------------------------------------------*/
/* The CID is Big Endian and secondly the Pi butchers it by not having CRC */
/* So the CID appears shifted 8 bits right with first 8 bits reading zero */
struct __attribute__((__packed__, aligned(4))) regCID {
union {
struct __attribute__((__packed__, aligned(1))) {
volatile uint8_t OID_Lo;
volatile uint8_t OID_Hi; // @0-15 Identifies the card OEM. The OID is assigned by the SD-3C, LLC
volatile uint8_t MID; // @16-23 Manufacturer ID, assigned by the SD-3C, LLC
unsigned reserved : 8; // @24-31 PI butcher with CRC removed these bits end up empty
};
volatile uint32_t Raw32_0; // @0-31 Union to access 32 bits as a uint32_t
};
union {
struct __attribute__((__packed__, aligned(1))) {
volatile char ProdName4 : 8; // @0-7 Product name character four
volatile char ProdName3 : 8; // @8-15 Product name character three
volatile char ProdName2 : 8; // @16-23 Product name character two
volatile char ProdName1 : 8; // @24-31 Product name character one
};
volatile uint32_t Raw32_1; // @0-31 Union to access 32 bits as a uint32_t
};
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned SerialNumHi : 16; // @0-15 Serial number upper 16 bits
volatile unsigned ProdRevLo : 4; // @16-19 Product revision low value in BCD
volatile unsigned ProdRevHi : 4; // @20-23 Product revision high value in BCD
volatile char ProdName5 : 8; // @24-31 Product name character five
};
volatile uint32_t Raw32_2; // @0-31 Union to access 32 bits as a uint32_t
};
union {
struct __attribute__((__packed__, aligned(1))) {
volatile unsigned ManufactureMonth : 4; // @0-3 Manufacturing date month (1=Jan, 2=Feb, 3=Mar etc)
volatile unsigned ManufactureYear : 8; // @4-11 Manufacturing dateyear (offset from 2000 .. 1=2001,2=2002,3=2003 etc)
unsigned reserved1 : 4; // @12-15 Write as zero read as don't care
volatile unsigned SerialNumLo : 16; // @16-23 Serial number lower 16 bits
};
volatile uint32_t Raw32_3; // @0-31 Union to access 32 bits as a uint32_t
};
};
/***************************************************************************}
{ PRIVATE INTERNAL SD CARD REGISTER STRUCTURE CHECKS }
****************************************************************************/
/*--------------------------------------------------------------------------}
{ INTERNAL STRUCTURE COMPILE TIME CHECKS }
{--------------------------------------------------------------------------*/
/* GIVEN THE AMOUNT OF PRECISE PACKING OF THESE STRUCTURES .. IT'S PRUDENT */
/* TO CHECK THEM AT COMPILE TIME. USE IS POINTLESS IF THE SIZES ARE WRONG. */
/*-------------------------------------------------------------------------*/
/* If you have never seen compile time assertions it's worth google search */
/* on "Compile Time Assertions". It is part of the C11++ specification and */
/* all compilers that support the standard will have them (GCC, MSC inc) */
/* This actually produces no code it only executes as a compile time check */
/*-------------------------------------------------------------------------*/
#include <assert.h> // Need for compile time static_assert
/* Check the main register section group sizes */
static_assert(sizeof(struct regBLKSIZECNT) == 0x04, "EMMC register BLKSIZECNT should be 0x04 bytes in size");
static_assert(sizeof(struct regCMDTM) == 0x04, "EMMC register CMDTM should be 0x04 bytes in size");
static_assert(sizeof(struct regSTATUS) == 0x04, "EMMC register STATUS should be 0x04 bytes in size");
static_assert(sizeof(struct regCONTROL0) == 0x04, "EMMC register CONTROL0 should be 0x04 bytes in size");
static_assert(sizeof(struct regCONTROL1) == 0x04, "EMMC register CONTROL1 should be 0x04 bytes in size");
static_assert(sizeof(struct regCONTROL2) == 0x04, "EMMC register CONTROL2 should be 0x04 bytes in size");
static_assert(sizeof(struct regINTERRUPT) == 0x04, "EMMC register INTERRUPT should be 0x04 bytes in size");
static_assert(sizeof(struct regIRPT_MASK) == 0x04, "EMMC register IRPT_MASK should be 0x04 bytes in size");
static_assert(sizeof(struct regIRPT_EN) == 0x04, "EMMC register IRPT_EN should be 0x04 bytes in size");
static_assert(sizeof(struct regTUNE_STEP) == 0x04, "EMMC register TUNE_STEP should be 0x04 bytes in size");
static_assert(sizeof(struct regSLOTISR_VER) == 0x04, "EMMC register SLOTISR_VER should be 0x04 bytes in size");
static_assert(sizeof(struct regOCR) == 0x04, "EMMC register OCR should be 0x04 bytes in size");
static_assert(sizeof(struct regSCR) == 0x08, "EMMC register SCR should be 0x08 bytes in size");
static_assert(sizeof(struct regCID) == 0x10, "EMMC register CID should be 0x10 bytes in size");
/*--------------------------------------------------------------------------}
{ INTERRUPT REGISTER TURN TO MASK BIT DEFINITIONS }
{--------------------------------------------------------------------------*/
#define INT_AUTO_ERROR 0x01000000 // ACMD_ERR bit in register
#define INT_DATA_END_ERR 0x00400000 // DEND_ERR bit in register
#define INT_DATA_CRC_ERR 0x00200000 // DCRC_ERR bit in register
#define INT_DATA_TIMEOUT 0x00100000 // DTO_ERR bit in register
#define INT_INDEX_ERROR 0x00080000 // CBAD_ERR bit in register
#define INT_END_ERROR 0x00040000 // CEND_ERR bit in register
#define INT_CRC_ERROR 0x00020000 // CCRC_ERR bit in register
#define INT_CMD_TIMEOUT 0x00010000 // CTO_ERR bit in register
#define INT_ERR 0x00008000 // ERR bit in register
#define INT_ENDBOOT 0x00004000 // ENDBOOT bit in register
#define INT_BOOTACK 0x00002000 // BOOTACK bit in register
#define INT_RETUNE 0x00001000 // RETUNE bit in register
#define INT_CARD 0x00000100 // CARD bit in register
#define INT_READ_RDY 0x00000020 // READ_RDY bit in register
#define INT_WRITE_RDY 0x00000010 // WRITE_RDY bit in register
#define INT_BLOCK_GAP 0x00000004 // BLOCK_GAP bit in register
#define INT_DATA_DONE 0x00000002 // DATA_DONE bit in register
#define INT_CMD_DONE 0x00000001 // CMD_DONE bit in register
#define INT_ERROR_MASK (INT_CRC_ERROR|INT_END_ERROR|INT_INDEX_ERROR| \
INT_DATA_TIMEOUT|INT_DATA_CRC_ERR|INT_DATA_END_ERR| \
INT_ERR|INT_AUTO_ERROR)
#define INT_ALL_MASK (INT_CMD_DONE|INT_DATA_DONE|INT_READ_RDY|INT_WRITE_RDY|INT_ERROR_MASK)
/*--------------------------------------------------------------------------}
{ SD CARD FREQUENCIES }
{--------------------------------------------------------------------------*/
#define FREQ_SETUP 400000 // 400 Khz
#define FREQ_NORMAL 25000000 // 25 Mhz
/*--------------------------------------------------------------------------}
{ CMD 41 BIT SELECTIONS }
{--------------------------------------------------------------------------*/
#define ACMD41_HCS 0x40000000
#define ACMD41_SDXC_POWER 0x10000000
#define ACMD41_S18R 0x04000000
#define ACMD41_VOLTAGE 0x00ff8000
/* PI DOES NOT SUPPORT VOLTAGE SWITCH */
#define ACMD41_ARG_HC (ACMD41_HCS|ACMD41_SDXC_POWER|ACMD41_VOLTAGE)//(ACMD41_HCS|ACMD41_SDXC_POWER|ACMD41_VOLTAGE|ACMD41_S18R)
#define ACMD41_ARG_SC (ACMD41_VOLTAGE) //(ACMD41_VOLTAGE|ACMD41_S18R)
/*--------------------------------------------------------------------------}
{ SD CARD COMMAND RECORD }
{--------------------------------------------------------------------------*/
typedef struct EMMCCommand
{
const char cmd_name[16];
struct regCMDTM code;
struct __attribute__((__packed__)) {
unsigned use_rca : 1; // @0 Command uses rca
unsigned reserved : 15; // @1-15 Write as zero read as don't care
uint16_t delay; // @16-31 Delay to apply after command
};
} EMMCCommand;
/*--------------------------------------------------------------------------}
{ SD CARD COMMAND INDEX DEFINITIONS }
{--------------------------------------------------------------------------*/
#define IX_GO_IDLE_STATE 0
#define IX_ALL_SEND_CID 1
#define IX_SEND_REL_ADDR 2
#define IX_SET_DSR 3
#define IX_SWITCH_FUNC 4
#define IX_CARD_SELECT 5
#define IX_SEND_IF_COND 6
#define IX_SEND_CSD 7
#define IX_SEND_CID 8
#define IX_VOLTAGE_SWITCH 9
#define IX_STOP_TRANS 10
#define IX_SEND_STATUS 11
#define IX_GO_INACTIVE 12
#define IX_SET_BLOCKLEN 13
#define IX_READ_SINGLE 14
#define IX_READ_MULTI 15
#define IX_SEND_TUNING 16
#define IX_SPEED_CLASS 17
#define IX_SET_BLOCKCNT 18
#define IX_WRITE_SINGLE 19
#define IX_WRITE_MULTI 20
#define IX_PROGRAM_CSD 21
#define IX_SET_WRITE_PR 22
#define IX_CLR_WRITE_PR 23
#define IX_SND_WRITE_PR 24
#define IX_ERASE_WR_ST 25
#define IX_ERASE_WR_END 26
#define IX_ERASE 27
#define IX_LOCK_UNLOCK 28
#define IX_APP_CMD 29
#define IX_APP_CMD_RCA 30
#define IX_GEN_CMD 31
// Commands hereafter require APP_CMD.
#define IX_APP_CMD_START 32
#define IX_SET_BUS_WIDTH 32
#define IX_SD_STATUS 33
#define IX_SEND_NUM_WRBL 34
#define IX_SEND_NUM_ERS 35
#define IX_APP_SEND_OP_COND 36
#define IX_SET_CLR_DET 37
#define IX_SEND_SCR 38
/*--------------------------------------------------------------------------}
{ SD CARD COMMAND TABLE }
{--------------------------------------------------------------------------*/
static EMMCCommand sdCommandTable[IX_SEND_SCR + 1] = {
[IX_GO_IDLE_STATE] = { "GO_IDLE_STATE", .code.CMD_INDEX = 0x00, .code.CMD_RSPNS_TYPE = CMD_NO_RESP , .use_rca = 0 , .delay = 0},
[IX_ALL_SEND_CID] = { "ALL_SEND_CID" , .code.CMD_INDEX = 0x02, .code.CMD_RSPNS_TYPE = CMD_136BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SEND_REL_ADDR] = { "SEND_REL_ADDR", .code.CMD_INDEX = 0x03, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SET_DSR] = { "SET_DSR" , .code.CMD_INDEX = 0x04, .code.CMD_RSPNS_TYPE = CMD_NO_RESP , .use_rca = 0 , .delay = 0},
[IX_SWITCH_FUNC] = { "SWITCH_FUNC" , .code.CMD_INDEX = 0x06, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_CARD_SELECT] = { "CARD_SELECT" , .code.CMD_INDEX = 0x07, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_SEND_IF_COND] = { "SEND_IF_COND" , .code.CMD_INDEX = 0x08, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 100},
[IX_SEND_CSD] = { "SEND_CSD" , .code.CMD_INDEX = 0x09, .code.CMD_RSPNS_TYPE = CMD_136BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_SEND_CID] = { "SEND_CID" , .code.CMD_INDEX = 0x0A, .code.CMD_RSPNS_TYPE = CMD_136BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_VOLTAGE_SWITCH] = { "VOLT_SWITCH" , .code.CMD_INDEX = 0x0B, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_STOP_TRANS] = { "STOP_TRANS" , .code.CMD_INDEX = 0x0C, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SEND_STATUS] = { "SEND_STATUS" , .code.CMD_INDEX = 0x0D, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_GO_INACTIVE] = { "GO_INACTIVE" , .code.CMD_INDEX = 0x0F, .code.CMD_RSPNS_TYPE = CMD_NO_RESP , .use_rca = 1 , .delay = 0},
[IX_SET_BLOCKLEN] = { "SET_BLOCKLEN" , .code.CMD_INDEX = 0x10, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_READ_SINGLE] = { "READ_SINGLE" , .code.CMD_INDEX = 0x11, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP ,
.code.CMD_ISDATA = 1 , .code.TM_DAT_DIR = 1, .use_rca = 0 , .delay = 0},
[IX_READ_MULTI] = { "READ_MULTI" , .code.CMD_INDEX = 0x12, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP ,
.code.CMD_ISDATA = 1 , .code.TM_DAT_DIR = 1,
.code.TM_BLKCNT_EN =1 , .code.TM_MULTI_BLOCK = 1, .use_rca = 0 , .delay = 0},
[IX_SEND_TUNING] = { "SEND_TUNING" , .code.CMD_INDEX = 0x13, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SPEED_CLASS] = { "SPEED_CLASS" , .code.CMD_INDEX = 0x14, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SET_BLOCKCNT] = { "SET_BLOCKCNT" , .code.CMD_INDEX = 0x17, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_WRITE_SINGLE] = { "WRITE_SINGLE" , .code.CMD_INDEX = 0x18, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP ,
.code.CMD_ISDATA = 1 , .use_rca = 0 , .delay = 0},
[IX_WRITE_MULTI] = { "WRITE_MULTI" , .code.CMD_INDEX = 0x19, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP ,
.code.CMD_ISDATA = 1 ,
.code.TM_BLKCNT_EN = 1, .code.TM_MULTI_BLOCK = 1, .use_rca = 0 , .delay = 0},
[IX_PROGRAM_CSD] = { "PROGRAM_CSD" , .code.CMD_INDEX = 0x1B, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SET_WRITE_PR] = { "SET_WRITE_PR" , .code.CMD_INDEX = 0x1C, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_CLR_WRITE_PR] = { "CLR_WRITE_PR" , .code.CMD_INDEX = 0x1D, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SND_WRITE_PR] = { "SND_WRITE_PR" , .code.CMD_INDEX = 0x1E, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_ERASE_WR_ST] = { "ERASE_WR_ST" , .code.CMD_INDEX = 0x20, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_ERASE_WR_END] = { "ERASE_WR_END" , .code.CMD_INDEX = 0x21, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_ERASE] = { "ERASE" , .code.CMD_INDEX = 0x26, .code.CMD_RSPNS_TYPE = CMD_BUSY48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_LOCK_UNLOCK] = { "LOCK_UNLOCK" , .code.CMD_INDEX = 0x2A, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_APP_CMD] = { "APP_CMD" , .code.CMD_INDEX = 0x37, .code.CMD_RSPNS_TYPE = CMD_NO_RESP , .use_rca = 0 , .delay = 100},
[IX_APP_CMD_RCA] = { "APP_CMD" , .code.CMD_INDEX = 0x37, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_GEN_CMD] = { "GEN_CMD" , .code.CMD_INDEX = 0x38, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
// APP commands must be prefixed by an APP_CMD.
[IX_SET_BUS_WIDTH] = { "SET_BUS_WIDTH", .code.CMD_INDEX = 0x06, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SD_STATUS] = { "SD_STATUS" , .code.CMD_INDEX = 0x0D, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 1 , .delay = 0},
[IX_SEND_NUM_WRBL] = { "SEND_NUM_WRBL", .code.CMD_INDEX = 0x16, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SEND_NUM_ERS] = { "SEND_NUM_ERS" , .code.CMD_INDEX = 0x17, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_APP_SEND_OP_COND] = { "SD_SENDOPCOND", .code.CMD_INDEX = 0x29, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 1000},
[IX_SET_CLR_DET] = { "SET_CLR_DET" , .code.CMD_INDEX = 0x2A, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP , .use_rca = 0 , .delay = 0},
[IX_SEND_SCR] = { "SEND_SCR" , .code.CMD_INDEX = 0x33, .code.CMD_RSPNS_TYPE = CMD_48BIT_RESP ,
.code.CMD_ISDATA = 1 , .code.TM_DAT_DIR = 1, .use_rca = 0 , .delay = 0},
};
static const char* SD_TYPE_NAME[] = { "Unknown", "MMC", "Type 1", "Type 2 SC", "Type 2 HC" };
/*--------------------------------------------------------------------------}
{ SD CARD DESCRIPTION RECORD }
{--------------------------------------------------------------------------*/
typedef struct SDDescriptor {
struct regCID cid; // Card cid
struct CSD csd; // Card csd
struct regSCR scr; // Card scr
uint64_t CardCapacity; // Card capacity expanded .. calculated from card details
SDCARD_TYPE type; // Card type
uint32_t rca; // Card rca
struct regOCR ocr; // Card ocr
uint32_t status; // Card last status
EMMCCommand* lastCmd;
struct {
uint32_t rootCluster; // Active partition rootCluster
uint32_t sectorPerCluster; // Active partition sectors per cluster
uint32_t bytesPerSector; // Active partition bytes per sector
uint32_t firstDataSector; // Active partition first data sector
uint32_t dataSectors; // Active partition data sectors
uint32_t unusedSectors; // Active partition unused sectors
uint32_t reservedSectorCount; // Active partition reserved sectors
} partition;
SFN_NAME partitionLabe1; // Partition label
} SDDescriptor;
/*--------------------------------------------------------------------------}
{ CURRENT SD CARD DATA STORAGE }
{--------------------------------------------------------------------------*/
static SDDescriptor sdCard = { 0 };
//**************************************************************************
// SD Card PUBLIC functions.
//**************************************************************************
static int sdDebugResponse( int resp )
{
LOG_DEBUG("EMMC: Status: %08x, control1: %08x, interrupt: %08x\n",
(unsigned int)EMMC_STATUS->Raw32, (unsigned int)EMMC_CONTROL1->Raw32,
(unsigned int)EMMC_INTERRUPT->Raw32);
LOG_DEBUG("EMMC: Command %s resp %08x: %08x %08x %08x %08x\n",
sdCard.lastCmd->cmd_name, (unsigned int)resp,(unsigned int)*EMMC_RESP3,
(unsigned int)*EMMC_RESP2, (unsigned int)*EMMC_RESP1,
(unsigned int)*EMMC_RESP0);
return resp;
}
/*-[INTERNAL: sdWaitForInterrupt]-------------------------------------------}
. Given an interrupt mask the routine loops polling for the condition for up
. to 1 second.
. RETURN: SD_TIMEOUT - the condition mask flags where not met in 1 second
. SD_ERROR - an identifiable error occurred
. SD_OK - the wait completed with a mask state as requested
. 10Aug17 LdB
.--------------------------------------------------------------------------*/
static SDRESULT sdWaitForInterrupt (uint32_t mask )
{
uint64_t td = 0; // Zero time difference
uint64_t start_time = 0; // Zero start time
uint32_t tMask = mask | INT_ERROR_MASK; // Add fatal error masks to mask provided
while (!(EMMC_INTERRUPT->Raw32 & tMask) && (td < 1000000)) {
if (!start_time) start_time = TICKCOUNT(); // If start time not set the set start time
else td = TIMEDIFF(start_time, TICKCOUNT()); // Time difference between start time and now
}
uint32_t ival = EMMC_INTERRUPT->Raw32; // Fetch all the interrupt flags
if( td >= 1000000 || // No reponse timeout occurred
(ival & INT_CMD_TIMEOUT) || // Command timeout occurred
(ival & INT_DATA_TIMEOUT) ) // Data timeout occurred
{
if (LOG_ERROR) LOG_ERROR("EMMC: Wait for interrupt %08x timeout: %08x %08x %08x\n",
(unsigned int)mask, (unsigned int)EMMC_STATUS->Raw32,
(unsigned int)ival, (unsigned int)*EMMC_RESP0); // Log any error if requested
// Clear the interrupt register completely.
EMMC_INTERRUPT->Raw32 = ival; // Clear any interrupt that occured
return SD_TIMEOUT; // Return SD_TIMEOUT
} else if ( ival & INT_ERROR_MASK ) {
if (LOG_ERROR) LOG_ERROR("EMMC: Error waiting for interrupt: %08x %08x %08x\n",
(unsigned int)EMMC_STATUS->Raw32, (unsigned int)ival,
(unsigned int)*EMMC_RESP0); // Log any error if requested
// Clear the interrupt register completely.
EMMC_INTERRUPT->Raw32 = ival; // Clear any interrupt that occured
return SD_ERROR; // Return SD_ERROR
}
// Clear the interrupt we were waiting for, leaving any other (non-error) interrupts.
EMMC_INTERRUPT->Raw32 = mask; // Clear any interrupt we are waiting on
return SD_OK; // Return SD_OK
}
/*-[INTERNAL: sdWaitForCommand]---------------------------------------------}
. Waits for up to 1 second for any command that may be in progress.
. RETURN: SD_BUSY - the command was not completed within 1 second period
. SD_OK - the wait completed sucessfully
. 10Aug17 LdB
.--------------------------------------------------------------------------*/
static SDRESULT sdWaitForCommand (void)
{
uint64_t td = 0; // Zero time difference
uint64_t start_time = 0; // Zero start time
while ((EMMC_STATUS->CMD_INHIBIT) && // Command inhibit signal
!(EMMC_INTERRUPT->Raw32 & INT_ERROR_MASK) && // No error occurred
(td < 1000000)) // Timeout not reached
{
if (!start_time) start_time = TICKCOUNT(); // Get start time
else td = TIMEDIFF(start_time, TICKCOUNT()); // Time difference between start and now
}
if( (td >= 1000000) || (EMMC_INTERRUPT->Raw32 & INT_ERROR_MASK) )// Error occurred or it timed out
{
if (LOG_ERROR) LOG_ERROR("EMMC: Wait for command aborted: %08x %08x %08x\n",
(unsigned int)EMMC_STATUS->Raw32, (unsigned int)EMMC_INTERRUPT->Raw32,
(unsigned int)*EMMC_RESP0); // Log any error if requested
return SD_BUSY; // return SD_BUSY
}
return SD_OK; // return SD_OK
}
/*-[INTERNAL: sdWaitForData]------------------------------------------------}
. Waits for up to 1 second for any data transfer that may be in progress.
. RETURN: SD_BUSY - the transfer was not completed within 1 second period
. SD_OK - the transfer completed sucessfully
. 10Aug17 LdB
.--------------------------------------------------------------------------*/
static SDRESULT sdWaitForData (void)
{
uint64_t td = 0; // Zero time difference
uint64_t start_time = 0; // Zero start time
while ((EMMC_STATUS->DAT_INHIBIT) && // Data inhibit signal
!(EMMC_INTERRUPT->Raw32 & INT_ERROR_MASK) && // Some error occurred
(td < 500000)) // Timeout not reached
{
if (!start_time) start_time = TICKCOUNT(); // If start time not set the set start time
else td = TIMEDIFF(start_time, TICKCOUNT()); // Time difference between start time and now
}
if ( (td >= 500000) || (EMMC_INTERRUPT->Raw32 & INT_ERROR_MASK) )
{
if (LOG_ERROR) LOG_ERROR("EMMC: Wait for data aborted: %08x %08x %08x\n",
(unsigned int)EMMC_STATUS->Raw32, (unsigned int)EMMC_INTERRUPT->Raw32,
(unsigned int)*EMMC_RESP0); // Log any error if requested
return SD_BUSY; // return SD_BUSY
}
return SD_OK; // return SD_OK
}
/*-[INTERNAL: unpack_csd]---------------------------------------------------}
. Unpacks a CSD in Resp0,1,2,3 into the proper CSD structure we defined.
. 16Aug17 LdB
.--------------------------------------------------------------------------*/
static void unpack_csd(struct CSD* csd)
{
uint8_t buf[16] = { 0 };
/* Fill buffer CSD comes IN MSB so I will invert so its sort of right way up so I can debug it */
__attribute__((aligned(4))) uint32_t* p;
p = (uint32_t*)&buf[12];
*p = *EMMC_RESP0;
p = (uint32_t*)&buf[8];
*p = *EMMC_RESP1;
p = (uint32_t*)&buf[4];
*p = *EMMC_RESP2;
p = (uint32_t*)&buf[0];
*p = *EMMC_RESP3;
/* Display raw CSD - values of my SANDISK ultra 16GB shown under each */
LOG_DEBUG("CSD Contents : %02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
buf[2], buf[1], buf[0], buf[7], buf[6], buf[5], buf[4],
/* 40 e0 00 32 5b 59 00 */
buf[11], buf[10], buf[9], buf[8], buf[15], buf[14], buf[13], buf[12]);
/* 00 73 a7 7f 80 0a 40 00 */
/* Populate CSD structure */
csd->csd_structure = (buf[2] & 0xc0) >> 6; // @126-127 ** correct
csd->spec_vers = buf[2] & 0x3F; // @120-125 ** correct
csd->taac = buf[1]; // @112-119 ** correct
csd->nsac = buf[0]; // @104-111 ** correct
csd->tran_speed = buf[7]; // @96-103 ** correct
csd->ccc = (((uint16_t)buf[6]) << 4) | ((buf[5] & 0xf0) >> 4); // @84-95 ** correct
csd->read_bl_len = buf[5] & 0x0f; // @80-83 ** correct
csd->read_bl_partial = (buf[4] & 0x80) ? 1 : 0; // @79 ** correct
csd->write_blk_misalign = (buf[4] & 0x40) ? 1 : 0; // @78 ** correct
csd->read_blk_misalign = (buf[4] & 0x20) ? 1 : 0; // @77 ** correct
csd->dsr_imp = (buf[4] & 0x10) ? 1 : 0; // @76 ** correct
if (csd->csd_structure == 0x1) { // CSD VERSION 2.0
/* Basically absorbs bottom of buf[4] to align to next byte */ // @@75-70 ** Correct
csd->ver2_c_size = (uint32_t)(buf[11] & 0x3F) << 16; // @69-64
csd->ver2_c_size += (uint32_t)buf[10] << 8; // @63-56
csd->ver2_c_size += (uint32_t)buf[9]; // @55-48
sdCard.CardCapacity = csd->ver2_c_size;
sdCard.CardCapacity *= (512 * 1024); // Calculate Card capacity
}
else { // CSD VERSION 1.0
csd->c_size = (uint32_t)(buf[4] & 0x03) << 8;
csd->c_size += (uint32_t)buf[11];
csd->c_size <<= 2;
csd->c_size += (buf[10] & 0xc0) >> 6; // @62-73
csd->vdd_r_curr_min = (buf[10] & 0x38) >> 3; // @59-61
csd->vdd_r_curr_max = buf[10] & 0x07; // @56-58
csd->vdd_w_curr_min = (buf[9] & 0xe0) >> 5; // @53-55
csd->vdd_w_curr_max = (buf[9] & 0x1c) >> 2; // @50-52
csd->c_size_mult = ((buf[9] & 0x03) << 1) | ((buf[8] & 0x80) >> 7); // @47-49
sdCard.CardCapacity = (csd->c_size + 1) * (1 << (csd->c_size_mult + 2)) * (1 << csd->read_bl_len);
}
csd->erase_blk_en = (buf[8] & 0x40) >> 6; // @46
csd->sector_size = ((buf[15] & 0x80) >> 1) | (buf[8] & 0x3F); // @39-45
csd->wp_grp_size = buf[15] & 0x7f; // @32-38
csd->wp_grp_enable = (buf[14] & 0x80) ? 1 : 0; // @31
csd->default_ecc = (buf[14] & 0x60) >> 5; // @29-30
csd->r2w_factor = (buf[14] & 0x1c) >> 2; // @26-28 ** correct
csd->write_bl_len = ((buf[14] & 0x03) << 2) | ((buf[13] & 0xc0) >> 6); // @22-25 **correct
csd->write_bl_partial = (buf[13] & 0x20) ? 1 : 0; // @21
// @16-20 are reserved
csd->file_format_grp = (buf[12] & 0x80) ? 1 : 0; // @15
csd->copy = (buf[12] & 0x40) ? 1 : 0; // @14
csd->perm_write_protect = (buf[12] & 0x20) ? 1 : 0; // @13
csd->tmp_write_protect = (buf[12] & 0x10) ? 1 : 0; // @12
csd->file_format = (buf[12] & 0x0c) >> 2; // @10-11 **correct
csd->ecc = buf[12] & 0x03; // @8-9 **corrrect
LOG_DEBUG(" csd_structure=%d\t spec_vers=%d\t taac=%02x\t nsac=%02x\t tran_speed=%02x\t ccc=%04x\n"
" read_bl_len=%d\t read_bl_partial=%d\t write_blk_misalign=%d\t read_blk_misalign=%d\n"
" dsr_imp=%d\t sector_size =%d\t erase_blk_en=%d\n",
csd->csd_structure, csd->spec_vers, csd->taac, csd->nsac, csd->tran_speed, csd->ccc,
csd->read_bl_len, csd->read_bl_partial, csd->write_blk_misalign, csd->read_blk_misalign,
csd->dsr_imp, csd->sector_size, csd->erase_blk_en);
if (csd->csd_structure == 0x1) {
LOG_DEBUG("CSD 2.0: ver2_c_size = %d\t card capacity: %lu\n",
csd->ver2_c_size, sdCard.CardCapacity);
}
else {
LOG_DEBUG("CSD 1.0: c_size = %d\t c_size_mult=%d\t card capacity: %lu\n"
" vdd_r_curr_min = %d\t vdd_r_curr_max=%d\t vdd_w_curr_min = %d\t vdd_w_curr_max=%d\n",
csd->c_size, csd->c_size_mult, sdCard.CardCapacity,
csd->vdd_r_curr_min, csd->vdd_r_curr_max, csd->vdd_w_curr_min, csd->vdd_w_curr_max);
}
LOG_DEBUG(" wp_grp_size=%d\t wp_grp_enable=%d\t default_ecc=%d\t r2w_factor=%d\n"
" write_bl_len=%d\t write_bl_partial=%d\t file_format_grp=%d\t copy=%d\n"
" perm_write_protect=%d\t tmp_write_protect=%d\t file_format=%d\t ecc=%d\n",
csd->wp_grp_size, csd->wp_grp_enable, csd->default_ecc, csd->r2w_factor,
csd->write_bl_len, csd->write_bl_partial, csd->file_format_grp, csd->copy,
csd->perm_write_protect, csd->tmp_write_protect, csd->file_format, csd->ecc);
}
/*-[INTERNAL: sdSendCommandP]-----------------------------------------------}
. Send command and handle response.
. 10Aug17 LdB
.--------------------------------------------------------------------------*/
#define R1_ERRORS_MASK 0xfff9c004
static int sdSendCommandP( EMMCCommand* cmd, uint32_t arg )
{
SDRESULT res;
/* Check for command in progress */
if ( sdWaitForCommand() != SD_OK ) return SD_BUSY; // Check command wait
LOG_DEBUG("EMMC: Sending command %s code %08x arg %08x\n",
cmd->cmd_name, (unsigned int)cmd->code.CMD_INDEX, (unsigned int)arg);
sdCard.lastCmd = cmd;
/* Clear interrupt flags. This is done by setting the ones that are currently set */
EMMC_INTERRUPT->Raw32 = EMMC_INTERRUPT->Raw32; // Clear interrupts
/* Set the argument and the command code, Some commands require a delay before reading the response */
*EMMC_ARG1 = arg; // Set argument to SD card
*EMMC_CMDTM = cmd->code; // Send command to SD card
if ( cmd->delay ) waitMicro(cmd->delay); // Wait for required delay
/* Wait until command complete interrupt */
if ( (res = sdWaitForInterrupt(INT_CMD_DONE))) return res; // In non zero return result
/* Get response from RESP0 */
uint32_t resp0 = *EMMC_RESP0; // Fetch SD card response 0 to command
/* Handle response types for command */
switch ( cmd->code.CMD_RSPNS_TYPE) {
// no response
case CMD_NO_RESP:
return SD_OK; // Return okay then
case CMD_BUSY48BIT_RESP:
sdCard.status = resp0;
// Store the card state. Note that this is the state the card was in before the
// command was accepted, not the new state.
//sdCard.cardState = (resp0 & ST_CARD_STATE) >> R1_CARD_STATE_SHIFT;
return resp0 & R1_ERRORS_MASK;
// RESP0 contains card status, no other data from the RESP* registers.
// Return value non-zero if any error flag in the status value.
case CMD_48BIT_RESP:
switch (cmd->code.CMD_INDEX) {
case 0x03: // SEND_REL_ADDR command
// RESP0 contains RCA and status bits 23,22,19,12:0
sdCard.rca = resp0 & 0xffff0000; // RCA[31:16] of response
sdCard.status = ((resp0 & 0x00001fff)) | // 12:0 map directly to status 12:0
((resp0 & 0x00002000) << 6) | // 13 maps to status 19 ERROR
((resp0 & 0x00004000) << 8) | // 14 maps to status 22 ILLEGAL_COMMAND
((resp0 & 0x00008000) << 8); // 15 maps to status 23 COM_CRC_ERROR
// Store the card state. Note that this is the state the card was in before the
// command was accepted, not the new state.
// sdCard.cardState = (resp0 & ST_CARD_STATE) >> R1_CARD_STATE_SHIFT;
return sdCard.status & R1_ERRORS_MASK;
case 0x08: // SEND_IF_COND command
// RESP0 contains voltage acceptance and check pattern, which should match
// the argument.
sdCard.status = 0;
return resp0 == arg ? SD_OK : SD_ERROR;
// RESP0 contains OCR register
// TODO: What is the correct time to wait for this?
case 0x29: // SD_SENDOPCOND command
sdCard.status = 0;
sdCard.ocr.Raw32 = resp0;
return SD_OK;
default:
sdCard.status = resp0;
// Store the card state. Note that this is the state the card was in before the