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Translate atomicrmw fmin/fmax into OpAtomicFMinEXT/OpAtomicFMaxEXT (#…
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…1768)

Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
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@sarnex
sarnex authored Dec 9, 2022
1 parent 46623fc commit cad5182
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Showing 5 changed files with 112 additions and 3 deletions.
2 changes: 2 additions & 0 deletions lib/SPIRV/OCLUtil.cpp
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Expand Up @@ -647,6 +647,8 @@ template <> void LLVMSPIRVAtomicRmwOpCodeMap::init() {
add(llvm::AtomicRMWInst::UMax, OpAtomicUMax);
add(llvm::AtomicRMWInst::UMin, OpAtomicUMin);
add(llvm::AtomicRMWInst::FAdd, OpAtomicFAddEXT);
add(llvm::AtomicRMWInst::FMin, OpAtomicFMinEXT);
add(llvm::AtomicRMWInst::FMax, OpAtomicFMaxEXT);
}

} // namespace SPIRV
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8 changes: 5 additions & 3 deletions lib/SPIRV/SPIRVWriter.cpp
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Expand Up @@ -2172,9 +2172,11 @@ LLVMToSPIRVBase::transValueWithoutDecoration(Value *V, SPIRVBasicBlock *BB,

if (AtomicRMWInst *ARMW = dyn_cast<AtomicRMWInst>(V)) {
AtomicRMWInst::BinOp Op = ARMW->getOperation();
bool SupportedAtomicInst = AtomicRMWInst::isFPOperation(Op)
? Op == AtomicRMWInst::FAdd
: Op != AtomicRMWInst::Nand;
bool SupportedAtomicInst =
AtomicRMWInst::isFPOperation(Op)
? (Op == AtomicRMWInst::FAdd || Op == AtomicRMWInst::FMin ||
Op == AtomicRMWInst::FMax)
: Op != AtomicRMWInst::Nand;
if (!BM->getErrorLog().checkError(
SupportedAtomicInst, SPIRVEC_InvalidInstruction, V,
"Atomic " + AtomicRMWInst::getOperationName(Op).str() +
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35 changes: 35 additions & 0 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
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@@ -0,0 +1,35 @@
; RUN: llvm-as < %s -o %t.bc
; RUN: llvm-spirv --spirv-ext=+SPV_EXT_shader_atomic_float_min_max %t.bc -o %t.spv
; RUN: spirv-val %t.spv
; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s

; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_min_max"
; CHECK-DAG: Capability AtomicFloat64MinMaxEXT
; CHECK: TypeInt [[Int:[0-9]+]] 32 0
; CHECK-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
; CHECK: TypeFloat [[Double:[0-9]+]] 64
; CHECK: Variable {{[0-9]+}} [[DoublePointer:[0-9]+]]
; CHECK: Constant [[Double]] [[DoubleValue:[0-9]+]] 0 1078263808

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir64"

@f = common dso_local local_unnamed_addr addrspace(1) global double 0.000000e+00, align 8

; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin double addrspace(1)* @f, double 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
%1 = atomicrmw fmax double addrspace(1)* @f, double 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]

ret void
}

attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}

!0 = !{i32 1, !"wchar_size", i32 4}
35 changes: 35 additions & 0 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
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@@ -0,0 +1,35 @@
; RUN: llvm-as < %s -o %t.bc
; RUN: llvm-spirv --spirv-ext=+SPV_EXT_shader_atomic_float_min_max %t.bc -o %t.spv
; RUN: spirv-val %t.spv
; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s

; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_min_max"
; CHECK-DAG: Capability AtomicFloat32MinMaxEXT
; CHECK: TypeInt [[Int:[0-9]+]] 32 0
; CHECK-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
; CHECK: TypeFloat [[Float:[0-9]+]] 32
; CHECK: Variable {{[0-9]+}} [[FPPointer:[0-9]+]]
; CHECK: Constant [[Float]] [[FPValue:[0-9]+]] 1109917696

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir64"

@f = common dso_local local_unnamed_addr addrspace(1) global float 0.000000e+00, align 4

; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin float addrspace(1)* @f, float 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
%1 = atomicrmw fmax float addrspace(1)* @f, float 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]

ret void
}

attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}

!0 = !{i32 1, !"wchar_size", i32 4}
35 changes: 35 additions & 0 deletions test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
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@@ -0,0 +1,35 @@
; RUN: llvm-as < %s -o %t.bc
; RUN: llvm-spirv --spirv-ext=+SPV_EXT_shader_atomic_float_min_max %t.bc -o %t.spv
; RUN: spirv-val %t.spv
; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s

; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_min_max"
; CHECK-DAG: Capability AtomicFloat16MinMaxEXT
; CHECK: TypeInt [[Int:[0-9]+]] 32 0
; CHECK-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
; CHECK: TypeFloat [[Half:[0-9]+]] 16
; CHECK: Variable {{[0-9]+}} [[HalfPointer:[0-9]+]]
; CHECK: Constant [[Half]] [[HalfValue:[0-9]+]] 20800

target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
target triple = "spir64"

@f = common dso_local local_unnamed_addr addrspace(1) global half 0.000000e+00, align 4

; Function Attrs: nounwind
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
entry:
%0 = atomicrmw fmin half addrspace(1)* @f, half 42.000000e+00 seq_cst
; CHECK: AtomicFMinEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
%1 = atomicrmw fmax half addrspace(1)* @f, half 42.000000e+00 seq_cst
; CHECK: AtomicFMaxEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]

ret void
}

attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}

!0 = !{i32 1, !"wchar_size", i32 4}

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