resolution function

Author: Kazhuu

resolution-function/resolution_pkg.vhd

@@ -0,0 +1,32 @@
+package resolution_pgk is
+
+    type v4l is ('X', '0', '1', 'Z');
+    type v4l_vector is array (natural range <>) of v4l;
+
+    function resolution_fn (drivers : v4l_vector) return v4l;
+
+    type v4l_resolution_vector is array (v4l, v4l) of v4l;
+    constant v4l_resolution_table : v4l_resolution_vector := (
+        --      'X'  '0', '1'  'Z'
+        'X' => ('X', 'X', 'X', 'X'),
+        '0' => ('X', '0', 'X', '0'),
+        '1' => ('X', 'X', '1', '1'),
+        'Z' => ('X', '0', '1', 'Z')
+    );
+
+end package;
+
+
+package body resolution_pgk is
+
+    function resolution_fn(drivers : v4l_vector) return v4l is
+        variable accumulate : v4l := 'Z';
+    begin
+        for i in drivers'range loop
+            accumulate := v4l_resolution_table(accumulate, drivers(i));
+            report "accu: " & v4l'image(accumulate) & ", driver: " & v4l'image(drivers(i));
+        end loop;
+        return accumulate;
+    end function;
+
+end package body;

resolution-function/test.vhd

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+library ieee;
+use ieee.std_logic_1164.all;
+-- Import resolution_pgk package content.
+use work.resolution_pgk.all;
+
+
+entity test is
+end entity;
+
+
+architecture tb of test is
+
+    signal test : resolution_fn v4l;
+
+    subtype resolved_v4l is resolution_fn v4l;
+    type resolved_v4l_vector is array (natural range <>) of resolved_v4l;
+    signal test_vector : resolved_v4l_vector(1 downto 0);
+
+    signal end_simulation : boolean := true;
+
+begin
+
+    test <= '1';
+    test <= 'Z';
+    --test_vector <= "11";
+    --test_vector <= "11";
+
+    end_simulation <= false after 1 ps;
+    assert end_simulation
+    -- resolved test: '1'
+    report "resolved test: " & v4l'image(test)
+    severity failure;
+
+    assert false
+    report "resolved test_vector: " & resolved_v4l'image(test_vector(1)) &
+    resolved_v4l'image(test_vector(0))
+    severity note;
+
+end architecture;

resolution-function/vimhdl.prj

@@ -0,0 +1,5 @@
+builder = msim
+target_dir = .build
+
+vhdl work test.vhd -2002
+vhdl work resolution_pkg.vhd -2002