Skip to content

Commit 0ee4e9c

Browse files
KazhuuKazhuu
committed
array multiplier testing started
1 parent 8b2562c commit 0ee4e9c

File tree

4 files changed

+121
-33
lines changed

4 files changed

+121
-33
lines changed

‎components-and-cores/arithmetic/array-multiplier/array_multiplier.vhd

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
library ieee;
2+
use ieee.std_logic_1164.all;
3+
4+
5+
entity array_multiplier is
6+
port(
7+
x_in : in std_logic_vector;
8+
y_in : in std_logic_vector;
9+
result_out : out std_logic_vector
10+
);
11+
end entity;
12+
13+
14+
architecture rtl of array_multiplier is
15+
type std_logic_2d_t is array (x_in'length downto 0, y_in'length downto 0) of std_logic;
16+
17+
signal xi, yi, pi, ci : std_logic_2d_t;
18+
begin
19+
rows: for i in x_in'range generate
20+
cols: for j in y_in'range generate
21+
cell: entity work.bit_multiplier port map(
22+
xi(i, j), yi(i, j), pi(i, j+1), ci(i, j),
23+
xi(i, j+1), yi(i+1, j), pi(i+1, j), ci(i, j+1)
24+
);
25+
end generate;
26+
end generate;
27+
28+
29+
right_and_left_side: for i in x_in'range generate
30+
xi(i, 0) <= x_in(i);
31+
ci(i, 0) <= '0';
32+
pi(i+1, y_in'length) <= ci(i, y_in'length);
33+
end generate;
34+
35+
top_and_bottom_side: for i in y_in'range generate
36+
yi(0, i) <= y_in(i);
37+
pi(0, i+1) <= '0';
38+
result_out(i) <= pi(i+1, 0);
39+
result_out(i+y_in'length) <= pi(y_in'length, i);
40+
end generate;
41+
42+
assert result_out'length = x_in'length + y_in'length
43+
report "result_out'length(" & integer'image(result_out'length) & ") must be equal x_in'lenght("
44+
& integer'image(x_in'length) & ") + y_in'length(" & integer'image(y_in'length) & ")"
45+
severity failure;
46+
47+
48+
end architecture;

‎components-and-cores/arithmetic/array-multiplier/array_multiplier_tb.vhd

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,38 @@
1+
library ieee;
2+
library vunit_lib;
3+
4+
use ieee.std_logic_1164.all;
5+
use ieee.numeric_std.all;
6+
context vunit_lib.vunit_context;
7+
8+
9+
entity tb_array_multiplier is
10+
generic(runner_cfg : string);
11+
end entity;
12+
13+
14+
architecture tb of tb_array_multiplier is
15+
signal x : std_logic_vector(3 downto 0) := (others => '0');
16+
signal y : std_logic_vector(3 downto 0) := (others => '0');
17+
signal result : std_logic_vector(x'length + y'length - 1 downto 0);
18+
begin
19+
dut: entity work.array_multiplier port map(x, y, result);
20+
21+
main: process
22+
begin
23+
test_runner_setup(runner, runner_cfg);
24+
while test_suite loop
25+
if run("0_times_0") then
26+
wait for 1 ps;
27+
check(to_integer(unsigned(result)) = 0, to_string(result));
28+
29+
elsif run("5_times_5") then
30+
x <= "0101";
31+
y <= "0101";
32+
wait for 1 ps;
33+
34+
check(result = "00011001", to_string(result));
35+
end if;
36+
end loop;
37+
end process;
38+
end architecture;

‎components-and-cores/arithmetic/array-multiplier/bit_multiplier_tb.vhd

Lines changed: 33 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ context vunit_lib.vunit_context;
66

77

88
entity tb_bit_multiplier is
9-
generic (runner_cfg : string);
9+
generic(runner_cfg : string);
1010
end entity;
1111

1212

@@ -24,73 +24,73 @@ begin
2424
x_in <= '1';
2525
wait for 1 ps;
2626

27-
check_equal(x_out, '0');
28-
check(y_out = '0');
29-
check(p_out = '0');
30-
check(c_out = '0');
27+
check_equal(x_out, '1');
28+
check_equal(y_out, '0');
29+
check_equal(p_out, '0');
30+
check_equal(c_out, '0');
3131
elsif run("multiply_with_y") then
3232
y_in <= '1';
3333
wait for 1 ps;
3434

35-
check(x_out = '0');
36-
check(y_out = '1');
37-
check(p_out = '0');
38-
check(c_out = '0');
35+
check_equal(x_out, '0');
36+
check_equal(y_out, '1');
37+
check_equal(p_out, '0');
38+
check_equal(c_out, '0');
3939
elsif run("multiply_with_x_y") then
4040
x_in <= '1';
4141
y_in <= '1';
4242
wait for 1 ps;
4343

44-
check(x_out = '1');
45-
check(y_out = '1');
46-
check(p_out = '1');
47-
check(c_out = '0');
44+
check_equal(x_out, '1');
45+
check_equal(y_out, '1');
46+
check_equal(p_out, '1');
47+
check_equal(c_out, '0');
4848
elsif run("multiply_with_partial") then
4949
p_in <= '1';
5050
wait for 1 ps;
5151

52-
check(x_out = '0');
53-
check(y_out = '0');
54-
check(p_out = '1');
55-
check(c_out = '0');
52+
check_equal(x_out, '0');
53+
check_equal(y_out, '0');
54+
check_equal(p_out, '1');
55+
check_equal(c_out, '0');
5656
elsif run("multiply_with_carry") then
5757
c_in <= '1';
5858
wait for 1 ps;
5959

60-
check(x_out = '0');
61-
check(y_out = '0');
62-
check(p_out = '1');
63-
check(c_out = '0');
60+
check_equal(x_out, '0');
61+
check_equal(y_out, '0');
62+
check_equal(p_out, '1');
63+
check_equal(c_out, '0');
6464
elsif run("multiply_with_partial_carry") then
6565
p_in <= '1';
6666
c_in <= '1';
6767
wait for 1 ps;
6868

69-
check(x_out = '0');
70-
check(y_out = '0');
71-
check(p_out = '0');
72-
check(c_out = '1');
69+
check_equal(x_out, '0');
70+
check_equal(y_out, '0');
71+
check_equal(p_out, '0');
72+
check_equal(c_out, '1');
7373
elsif run("multiply_with_partial_carry_x") then
7474
x_in <= '1';
7575
p_in <= '1';
7676
c_in <= '1';
7777
wait for 1 ps;
7878

79-
check(x_out = '1');
80-
check(y_out = '0');
81-
check(p_out = '0');
82-
check(c_out = '1');
79+
check_equal(x_out, '1');
80+
check_equal(y_out, '0');
81+
check_equal(p_out, '0');
82+
check_equal(c_out, '1');
8383
elsif run("multiply_with_partial_carry_x_y") then
8484
x_in <= '1';
8585
y_in <= '1';
8686
p_in <= '1';
8787
c_in <= '1';
8888
wait for 1 ps;
8989

90-
check(x_out = '1');
91-
check(y_out = '1');
92-
check(p_out = '1');
93-
check(c_out = '1');
90+
check_equal(x_out, '1');
91+
check_equal(y_out, '1');
92+
check_equal(p_out, '1');
93+
check_equal(c_out, '1');
9494
end if;
9595
end loop;
9696
test_runner_cleanup(runner);

‎components-and-cores/arithmetic/array-multiplier/vimhdl.prj

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,3 +3,5 @@ target_dir = .build
33

44
vhdl work bit_multiplier.vhd -2008
55
vhdl work bit_multiplier_tb.vhd -2008
6+
vhdl work array_multiplier.vhd -2008
7+
vhdl work array_multiplier_tb.vhd -2008

0 commit comments

Comments
 (0)