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[CPUID] Add ISA entries for A64FX and M1 #44194

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Merged
merged 5 commits into from
Feb 20, 2022
Merged

[CPUID] Add ISA entries for A64FX and M1 #44194

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763146e
[CPUID] Rework how current ISA is determined
giordano Feb 16, 2022
8abda40
[CPUID] Add ISA entry for A64FX
giordano Feb 16, 2022
2b44fcc
[CPUID] Add ISA entry for Apple Silicon M1
giordano Feb 16, 2022
22eb7a9
[CPUID] Simplify collection of full set of features for architecture
giordano Feb 16, 2022
c5e2d4f
[CPUID] Remove AES from A64FX ISA, not all chips appear to have it
giordano Feb 19, 2022
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6 changes: 3 additions & 3 deletions base/Base.jl
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Original file line number Diff line number Diff line change
Expand Up @@ -276,9 +276,6 @@ include("weakkeydict.jl")

include("env.jl")

# BinaryPlatforms, used by Artifacts
include("binaryplatforms.jl")

# functions defined in Random
function rand end
function randn end
Expand Down Expand Up @@ -336,6 +333,9 @@ using .Order
include("sort.jl")
using .Sort

# BinaryPlatforms, used by Artifacts. Needs `Sort`.
include("binaryplatforms.jl")

# Fast math
include("fastmath.jl")
using .FastMath
Expand Down
3 changes: 2 additions & 1 deletion base/binaryplatforms.jl
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Expand Up @@ -608,7 +608,8 @@ const arch_march_isa_mapping = let
"armv8_0" => get_set("aarch64", "armv8.0-a"),
"armv8_1" => get_set("aarch64", "armv8.1-a"),
"armv8_2_crypto" => get_set("aarch64", "armv8.2-a+crypto"),
"armv8_4_crypto_sve" => get_set("aarch64", "armv8.4-a+crypto+sve"),
"a64fx" => get_set("aarch64", "a64fx"),
"apple_m1" => get_set("aarch64", "apple_m1"),
],
"powerpc64le" => [
"power8" => get_set("powerpc64le", "power8"),
Expand Down
28 changes: 21 additions & 7 deletions base/cpuid.jl
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Expand Up @@ -56,9 +56,10 @@ const ISAs_by_family = Dict(
"aarch64" => [
# Implicit in all sets, because always required: fp, asimd
"armv8.0-a" => ISA(Set{UInt32}()),
"armv8.1-a" => ISA(Set((JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm))),
"armv8.2-a+crypto" => ISA(Set((JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2))),
"armv8.4-a+crypto+sve" => ISA(Set((JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_fp16fml, JL_AArch64_aes, JL_AArch64_sha2, JL_AArch64_dotprod, JL_AArch64_sve))),
"armv8.1-a" => ISA(Set((JL_AArch64_v8_1a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm))),
"armv8.2-a+crypto" => ISA(Set((JL_AArch64_v8_2a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2))),
"a64fx" => ISA(Set((JL_AArch64_v8_2a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_sha2, JL_AArch64_ccpp, JL_AArch64_complxnum, JL_AArch64_fullfp16, JL_AArch64_sve))),
"apple_m1" => ISA(Set((JL_AArch64_v8_5a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2, JL_AArch64_sha3, JL_AArch64_ccpp, JL_AArch64_complxnum, JL_AArch64_fp16fml, JL_AArch64_fullfp16, JL_AArch64_dotprod, JL_AArch64_rcpc, JL_AArch64_altnzcv))),
],
"powerpc64le" => [
# We have no way to test powerpc64le features yet, so we're only going to declare the lowest ISA:
Expand Down Expand Up @@ -88,14 +89,27 @@ function normalize_arch(arch::String)
return arch
end

let
# Collect all relevant features for the current architecture, if any.
FEATURES = UInt32[]
arch = normalize_arch(String(Sys.ARCH))
if arch in keys(ISAs_by_family)
for isa in ISAs_by_family[arch]
unique!(append!(FEATURES, last(isa).features))
end
end

# Use `@eval` to inline the list of features.
@eval function cpu_isa()
return ISA(Set{UInt32}(feat for feat in $(FEATURES) if test_cpu_feature(feat)))
end
end

"""
cpu_isa()

Return the [`ISA`](@ref) (instruction set architecture) of the current CPU.
"""
function cpu_isa()
all_features = last(last(get(ISAs_by_family, normalize_arch(String(Sys.ARCH)), "" => [ISA(Set{UInt32}())]))).features
return ISA(Set{UInt32}(feat for feat in all_features if test_cpu_feature(feat)))
end
cpu_isa

end # module CPUID