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[CPUID] Add ISA entry for Apple Silicon M1
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giordano committed Feb 16, 2022
1 parent be2596c commit 2703058
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1 change: 1 addition & 0 deletions base/binaryplatforms.jl
Original file line number Diff line number Diff line change
Expand Up @@ -609,6 +609,7 @@ const arch_march_isa_mapping = let
"armv8_1" => get_set("aarch64", "armv8.1-a"),
"armv8_2_crypto" => get_set("aarch64", "armv8.2-a+crypto"),
"armv8_2_crypto_sve" => get_set("aarch64", "armv8.2-a+crypto+sve"),
"armv8_5_fullfp16_fp16ml" => get_set("aarch64", "armv8.5-a+fullfp16+fp16ml"),
],
"powerpc64le" => [
"power8" => get_set("powerpc64le", "power8"),
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2 changes: 1 addition & 1 deletion base/cpuid.jl
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ const ISAs_by_family = Dict(
"armv8.1-a" => ISA(Set((JL_AArch64_v8_1a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm))),
"armv8.2-a+crypto" => ISA(Set((JL_AArch64_v8_2a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2))),
"armv8.2-a+crypto+sve" => ISA(Set((JL_AArch64_v8_2a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2, JL_AArch64_ccpp, JL_AArch64_complxnum, JL_AArch64_fullfp16, JL_AArch64_sve))), # A64FX
"armv8.4-a+crypto+sve" => ISA(Set((JL_AArch64_v8_4a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_fp16fml, JL_AArch64_aes, JL_AArch64_sha2, JL_AArch64_dotprod, JL_AArch64_sve))),
"armv8.5-a+fullfp16+fp16ml" => ISA(Set((JL_AArch64_v8_5a, JL_AArch64_lse, JL_AArch64_crc, JL_AArch64_rdm, JL_AArch64_aes, JL_AArch64_sha2, JL_AArch64_sha3, JL_AArch64_ccpp, JL_AArch64_complxnum, JL_AArch64_fp16fml, JL_AArch64_fullfp16, JL_AArch64_dotprod, JL_AArch64_rcpc, JL_AArch64_altnzcv))), # M1
],
"powerpc64le" => [
# We have no way to test powerpc64le features yet, so we're only going to declare the lowest ISA:
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