Skip to content

Commit bb41bb6

Browse files
PokhodenkoSADiptorup Deb
and
Diptorup Deb
authored
Rename PyDPPL to dpCtl in all visible places (#104)
* Rename readme and headers * Fix left over places where DPPL/PyDPPL was used in comments. Co-authored-by: Diptorup Deb <diptorup.deb@intel.com>
1 parent 451ca50 commit bb41bb6

40 files changed

+76
-76
lines changed

README.md

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,9 +32,9 @@ conda build --croot=C:/tmp conda-recipe
3232
conda install dpctl
3333
```
3434

35-
Using PyDPPL
36-
============
37-
PyDPPL relies on SYCL runtime. With Intel oneAPI installed you should activate it.
35+
Using dpCtl
36+
===========
37+
dpCtl relies on DPC++ runtime. With Intel oneAPI installed you should activate it.
3838

3939
On Windows:
4040
```cmd

backends/CMakeLists.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
cmake_minimum_required(VERSION 3.3.2 FATAL_ERROR)
2-
project("PyDPPL - A lightweight SYCL wrapper for Python")
2+
project("dpCtl - A lightweight SYCL wrapper for Python")
33

44
# The function checks is DPCPP_ROOT is valid and points to a dpcpp installation
55
function (check_for_dpcpp)
@@ -185,7 +185,7 @@ foreach(HEADER ${HEADERS})
185185
install(FILES "${HEADER}" DESTINATION include/Support)
186186
endforeach()
187187

188-
# Enable to build the PyDPPL backend test cases
188+
# Enable to build the dpCtl backend test cases
189189
add_subdirectory(tests)
190190

191191
# Todo : Add build rules for doxygen

backends/include/Support/CBindingWrapping.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//===----- Support/CBindingWrapping.h - DPPL-SYCL interface --*-- C ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/Support/DllExport.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//===---------- Support/DllExport.h - DPPL-SYCL interface ---*--- C ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/Support/ExternC.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//===------------ Support/ExternC.h - DPPL-SYCL interface ---*--- C ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/Support/MemOwnershipAttrs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
//===----- dppl_mem_ownership_attrs.h - DPPL-SYCL interface --*-- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_data_types.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---------- dppl_data_types.h - DPPL-SYCL interface ----*---- C ---*---===//
1+
//===------------------ dppl_data_types.h - dpctl-C_API ----*---- C ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_opencl_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===-- dppl_opencl_interface.h - DPPL-OpenCL interface -------*- C -*-----===//
1+
//===------------ dppl_opencl_interface.h - dpctl-C_API -------*- C -*-----===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_context_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_context_interface.h - DPPL-SYCL interface --*--C++ --*--===//
1+
//===----------- dppl_sycl_context_interface.h - dpctl-C_API --*--C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_device_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_device_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
1+
//===---------- dppl_sycl_device_interface.h - dpctl-C_API ---*---C++ -*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_event_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_event_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
1+
//===----------- dppl_sycl_event_interface.h - dpctl-C_API ---*---C++ -*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_kernel_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---- dppl_sycl_kernel_interface.h - DPPL-SYCL interface --*--C++ --*--===//
1+
//===------------ dppl_sycl_kernel_interface.h - dpctl-C_API --*--C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_platform_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_platform_interface.h - DPPL-SYCL interface ---*--C++ -*-===//
1+
//===----------- dppl_sycl_platform_interface.h - dpctl-C_API ---*--C++ -*-===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_program_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---- dppl_sycl_program_interface.h - DPPL-SYCL interface --*--C++ --*--===//
1+
//===----------- dppl_sycl_program_interface.h - dpctl-C_API --*--C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_queue_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_queue_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
1+
//===----------- dppl_sycl_queue_interface.h - dpctl-C_API ---*---C++ -*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_queue_manager.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_queue_manager.h - DPPL-SYCL interface ---*---C++ ---*---===//
1+
//===----------- dppl_sycl_queue_manager.h - dpctl-C_API ---*---C++ ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_types.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---------- dppl_sycl_types.h - DPPL-SYCL interface ---*--- C++ ---*---===//
1+
//===-------------- dppl_sycl_types.h - dpctl-C_API ----*---- C++ ----*----===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_sycl_usm_interface.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_usm_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
1+
//===------------- dppl_sycl_usm_interface.h - dpctl-C_API ---*---C++ -*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/dppl_utils.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===------------- dppl_utils.h - DPPL-SYCL interface --*-- C++ -----*-----===//
1+
//===------------------- dppl_utils.h - dpctl-C_API ---*--- C++ -----*-----===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/include/error_check_macros.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===----- error_check_macros.h - DPPL-OpenCL interface -------*- C -*-----===//
1+
//===----------- error_check_macros.h - dpctl-C_API-------*- C ------*-----===//
22
//
3-
// Python Data Parallel Processing Python (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_opencl_interface.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===------ dppl_opencl_interface.c - DPPL-OpenCL interface ----*- C -*----===//
1+
//===------------ dppl_opencl_interface.c - dpctl-C_API ----*- C -----*----===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_context_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_context_interface.cpp - DPPL-SYCL interface --*- C++ -*-===//
1+
//===------- dppl_sycl_context_interface.cpp - dpctl-C_API ---*--- C++ -*-===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_device_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_device_interface.cpp - DPPL-SYCL interface --*- C++ -*--===//
1+
//===------ dppl_sycl_device_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_event_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_event_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
1+
//===------ dppl_sycl_event_interface.cpp - dpctl-C_API ---*--- C++ --*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_kernel_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_kernel_interface.cpp - DPPL-SYCL interface --*-- C++ -*-===//
1+
//===------ dppl_sycl_kernel_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_platform_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_platform_interface.cpp - DPPL-SYCL interface --*- C++ -*-===//
1+
//===------ dppl_sycl_platform_interface.cpp - dpctl-C_API --*-- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_program_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_program_interface.cpp - DPPL-SYCL interface --*-- C++ -*-===//
1+
//===----- dppl_sycl_program_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_queue_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_queue_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
1+
//===------ dppl_sycl_queue_interface.cpp - dpctl-C_API ---*--- C++ --*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_queue_manager.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_queue_manager.cpp - DPPL-SYCL interface --*- C++ -*---===//
1+
//===--------- dppl_sycl_queue_manager.cpp - dpctl-C_API --*-- C++ ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_sycl_usm_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- dppl_sycl_usm_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
1+
//===------- dppl_sycl_usm_interface.cpp - dpctl-C_API ---*--- C++ ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/source/dppl_utils.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--------- dppl_utils.cpp - DPPL-SYCL interface ----*---- C++ ----*----===//
1+
//===-------------- dppl_utils.cpp - dpctl-C_API ----*---- C++ -----*-----===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/tests/CMakeLists.txt

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,9 +3,9 @@ string(COMPARE EQUAL "${GTEST_LIB_DIR}" "" no_gtest_lib_dir)
33

44
if(${no_gtest_incl_dir} OR ${no_gtest_lib_dir})
55
message(WARNING
6-
"GTest is needed to test PyDPPL's backend test cases. Pass in \
6+
"GTest is needed to test dpCtl's C API test cases. Pass in \
77
-DGTEST_INCLUDE_DIR and -DGTEST_LIB_DIR when you configure Cmake if\
8-
you wish to run PyDPPL backend tests."
8+
you wish to run dpCtl backend tests."
99
)
1010
else()
1111
# We need thread support for gtest
@@ -22,7 +22,7 @@ else()
2222

2323
link_directories(${GTEST_LIB_DIR})
2424

25-
set(PYDPPL_BACKEND_TEST_CASES
25+
set(DPCTL_C_API_TEST_CASES
2626
test_sycl_kernel_interface
2727
test_sycl_platform_interface
2828
test_sycl_program_interface
@@ -38,7 +38,7 @@ else()
3838
file(COPY ${tf} DESTINATION ${CMAKE_CURRENT_BINARY_DIR})
3939
endforeach()
4040

41-
foreach(TEST_CASE ${PYDPPL_BACKEND_TEST_CASES})
41+
foreach(TEST_CASE ${DPCTL_C_API_TEST_CASES})
4242
add_executable(${TEST_CASE} EXCLUDE_FROM_ALL ${TEST_CASE}.cpp)
4343
target_link_libraries(
4444
${TEST_CASE} ${CMAKE_THREAD_LIBS_INIT} gtest DPPLSyclInterface

backends/tests/test_sycl_kernel_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---- test_sycl_program_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
1+
//===-------- test_sycl_program_interface.cpp - dpctl-C_API -*- C++ ---*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/tests/test_sycl_platform_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- test_sycl_platform_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
1+
//===------- test_sycl_platform_interface.cpp - dpctl-C_API --*-- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/tests/test_sycl_program_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---- test_sycl_program_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
1+
//===---------- test_sycl_program_interface.cpp - dpctl-C_API --*-- C++ -*-===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/tests/test_sycl_queue_interface.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===---- test_sycl_queue_interface.cpp - DPPL-SYCL interface -*- C++ --*--===//
1+
//===-------- test_sycl_queue_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

backends/tests/test_sycl_queue_manager.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
//===--- test_sycl_queue_manager.cpp - DPPL-SYCL interface --*- C++ ---*---===//
1+
//===------- test_sycl_queue_manager.cpp - dpctl-C_API ---*--- C++ ----*---===//
22
//
3-
// Python Data Parallel Processing Library (PyDPPL)
3+
// Data Parallel Control Library (dpCtl)
44
//
55
// Copyright 2020 Intel Corporation
66
//

conda-recipe/meta.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ requirements:
3030
- cffi >=1.0.0
3131

3232
about:
33-
home: https://github.com/IntelPython/PyDPPL.git
33+
home: https://github.com/IntelPython/dpCtl.git
3434
license: Apache-2.0
3535
license_file: LICENSE
3636
summary: 'A lightweight Python wrapper for a subset of OpenCL and SYCL API.'

dpctl/__init__.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
3434
dpCtl's intended usage is as a common SYCL interoperability layer for
3535
different Python libraries and applications. The OpenCL support inside
36-
PyDPPL is slated to be deprecated and then removed in future releases
36+
dpCtl is slated to be deprecated and then removed in future releases
3737
of the library.
3838
3939
Currently, only a small subset of DPC++ runtime objects are exposed

setup.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
##===---------- setup.py - dpctl.ocldrv interface -----*- Python -*-----===##
22
##
3-
## Python Data Parallel Processing Library (PyDPPL)
3+
## Data Parallel Control Library (dpCtl)
44
##
55
## Copyright 2020 Intel Corporation
66
##

0 commit comments

Comments
 (0)