Skip to content
View Gautham-8066's full-sized avatar

Block or report Gautham-8066

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. TRNG-True-Random-Number-Generator-in-Verilog TRNG-True-Random-Number-Generator-in-Verilog Public

    This repository contains a synthesizable Verilog implementation of a True Random Number Generator

    Verilog

  2. VL53L1X-Multi-Sensor-Manager VL53L1X-Multi-Sensor-Manager Public

    C++ driver wrapper for the VL53L1X Time-of-Flight sensor to resolve I2C address conflicts in multi-sensor arrays.[Pololu VL53L1X Library]

    C++

  3. 3-Variable-Boolean-Expression-Simplifier 3-Variable-Boolean-Expression-Simplifier Public

    A robust tool that simplifies 3-variable Boolean expressions using Karnaugh Map (K-map) logic.

    C

  4. Wireless_Sensor_Project Wireless_Sensor_Project Public

    This project reads environmental data (Temperature, Humidity, Pressure, Gas) and liquid pH levels using an ESP32, and transmits the data wirelessly via TCP to a Python client.

    C++

  5. 32-bit-RISC-V-verilog-implementation 32-bit-RISC-V-verilog-implementation Public

    32-bit-RISC-V-verilog-implementation

    Verilog

  6. Full_adder_From_RTL-To-Silicon Full_adder_From_RTL-To-Silicon Public

    This project demonstrates a complete digital design flow for a Full Adder circuit, starting from behavioral RTL in Verilog to final physical layout including verification and optimization stages.

    Verilog