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Merge pull request #64 from gibsson/5.4-1.0.0-imx
Merge tag 'v5.4.33' into 5.4-1.0.0-imx
2 parents c325576 + 4b462e0 commit e43857b

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Documentation/sound/hd-audio/index.rst

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@@ -8,3 +8,4 @@ HD-Audio
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models
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controls
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dp-mst
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realtek-pc-beep

Documentation/sound/hd-audio/models.rst

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@@ -216,8 +216,6 @@ alc298-dell-aio
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ALC298 fixups on Dell AIO machines
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alc275-dell-xps
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ALC275 fixups on Dell XPS models
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alc256-dell-xps13
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ALC256 fixups on Dell XPS13
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lenovo-spk-noise
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Workaround for speaker noise on Lenovo machines
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lenovo-hotkey
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===============================
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Realtek PC Beep Hidden Register
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===============================
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This file documents the "PC Beep Hidden Register", which is present in certain
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Realtek HDA codecs and controls a muxer and pair of passthrough mixers that can
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route audio between pins but aren't themselves exposed as HDA widgets. As far
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as I can tell, these hidden routes are designed to allow flexible PC Beep output
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for codecs that don't have mixer widgets in their output paths. Why it's easier
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to hide a mixer behind an undocumented vendor register than to just expose it
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as a widget, I have no idea.
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Register Description
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====================
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The register is accessed via processing coefficient 0x36 on NID 20h. Bits not
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identified below have no discernible effect on my machine, a Dell XPS 13 9350::
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MSB LSB
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| |h|S|L| | B |R| | Known bits
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+=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+=+
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|0|0|1|1| 0x7 |0|0x0|1| 0x7 | Reset value
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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1Ah input select (B): 2 bits
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When zero, expose the PC Beep line (from the internal beep generator, when
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enabled with the Set Beep Generation verb on NID 01h, or else from the
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external PCBEEP pin) on the 1Ah pin node. When nonzero, expose the headphone
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jack (or possibly Line In on some machines) input instead. If PC Beep is
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selected, the 1Ah boost control has no effect.
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Amplify 1Ah loopback, left (L): 1 bit
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Amplify the left channel of 1Ah before mixing it into outputs as specified
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by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
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Amplify 1Ah loopback, right (R): 1 bit
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Amplify the right channel of 1Ah before mixing it into outputs as specified
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by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
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Loopback 1Ah to 21h [active low] (h): 1 bit
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When zero, mix 1Ah (possibly with amplification, depending on L and R bits)
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into 21h (headphone jack on my machine). Mixed signal respects the mute
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setting on 21h.
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Loopback 1Ah to 14h (S): 1 bit
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When one, mix 1Ah (possibly with amplification, depending on L and R bits)
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into 14h (internal speaker on my machine). Mixed signal **ignores** the mute
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setting on 14h and is present whenever 14h is configured as an output.
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Path diagrams
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=============
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1Ah input selection (DIV is the PC Beep divider set on NID 01h)::
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<Beep generator> <PCBEEP pin> <Headphone jack>
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| | |
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+--DIV--+--!DIV--+ {1Ah boost control}
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| |
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+--(b == 0)--+--(b != 0)--+
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|
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>1Ah (Beep/Headphone Mic/Line In)<
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Loopback of 1Ah to 21h/14h::
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<1Ah (Beep/Headphone Mic/Line In)>
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|
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{amplify if L/R}
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|
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+-----!h-----+-----S-----+
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| |
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{21h mute control} |
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| |
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>21h (Headphone)< >14h (Internal Speaker)<
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Background
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==========
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All Realtek HDA codecs have a vendor-defined widget with node ID 20h which
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provides access to a bank of registers that control various codec functions.
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Registers are read and written via the standard HDA processing coefficient
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verbs (Set/Get Coefficient Index, Set/Get Processing Coefficient). The node is
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named "Realtek Vendor Registers" in public datasheets' verb listings and,
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apart from that, is entirely undocumented.
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This particular register, exposed at coefficient 0x36 and named in commits from
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Realtek, is of note: unlike most registers, which seem to control detailed
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amplifier parameters not in scope of the HDA specification, it controls audio
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routing which could just as easily have been defined using standard HDA mixer
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and selector widgets.
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Specifically, it selects between two sources for the input pin widget with Node
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ID (NID) 1Ah: the widget's signal can come either from an audio jack (on my
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laptop, a Dell XPS 13 9350, it's the headphone jack, but comments in Realtek
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commits indicate that it might be a Line In on some machines) or from the PC
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Beep line (which is itself multiplexed between the codec's internal beep
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generator and external PCBEEP pin, depending on if the beep generator is
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enabled via verbs on NID 01h). Additionally, it can mix (with optional
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amplification) that signal onto the 21h and/or 14h output pins.
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The register's reset value is 0x3717, corresponding to PC Beep on 1Ah that is
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then amplified and mixed into both the headphones and the speakers. Not only
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does this violate the HDA specification, which says that "[a vendor defined
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beep input pin] connection may be maintained *only* while the Link reset
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(**RST#**) is asserted", it means that we cannot ignore the register if we care
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about the input that 1Ah would otherwise expose or if the PCBEEP trace is
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poorly shielded and picks up chassis noise (both of which are the case on my
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machine).
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Unfortunately, there are lots of ways to get this register configuration wrong.
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Linux, it seems, has gone through most of them. For one, the register resets
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after S3 suspend: judging by existing code, this isn't the case for all vendor
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registers, and it's led to some fixes that improve behavior on cold boot but
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don't last after suspend. Other fixes have successfully switched the 1Ah input
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away from PC Beep but have failed to disable both loopback paths. On my
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machine, this means that the headphone input is amplified and looped back to
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the headphone output, which uses the exact same pins! As you might expect, this
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causes terrible headphone noise, the character of which is controlled by the
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1Ah boost control. (If you've seen instructions online to fix XPS 13 headphone
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noise by changing "Headphone Mic Boost" in ALSA, now you know why.)
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The information here has been obtained through black-box reverse engineering of
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the ALC256 codec's behavior and is not guaranteed to be correct. It likely
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also applies for the ALC255, ALC257, ALC235, and ALC236, since those codecs
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seem to be close relatives of the ALC256. (They all share one initialization
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function.) Additionally, other codecs like the ALC225 and ALC285 also have this
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register, judging by existing fixups in ``patch_realtek.c``, but specific
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data (e.g. node IDs, bit positions, pin mappings) for those codecs may differ
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from what I've described here.

Makefile

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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
33
PATCHLEVEL = 4
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SUBLEVEL = 32
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SUBLEVEL = 33
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EXTRAVERSION =
66
NAME = Kleptomaniac Octopus
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arch/arm/boot/dts/dm8148-evm.dts

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&cpsw_emac0 {
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phy-handle = <&ethphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&cpsw_emac1 {
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phy-handle = <&ethphy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&davinci_mdio {

arch/arm/boot/dts/dm8148-t410.dts

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&cpsw_emac0 {
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phy-handle = <&ethphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&cpsw_emac1 {
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phy-handle = <&ethphy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&davinci_mdio {

arch/arm/boot/dts/dra62x-j5eco-evm.dts

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&cpsw_emac0 {
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phy-handle = <&ethphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&cpsw_emac1 {
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phy-handle = <&ethphy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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};
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&davinci_mdio {

arch/arm/boot/dts/exynos4210-universal_c210.dts

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gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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cs-gpios = <&gpy4 3 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>;
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lcd@0 {
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compatible = "samsung,ld9040";
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vci-supply = <&ldo17_reg>;
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reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>;
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spi-max-frequency = <1200000>;
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spi-cpol;
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spi-cpha;
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power-on-delay = <10>;
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reset-delay = <10>;
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panel-width-mm = <90>;

arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts

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};
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&reg_dldo3 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vdd-csi";
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};
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arch/arm64/Makefile

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include/generated/asm-offsets.h))
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endif
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# Ensure that if the compiler supports branch protection we default it
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# off.
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KBUILD_CFLAGS += $(call cc-option,-mbranch-protection=none)
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ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
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KBUILD_CPPFLAGS += -mbig-endian
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CHECKFLAGS += -D__AARCH64EB__

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