@@ -100,11 +100,11 @@ extern volatile TCB_t * volatile pxCurrentTCB;
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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- "cli" "\n\t"
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- "wdr" "\n\t"
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- "out %0, %1" "\n\t"
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- "out __SREG__,__tmp_reg__" "\n\t"
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- "out %0, %2" "\n\t"
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+ "cli" "\n\t"
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+ "wdr" "\n\t"
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+ "out %0, %1" "\n\t"
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+ "out __SREG__,__tmp_reg__" "\n\t"
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+ "out %0, %2" "\n\t"
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: /* no outputs */
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: "I" ( _SFR_IO_ADDR ( _WD_CONTROL_REG ) ),
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"r" ( ( uint8_t ) ( _BV ( _WD_CHANGE_BIT ) | _BV ( WDE ) ) ),
@@ -117,11 +117,11 @@ extern volatile TCB_t * volatile pxCurrentTCB;
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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- "cli" "\n\t"
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- "wdr" "\n\t"
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- "sts %0, %1" "\n\t"
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- "out __SREG__,__tmp_reg__" "\n\t"
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- "sts %0, %2" "\n\t"
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+ "cli" "\n\t"
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+ "wdr" "\n\t"
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+ "sts %0, %1" "\n\t"
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+ "out __SREG__,__tmp_reg__" "\n\t"
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+ "sts %0, %2" "\n\t"
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: /* no outputs */
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: "n" ( _SFR_MEM_ADDR ( _WD_CONTROL_REG ) ),
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"r" ( ( uint8_t ) ( _BV ( _WD_CHANGE_BIT ) | _BV ( WDE ) ) ),
@@ -167,11 +167,11 @@ extern volatile TCB_t * volatile pxCurrentTCB;
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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- "cli" "\n\t"
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- "wdr" "\n\t"
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- "out %0, %1" "\n\t"
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- "out __SREG__,__tmp_reg__" "\n\t"
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- "out %0, %2" "\n\t"
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+ "cli" "\n\t"
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+ "wdr" "\n\t"
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+ "out %0, %1" "\n\t"
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+ "out __SREG__,__tmp_reg__" "\n\t"
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+ "out %0, %2" "\n\t"
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: /* no outputs */
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: "I" ( _SFR_IO_ADDR ( _WD_CONTROL_REG ) ),
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"r" ( ( uint8_t ) ( _BV ( _WD_CHANGE_BIT ) | _BV ( WDE ) ) ),
@@ -184,11 +184,11 @@ extern volatile TCB_t * volatile pxCurrentTCB;
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{
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__asm__ __volatile__ (
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"in __tmp_reg__,__SREG__" "\n\t"
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- "cli" "\n\t"
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- "wdr" "\n\t"
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- "sts %0, %1" "\n\t"
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- "out __SREG__,__tmp_reg__" "\n\t"
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- "sts %0, %2" "\n\t"
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+ "cli" "\n\t"
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+ "wdr" "\n\t"
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+ "sts %0, %1" "\n\t"
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+ "out __SREG__,__tmp_reg__" "\n\t"
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+ "sts %0, %2" "\n\t"
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: /* no outputs */
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: "n" ( _SFR_MEM_ADDR ( _WD_CONTROL_REG ) ),
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"r" ( ( uint8_t ) ( _BV ( _WD_CHANGE_BIT ) | _BV ( WDE ) ) ),
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