Allow inputs and outputs to connect to arrays from pcf file.

[janrinze]

If we define something like :
set_io --warn-no-port key_col[0] F11
set_io --warn-no-port key_col[1] E14
set_io --warn-no-port key_col[2] F12
set_io --warn-no-port key_col[3] E11
set_io --warn-no-port key_col[4] D11
set_io --warn-no-port key_col[5] D10

set_io --warn-no-port key_row[0] K13
set_io --warn-no-port key_row[1] J13
set_io --warn-no-port key_row[2] J11
set_io --warn-no-port key_row[3] M15
set_io --warn-no-port key_row[4] M16
set_io --warn-no-port key_row[5] H14
set_io --warn-no-port key_row[6] K15
set_io --warn-no-port key_row[7] G13
set_io --warn-no-port key_row[8] F14
set_io --warn-no-port key_row[9] T16

in the pcf file of the board and regenerate the board files,

now in icestudio create basic->input with key_row[9:0]
we need to set each entry manually.

this is cumbersome and error sensitive.
doing this for all busses is quite a sad undertaking.
try to attach the SRAM of the icoboard:

set_io --warn-no-port SRAM_A[0] N2
set_io --warn-no-port SRAM_A[1] K5
set_io --warn-no-port SRAM_A[2] J5
set_io --warn-no-port SRAM_A[3] M5
set_io --warn-no-port SRAM_A[4] P4
set_io --warn-no-port SRAM_A[5] N5
set_io --warn-no-port SRAM_A[6] P5
set_io --warn-no-port SRAM_A[7] P7
set_io --warn-no-port SRAM_A[8] M6
set_io --warn-no-port SRAM_A[9] P6
set_io --warn-no-port SRAM_A[10] T8
set_io --warn-no-port SRAM_A[11] T1
set_io --warn-no-port SRAM_A[12] P2
set_io --warn-no-port SRAM_A[13] R1
set_io --warn-no-port SRAM_A[14] N3
set_io --warn-no-port SRAM_A[15] P1
set_io --warn-no-port SRAM_A[16] M11
set_io --warn-no-port SRAM_A[17] P10
set_io --warn-no-port SRAM_A[18] P8

set_io --warn-no-port SRAM_D[0] T2
set_io --warn-no-port SRAM_D[1] R3
set_io --warn-no-port SRAM_D[2] T3
set_io --warn-no-port SRAM_D[3] R4
set_io --warn-no-port SRAM_D[4] R5
set_io --warn-no-port SRAM_D[5] T5
set_io --warn-no-port SRAM_D[6] R6
set_io --warn-no-port SRAM_D[7] T6
set_io --warn-no-port SRAM_D[8] N4
set_io --warn-no-port SRAM_D[9] M4
set_io --warn-no-port SRAM_D[10] L6
set_io --warn-no-port SRAM_D[11] M3
set_io --warn-no-port SRAM_D[12] L4
set_io --warn-no-port SRAM_D[13] L3
set_io --warn-no-port SRAM_D[14] K4
set_io --warn-no-port SRAM_D[15] K3

set_io --warn-no-port SRAM_nCE M7
set_io --warn-no-port SRAM_nWE T7
set_io --warn-no-port SRAM_nOE L5
set_io --warn-no-port SRAM_nLB J4
set_io --warn-no-port SRAM_nUB J3

and you know what i mean..

boards could have pre-defined input/output ports and we could select them from a pull down menu?

[cavearr]

Hello! I am reorganizing the issues, trying to give more visibility and be able to better organize and prioritize the work and my roadmap (I will publish it very soon), I am converting some issues that are new feature requests as ideas on Github discussions.

Thanks for understanding.