Skip to content

Commit ce617ca

Browse files
authored
ADC Get State (#132)
* refactor get_state to EdgePiADC * refactor ADCModes * add get_register_map * use get_register_map for internal register reads * refactor ADCState * use new ADCState for getting state internally * add get mux states * refactor state query constants to module
1 parent 84e38ff commit ce617ca

File tree

8 files changed

+2419
-330
lines changed

8 files changed

+2419
-330
lines changed

pytest.ini

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,10 @@
11
[pytest]
22
; faulthandler_timeout=5
3-
log_level=DEBUG
4-
log_format=%(asctime)s %(levelname)s [%(filename)s:%(lineno)d] %(message)s
3+
log_level=ERROR
4+
log_format=%(asctime)s %(levelname)s [%(filename)s:%(lineno)d] %(message)s
5+
# **********************
6+
# These tests rely on python periphery which is not available on Windows, so this causes
7+
# Pytest discovery error. Uncomment below line when using Windows, in order to hide integration and
8+
# hardware tests from Pytest and prevent Pytest discovery errors.
9+
# **********************
10+
; addopts= --ignore=./src/test_edgepi/integration_tests --ignore=./src/test_edgepi/hardware_tests

src/edgepi/adc/adc_constants.py

Lines changed: 2 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -247,25 +247,6 @@ class DiffMode(Enum):
247247
DIFF_OFF = DifferentialPair(ADCChannel.FLOAT, ADCChannel.AINCOM)
248248

249249

250-
@dataclass
251-
class ADCMode:
252-
"""Stores information about an ADC functional mode"""
253-
254-
addx: int
255-
mask: int
256-
257-
258-
class ADCModes(Enum):
259-
"""Address and mask values for ADC functional modes"""
260-
261-
CONV = ADCMode(ADCReg.REG_MODE0.value, BitMask.BIT6.value)
262-
CHECK = ADCMode(ADCReg.REG_INTERFACE.value, ADCMasks.CHECK_BITS.value)
263-
STATUS = ADCMode(ADCReg.REG_INTERFACE.value, BitMask.BIT2.value)
264-
DATA_RATE_1 = ADCMode(ADCReg.REG_MODE2.value, BitMask.LOW_NIBBLE.value)
265-
DATA_RATE_2 = ADCMode(ADCReg.REG_ADC2CFG.value, ADCMasks.ADC2_DR_BITS.value)
266-
FILTER = ADCMode(ADCReg.REG_MODE1.value, ADCMasks.FILTER_BITS.value)
267-
268-
269250
class IDACMUX(Enum):
270251
"""Settings for ADC IDACMUX register (output multiplexer mapping)"""
271252

@@ -343,12 +324,11 @@ class RTDModes(Enum):
343324
"adc_1_analog_in": ADCChannel.AIN5,
344325
"adc_1_mux_n": ADCChannel.AIN6,
345326
"idac_1_mux": IDACMUX.IDAC1_AIN8,
346-
"idac_2_mux": IDACMUX.IDAC1_AIN9,
327+
"idac_2_mux": IDACMUX.IDAC2_AIN9,
347328
"idac_1_mag": IDACMAG.IDAC1_500,
348329
"idac_2_mag": IDACMAG.IDAC2_500,
349330
"pos_ref_inp": REFMUX.POS_REF_EXT_AIN4,
350331
"neg_ref_inp": REFMUX.NEG_REF_INT_VAVSS,
351-
"rtd_mode_update": True,
352332
}
353333
RTD_OFF = {
354334
"adc_1_analog_in": ADCChannel.FLOAT,
@@ -359,12 +339,12 @@ class RTDModes(Enum):
359339
"idac_2_mag": IDACMAG.IDAC2_OFF,
360340
"pos_ref_inp": REFMUX.POS_REF_INT_2P5,
361341
"neg_ref_inp": REFMUX.NEG_REF_INT_2P5,
362-
"rtd_mode_update": True,
363342
}
364343

365344

366345
class AllowedChannels(Enum):
367346
"""Available channels for reading depend on whether RTD is enabled or not"""
347+
368348
RTD_ON = [
369349
ADCChannel.AIN0,
370350
ADCChannel.AIN1,

0 commit comments

Comments
 (0)