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codegenxarch.cpp
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codegenxarch.cpp
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//
// Copyright (c) Microsoft. All rights reserved.
// Licensed under the MIT license. See LICENSE file in the project root for full license information.
//
/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XX XX
XX Amd64/x86 Code Generator XX
XX XX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/
#include "jitpch.h"
#ifdef _MSC_VER
#pragma hdrstop
#endif
#ifndef LEGACY_BACKEND // This file is ONLY used for the RyuJIT backend that uses the linear scan register allocator.
#ifdef _TARGET_XARCH_
#include "emit.h"
#include "codegen.h"
#include "lower.h"
#include "gcinfo.h"
#include "gcinfoencoder.h"
// Get the register assigned to the given node
regNumber CodeGenInterface::genGetAssignedReg(GenTreePtr tree)
{
return tree->gtRegNum;
}
//------------------------------------------------------------------------
// genSpillVar: Spill a local variable
//
// Arguments:
// tree - the lclVar node for the variable being spilled
//
// Return Value:
// None.
//
// Assumptions:
// The lclVar must be a register candidate (lvRegCandidate)
void CodeGen::genSpillVar(GenTreePtr tree)
{
unsigned varNum = tree->gtLclVarCommon.gtLclNum;
LclVarDsc * varDsc = &(compiler->lvaTable[varNum]);
assert(varDsc->lvIsRegCandidate());
// We don't actually need to spill if it is already living in memory
bool needsSpill = ((tree->gtFlags & GTF_VAR_DEF) == 0 && varDsc->lvIsInReg());
if (needsSpill)
{
var_types lclTyp = varDsc->TypeGet();
if (varDsc->lvNormalizeOnStore())
lclTyp = genActualType(lclTyp);
emitAttr size = emitTypeSize(lclTyp);
bool restoreRegVar = false;
if (tree->gtOper == GT_REG_VAR)
{
tree->SetOper(GT_LCL_VAR);
restoreRegVar = true;
}
// mask off the flag to generate the right spill code, then bring it back
tree->gtFlags &= ~GTF_REG_VAL;
instruction storeIns = ins_Store(tree->TypeGet(), compiler->isSIMDTypeLocalAligned(varNum));
if (varTypeIsMultiReg(tree))
{
assert(varDsc->lvRegNum == genRegPairLo(tree->gtRegPair));
assert(varDsc->lvOtherReg == genRegPairHi(tree->gtRegPair));
regNumber regLo = genRegPairLo(tree->gtRegPair);
regNumber regHi = genRegPairHi(tree->gtRegPair);
inst_TT_RV(storeIns, tree, regLo);
inst_TT_RV(storeIns, tree, regHi, 4);
}
else
{
assert(varDsc->lvRegNum == tree->gtRegNum);
inst_TT_RV(storeIns, tree, tree->gtRegNum, 0, size);
}
tree->gtFlags |= GTF_REG_VAL;
if (restoreRegVar)
{
tree->SetOper(GT_REG_VAR);
}
genUpdateRegLife(varDsc, /*isBorn*/ false, /*isDying*/ true DEBUGARG(tree));
gcInfo.gcMarkRegSetNpt(varDsc->lvRegMask());
if (VarSetOps::IsMember(compiler, gcInfo.gcTrkStkPtrLcls, varDsc->lvVarIndex))
{
#ifdef DEBUG
if (!VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex))
{
JITDUMP("\t\t\t\t\t\t\tVar V%02u becoming live\n", varNum);
}
else
{
JITDUMP("\t\t\t\t\t\t\tVar V%02u continuing live\n", varNum);
}
#endif
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
}
}
tree->gtFlags &= ~GTF_SPILL;
varDsc->lvRegNum = REG_STK;
if (varTypeIsMultiReg(tree))
{
varDsc->lvOtherReg = REG_STK;
}
}
// inline
void CodeGenInterface::genUpdateVarReg(LclVarDsc * varDsc, GenTreePtr tree)
{
assert(tree->OperIsScalarLocal() || (tree->gtOper == GT_COPY));
varDsc->lvRegNum = tree->gtRegNum;
}
/*****************************************************************************/
/*****************************************************************************/
/*****************************************************************************
*
* Generate code that will set the given register to the integer constant.
*/
void CodeGen::genSetRegToIcon(regNumber reg,
ssize_t val,
var_types type,
insFlags flags)
{
// Reg cannot be a FP reg
assert(!genIsValidFloatReg(reg));
// The only TYP_REF constant that can come this path is a managed 'null' since it is not
// relocatable. Other ref type constants (e.g. string objects) go through a different
// code path.
noway_assert(type != TYP_REF || val == 0);
if (val == 0)
{
instGen_Set_Reg_To_Zero(emitActualTypeSize(type), reg, flags);
}
else
{
// TODO-XArch-CQ: needs all the optimized cases
getEmitter()->emitIns_R_I(INS_mov, emitActualTypeSize(type), reg, val);
}
}
/*****************************************************************************
*
* Generate code to check that the GS cookie wasn't thrashed by a buffer
* overrun. If pushReg is true, preserve all registers around code sequence.
* Otherwise ECX could be modified.
*
* Implementation Note: pushReg = true, in case of tail calls.
*/
void CodeGen::genEmitGSCookieCheck(bool pushReg)
{
noway_assert(compiler->gsGlobalSecurityCookieAddr || compiler->gsGlobalSecurityCookieVal);
// Make sure that EAX is reported as live GC-ref so that any GC that kicks in while
// executing GS cookie check will not collect the object pointed to by EAX.
if (!pushReg && (compiler->info.compRetType == TYP_REF))
gcInfo.gcRegGCrefSetCur |= RBM_INTRET;
regNumber regGSCheck;
if (!pushReg)
{
// Non-tail call: we can use any callee trash register that is not
// a return register or contain 'this' pointer (keep alive this), since
// we are generating GS cookie check after a GT_RETURN block.
if (compiler->lvaKeepAliveAndReportThis() && compiler->lvaTable[compiler->info.compThisArg].lvRegister &&
(compiler->lvaTable[compiler->info.compThisArg].lvRegNum == REG_ECX))
{
regGSCheck = REG_RDX;
}
else
{
regGSCheck = REG_RCX;
}
}
else
{
#ifdef _TARGET_X86_
NYI_X86("Tail calls from methods that need GS check");
regGSCheck = REG_NA;
#else // !_TARGET_X86_
// Tail calls from methods that need GS check: We need to preserve registers while
// emitting GS cookie check for a tail prefixed call or a jmp. To emit GS cookie
// check, we might need a register. This won't be an issue for jmp calls for the
// reason mentioned below (see comment starting with "Jmp Calls:").
//
// The following are the possible solutions in case of tail prefixed calls:
// 1) Use R11 - ignore tail prefix on calls that need to pass a param in R11 when
// present in methods that require GS cookie check. Rest of the tail calls that
// do not require R11 will be honored.
// 2) Internal register - GT_CALL node reserves an internal register and emits GS
// cookie check as part of tail call codegen. GenExitCode() needs to special case
// fast tail calls implemented as epilog+jmp or such tail calls should always get
// dispatched via helper.
// 3) Materialize GS cookie check as a sperate node hanging off GT_CALL node in
// right execution order during rationalization.
//
// There are two calls that use R11: VSD and calli pinvokes with cookie param. Tail
// prefix on pinvokes is ignored. That is, options 2 and 3 will allow tail prefixed
// VSD calls from methods that need GS check.
//
// Tail prefixed calls: Right now for Jit64 compat, method requiring GS cookie check
// ignores tail prefix. In future, if we intend to support tail calls from such a method,
// consider one of the options mentioned above. For now adding an assert that we don't
// expect to see a tail call in a method that requires GS check.
noway_assert(!compiler->compTailCallUsed);
// Jmp calls: specify method handle using which JIT queries VM for its entry point
// address and hence it can neither be a VSD call nor PInvoke calli with cookie
// parameter. Therefore, in case of jmp calls it is safe to use R11.
regGSCheck = REG_R11;
#endif // !_TARGET_X86_
}
if (compiler->gsGlobalSecurityCookieAddr == nullptr)
{
// If GS cookie value fits within 32-bits we can use 'cmp mem64, imm32'.
// Otherwise, load the value into a reg and use 'cmp mem64, reg64'.
if ((int)compiler->gsGlobalSecurityCookieVal != (ssize_t)compiler->gsGlobalSecurityCookieVal)
{
genSetRegToIcon(regGSCheck, compiler->gsGlobalSecurityCookieVal, TYP_I_IMPL);
getEmitter()->emitIns_S_R(INS_cmp, EA_PTRSIZE, regGSCheck, compiler->lvaGSSecurityCookie, 0);
}
else
{
getEmitter()->emitIns_S_I(INS_cmp, EA_PTRSIZE, compiler->lvaGSSecurityCookie, 0,
(int)compiler->gsGlobalSecurityCookieVal);
}
}
else
{
// Ngen case - GS cookie value needs to be accessed through an indirection.
instGen_Set_Reg_To_Imm(EA_HANDLE_CNS_RELOC, regGSCheck, (ssize_t)compiler->gsGlobalSecurityCookieAddr);
getEmitter()->emitIns_R_AR(ins_Load(TYP_I_IMPL), EA_PTRSIZE, regGSCheck, regGSCheck, 0);
getEmitter()->emitIns_S_R(INS_cmp, EA_PTRSIZE, regGSCheck, compiler->lvaGSSecurityCookie, 0);
}
BasicBlock *gsCheckBlk = genCreateTempLabel();
inst_JMP(genJumpKindForOper(GT_EQ, true), gsCheckBlk);
genEmitHelperCall(CORINFO_HELP_FAIL_FAST, 0, EA_UNKNOWN);
genDefineTempLabel(gsCheckBlk);
}
/*****************************************************************************
*
* Generate code for all the basic blocks in the function.
*/
void CodeGen::genCodeForBBlist()
{
unsigned varNum;
LclVarDsc * varDsc;
unsigned savedStkLvl;
#ifdef DEBUG
genInterruptibleUsed = true;
unsigned stmtNum = 0;
UINT64 totalCostEx = 0;
UINT64 totalCostSz = 0;
// You have to be careful if you create basic blocks from now on
compiler->fgSafeBasicBlockCreation = false;
// This stress mode is not comptible with fully interruptible GC
if (genInterruptible && compiler->opts.compStackCheckOnCall)
{
compiler->opts.compStackCheckOnCall = false;
}
// This stress mode is not comptible with fully interruptible GC
if (genInterruptible && compiler->opts.compStackCheckOnRet)
{
compiler->opts.compStackCheckOnRet = false;
}
#endif // DEBUG
// Prepare the blocks for exception handling codegen: mark the blocks that needs labels.
genPrepForEHCodegen();
assert(!compiler->fgFirstBBScratch || compiler->fgFirstBB == compiler->fgFirstBBScratch); // compiler->fgFirstBBScratch has to be first.
/* Initialize the spill tracking logic */
regSet.rsSpillBeg();
/* Initialize the line# tracking logic */
#ifdef DEBUGGING_SUPPORT
if (compiler->opts.compScopeInfo)
{
siInit();
}
#endif
// The current implementation of switch tables requires the first block to have a label so it
// can generate offsets to the switch label targets.
// TODO-XArch-CQ: remove this when switches have been re-implemented to not use this.
if (compiler->fgHasSwitch)
{
compiler->fgFirstBB->bbFlags |= BBF_JMP_TARGET;
}
genPendingCallLabel = nullptr;
/* Initialize the pointer tracking code */
gcInfo.gcRegPtrSetInit();
gcInfo.gcVarPtrSetInit();
/* If any arguments live in registers, mark those regs as such */
for (varNum = 0, varDsc = compiler->lvaTable;
varNum < compiler->lvaCount;
varNum++ , varDsc++)
{
/* Is this variable a parameter assigned to a register? */
if (!varDsc->lvIsParam || !varDsc->lvRegister)
continue;
/* Is the argument live on entry to the method? */
if (!VarSetOps::IsMember(compiler, compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex))
continue;
/* Is this a floating-point argument? */
if (varDsc->IsFloatRegType())
continue;
noway_assert(!varTypeIsFloating(varDsc->TypeGet()));
/* Mark the register as holding the variable */
regTracker.rsTrackRegLclVar(varDsc->lvRegNum, varNum);
}
unsigned finallyNesting = 0;
// Make sure a set is allocated for compiler->compCurLife (in the long case), so we can set it to empty without
// allocation at the start of each basic block.
VarSetOps::AssignNoCopy(compiler, compiler->compCurLife, VarSetOps::MakeEmpty(compiler));
/*-------------------------------------------------------------------------
*
* Walk the basic blocks and generate code for each one
*
*/
BasicBlock * block;
BasicBlock * lblk; /* previous block */
for (lblk = NULL, block = compiler->fgFirstBB;
block != NULL;
lblk = block, block = block->bbNext)
{
#ifdef DEBUG
if (compiler->verbose)
{
printf("\n=============== Generating ");
block->dspBlockHeader(compiler, true, true);
compiler->fgDispBBLiveness(block);
}
#endif // DEBUG
/* Figure out which registers hold variables on entry to this block */
regSet.rsMaskVars = RBM_NONE;
gcInfo.gcRegGCrefSetCur = RBM_NONE;
gcInfo.gcRegByrefSetCur = RBM_NONE;
compiler->m_pLinearScan->recordVarLocationsAtStartOfBB(block);
genUpdateLife(block->bbLiveIn);
// Even if liveness didn't change, we need to update the registers containing GC references.
// genUpdateLife will update the registers live due to liveness changes. But what about registers that didn't change?
// We cleared them out above. Maybe we should just not clear them out, but update the ones that change here.
// That would require handling the changes in recordVarLocationsAtStartOfBB().
regMaskTP newLiveRegSet = RBM_NONE;
regMaskTP newRegGCrefSet = RBM_NONE;
regMaskTP newRegByrefSet = RBM_NONE;
#ifdef DEBUG
VARSET_TP VARSET_INIT_NOCOPY(removedGCVars, VarSetOps::MakeEmpty(compiler));
VARSET_TP VARSET_INIT_NOCOPY(addedGCVars, VarSetOps::MakeEmpty(compiler));
#endif
VARSET_ITER_INIT(compiler, iter, block->bbLiveIn, varIndex);
while (iter.NextElem(compiler, &varIndex))
{
unsigned varNum = compiler->lvaTrackedToVarNum[varIndex];
LclVarDsc* varDsc = &(compiler->lvaTable[varNum]);
if (varDsc->lvIsInReg())
{
newLiveRegSet |= varDsc->lvRegMask();
if (varDsc->lvType == TYP_REF)
{
newRegGCrefSet |= varDsc->lvRegMask();
}
else if (varDsc->lvType == TYP_BYREF)
{
newRegByrefSet |= varDsc->lvRegMask();
}
#ifdef DEBUG
if (verbose && VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
{
VarSetOps::AddElemD(compiler, removedGCVars, varIndex);
}
#endif // DEBUG
VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
}
else if (compiler->lvaIsGCTracked(varDsc))
{
#ifdef DEBUG
if (verbose && !VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
{
VarSetOps::AddElemD(compiler, addedGCVars, varIndex);
}
#endif // DEBUG
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
}
}
#ifdef DEBUG
if (compiler->verbose)
{
printf("\t\t\t\t\t\t\tLive regs: ");
if (regSet.rsMaskVars == newLiveRegSet)
{
printf("(unchanged) ");
}
else
{
printRegMaskInt(regSet.rsMaskVars);
compiler->getEmitter()->emitDispRegSet(regSet.rsMaskVars);
printf(" => ");
}
printRegMaskInt(newLiveRegSet);
compiler->getEmitter()->emitDispRegSet(newLiveRegSet);
printf("\n");
if (!VarSetOps::IsEmpty(compiler, addedGCVars))
{
printf("\t\t\t\t\t\t\tAdded GCVars: ");
dumpConvertedVarSet(compiler, addedGCVars);
printf("\n");
}
if (!VarSetOps::IsEmpty(compiler, removedGCVars))
{
printf("\t\t\t\t\t\t\tRemoved GCVars: ");
dumpConvertedVarSet(compiler, removedGCVars);
printf("\n");
}
}
#endif // DEBUG
regSet.rsMaskVars = newLiveRegSet;
gcInfo.gcMarkRegSetGCref(newRegGCrefSet DEBUG_ARG(true));
gcInfo.gcMarkRegSetByref(newRegByrefSet DEBUG_ARG(true));
/* Blocks with handlerGetsXcptnObj()==true use GT_CATCH_ARG to
represent the exception object (TYP_REF).
We mark REG_EXCEPTION_OBJECT as holding a GC object on entry
to the block, it will be the first thing evaluated
(thanks to GTF_ORDER_SIDEEFF).
*/
if (handlerGetsXcptnObj(block->bbCatchTyp))
{
#if JIT_FEATURE_SSA_SKIP_DEFS
GenTreePtr firstStmt = block->FirstNonPhiDef();
#else
GenTreePtr firstStmt = block->bbTreeList;
#endif
if (firstStmt != NULL)
{
GenTreePtr firstTree = firstStmt->gtStmt.gtStmtExpr;
if (compiler->gtHasCatchArg(firstTree))
{
gcInfo.gcMarkRegSetGCref(RBM_EXCEPTION_OBJECT);
}
}
}
/* Start a new code output block */
genUpdateCurrentFunclet(block);
if (genAlignLoops && block->bbFlags & BBF_LOOP_HEAD)
{
getEmitter()->emitLoopAlign();
}
#ifdef DEBUG
if (compiler->opts.dspCode)
printf("\n L_M%03u_BB%02u:\n", Compiler::s_compMethodsCount, block->bbNum);
#endif
block->bbEmitCookie = NULL;
if (block->bbFlags & (BBF_JMP_TARGET|BBF_HAS_LABEL))
{
/* Mark a label and update the current set of live GC refs */
block->bbEmitCookie = getEmitter()->emitAddLabel(gcInfo.gcVarPtrSetCur,
gcInfo.gcRegGCrefSetCur,
gcInfo.gcRegByrefSetCur,
FALSE);
}
if (block == compiler->fgFirstColdBlock)
{
#ifdef DEBUG
if (compiler->verbose)
{
printf("\nThis is the start of the cold region of the method\n");
}
#endif
// We should never have a block that falls through into the Cold section
noway_assert(!lblk->bbFallsThrough());
// We require the block that starts the Cold section to have a label
noway_assert(block->bbEmitCookie);
getEmitter()->emitSetFirstColdIGCookie(block->bbEmitCookie);
}
/* Both stacks are always empty on entry to a basic block */
genStackLevel = 0;
savedStkLvl = genStackLevel;
/* Tell everyone which basic block we're working on */
compiler->compCurBB = block;
#ifdef DEBUGGING_SUPPORT
siBeginBlock(block);
// BBF_INTERNAL blocks don't correspond to any single IL instruction.
if (compiler->opts.compDbgInfo &&
(block->bbFlags & BBF_INTERNAL) &&
!compiler->fgBBisScratch(block)) // If the block is the distinguished first scratch block, then no need to emit a NO_MAPPING entry, immediately after the prolog.
{
genIPmappingAdd((IL_OFFSETX) ICorDebugInfo::NO_MAPPING, true);
}
bool firstMapping = true;
#endif // DEBUGGING_SUPPORT
/*---------------------------------------------------------------------
*
* Generate code for each statement-tree in the block
*
*/
#if FEATURE_EH_FUNCLETS
if (block->bbFlags & BBF_FUNCLET_BEG)
{
genReserveFuncletProlog(block);
}
#endif // FEATURE_EH_FUNCLETS
for (GenTreePtr stmt = block->FirstNonPhiDef(); stmt; stmt = stmt->gtNext)
{
noway_assert(stmt->gtOper == GT_STMT);
if (stmt->AsStmt()->gtStmtIsEmbedded())
continue;
/* Get hold of the statement tree */
GenTreePtr tree = stmt->gtStmt.gtStmtExpr;
#if defined(DEBUGGING_SUPPORT)
/* Do we have a new IL-offset ? */
if (stmt->gtStmt.gtStmtILoffsx != BAD_IL_OFFSET)
{
/* Create and append a new IP-mapping entry */
genIPmappingAdd(stmt->gtStmt.gtStmt.gtStmtILoffsx, firstMapping);
firstMapping = false;
}
#endif // DEBUGGING_SUPPORT
#ifdef DEBUG
noway_assert(stmt->gtStmt.gtStmtLastILoffs <= compiler->info.compILCodeSize ||
stmt->gtStmt.gtStmtLastILoffs == BAD_IL_OFFSET);
if (compiler->opts.dspCode && compiler->opts.dspInstrs &&
stmt->gtStmt.gtStmtLastILoffs != BAD_IL_OFFSET)
{
while (genCurDispOffset <= stmt->gtStmt.gtStmtLastILoffs)
{
genCurDispOffset +=
dumpSingleInstr(compiler->info.compCode, genCurDispOffset, "> ");
}
}
stmtNum++;
if (compiler->verbose)
{
printf("\nGenerating BB%02u, stmt %u\t\t", block->bbNum, stmtNum);
printf("Holding variables: ");
dspRegMask(regSet.rsMaskVars); printf("\n\n");
if (compiler->verboseTrees)
{
compiler->gtDispTree(compiler->opts.compDbgInfo ? stmt : tree);
printf("\n");
}
}
totalCostEx += ((UINT64)stmt->gtCostEx * block->getBBWeight(compiler));
totalCostSz += (UINT64) stmt->gtCostSz;
#endif // DEBUG
// Traverse the tree in linear order, generating code for each node in the
// tree as we encounter it
compiler->compCurLifeTree = NULL;
compiler->compCurStmt = stmt;
for (GenTreePtr treeNode = stmt->gtStmt.gtStmtList;
treeNode != NULL;
treeNode = treeNode->gtNext)
{
genCodeForTreeNode(treeNode);
if (treeNode->gtHasReg() && treeNode->gtLsraInfo.isLocalDefUse)
{
genConsumeReg(treeNode);
}
}
#ifdef FEATURE_SIMD
// If the next statement expr is a SIMDIntrinsicUpperRestore, don't call rsSpillChk because we
// haven't yet restored spills from the most recent call.
GenTree* nextTopLevelStmt = stmt->AsStmt()->gtStmtNextTopLevelStmt();
if ((nextTopLevelStmt == nullptr) ||
(nextTopLevelStmt->AsStmt()->gtStmtExpr->OperGet() != GT_SIMD) ||
(nextTopLevelStmt->AsStmt()->gtStmtExpr->gtSIMD.gtSIMDIntrinsicID != SIMDIntrinsicUpperRestore))
#endif // FEATURE_SIMD
{
regSet.rsSpillChk();
}
#ifdef DEBUG
/* Make sure we didn't bungle pointer register tracking */
regMaskTP ptrRegs = (gcInfo.gcRegGCrefSetCur|gcInfo.gcRegByrefSetCur);
regMaskTP nonVarPtrRegs = ptrRegs & ~regSet.rsMaskVars;
// If return is a GC-type, clear it. Note that if a common
// epilog is generated (genReturnBB) it has a void return
// even though we might return a ref. We can't use the compRetType
// as the determiner because something we are tracking as a byref
// might be used as a return value of a int function (which is legal)
if (tree->gtOper == GT_RETURN &&
(varTypeIsGC(compiler->info.compRetType) ||
(tree->gtOp.gtOp1 != 0 && varTypeIsGC(tree->gtOp.gtOp1->TypeGet()))))
{
nonVarPtrRegs &= ~RBM_INTRET;
}
// When profiling, the first statement in a catch block will be the
// harmless "inc" instruction (does not interfere with the exception
// object).
if ((compiler->opts.eeFlags & CORJIT_FLG_BBINSTR) &&
(stmt == block->bbTreeList) &&
handlerGetsXcptnObj(block->bbCatchTyp))
{
nonVarPtrRegs &= ~RBM_EXCEPTION_OBJECT;
}
if (nonVarPtrRegs)
{
printf("Regset after tree=");
compiler->printTreeID(tree);
printf(" BB%02u gcr=", block->bbNum);
printRegMaskInt(gcInfo.gcRegGCrefSetCur & ~regSet.rsMaskVars);
compiler->getEmitter()->emitDispRegSet(gcInfo.gcRegGCrefSetCur & ~regSet.rsMaskVars);
printf(", byr=");
printRegMaskInt(gcInfo.gcRegByrefSetCur & ~regSet.rsMaskVars);
compiler->getEmitter()->emitDispRegSet(gcInfo.gcRegByrefSetCur & ~regSet.rsMaskVars);
printf(", regVars=");
printRegMaskInt(regSet.rsMaskVars);
compiler->getEmitter()->emitDispRegSet(regSet.rsMaskVars);
printf("\n");
}
noway_assert(nonVarPtrRegs == 0);
for (GenTree * node = stmt->gtStmt.gtStmtList; node; node=node->gtNext)
{
assert(!(node->gtFlags & GTF_SPILL));
}
#endif // DEBUG
noway_assert(stmt->gtOper == GT_STMT);
#ifdef DEBUGGING_SUPPORT
genEnsureCodeEmitted(stmt->gtStmt.gtStmtILoffsx);
#endif
} //-------- END-FOR each statement-tree of the current block ---------
#if defined(DEBUG) && defined(LATE_DISASM) && defined(_TARGET_AMD64_)
if (block->bbNext == nullptr)
{
// Unit testing of the AMD64 emitter: generate a bunch of instructions into the last block
// (it's as good as any, but better than the prolog, which can only be a single instruction
// group) then use COMPLUS_JitLateDisasm=* to see if the late disassembler
// thinks the instructions are the same as we do.
genAmd64EmitterUnitTests();
}
#endif // defined(DEBUG) && defined(LATE_DISASM) && defined(_TARGET_ARM64_)
#ifdef DEBUGGING_SUPPORT
if (compiler->opts.compScopeInfo && (compiler->info.compVarScopesCount > 0))
{
siEndBlock(block);
/* Is this the last block, and are there any open scopes left ? */
bool isLastBlockProcessed = (block->bbNext == NULL);
if (block->isBBCallAlwaysPair())
{
isLastBlockProcessed = (block->bbNext->bbNext == NULL);
}
if (isLastBlockProcessed && siOpenScopeList.scNext)
{
/* This assert no longer holds, because we may insert a throw
block to demarcate the end of a try or finally region when they
are at the end of the method. It would be nice if we could fix
our code so that this throw block will no longer be necessary. */
//noway_assert(block->bbCodeOffsEnd != compiler->info.compILCodeSize);
siCloseAllOpenScopes();
}
}
#endif // DEBUGGING_SUPPORT
genStackLevel -= savedStkLvl;
#ifdef DEBUG
// compCurLife should be equal to the liveOut set, except that we don't keep
// it up to date for vars that are not register candidates
// (it would be nice to have a xor set function)
VARSET_TP VARSET_INIT_NOCOPY(extraLiveVars, VarSetOps::Diff(compiler, block->bbLiveOut, compiler->compCurLife));
VarSetOps::UnionD(compiler, extraLiveVars, VarSetOps::Diff(compiler, compiler->compCurLife, block->bbLiveOut));
VARSET_ITER_INIT(compiler, extraLiveVarIter, extraLiveVars, extraLiveVarIndex);
while (extraLiveVarIter.NextElem(compiler, &extraLiveVarIndex))
{
unsigned varNum = compiler->lvaTrackedToVarNum[extraLiveVarIndex];
LclVarDsc * varDsc = compiler->lvaTable + varNum;
assert(!varDsc->lvIsRegCandidate());
}
#endif
/* Both stacks should always be empty on exit from a basic block */
noway_assert(genStackLevel == 0);
#ifdef _TARGET_AMD64_
// On AMD64, we need to generate a NOP after a call that is the last instruction of the block, in several
// situations, to support proper exception handling semantics. This is mostly to ensure that when the stack
// walker computes an instruction pointer for a frame, that instruction pointer is in the correct EH region.
// The document "X64 and ARM ABIs.docx" has more details. The situations:
// 1. If the call instruction is in a different EH region as the instruction that follows it.
// 2. If the call immediately precedes an OS epilog. (Note that what the JIT or VM consider an epilog might
// be slightly different from what the OS considers an epilog, and it is the OS-reported epilog that matters here.)
// We handle case #1 here, and case #2 in the emitter.
if (getEmitter()->emitIsLastInsCall())
{
// Ok, the last instruction generated is a call instruction. Do any of the other conditions hold?
// Note: we may be generating a few too many NOPs for the case of call preceding an epilog. Technically,
// if the next block is a BBJ_RETURN, an epilog will be generated, but there may be some instructions
// generated before the OS epilog starts, such as a GS cookie check.
if ((block->bbNext == nullptr) ||
!BasicBlock::sameEHRegion(block, block->bbNext))
{
// We only need the NOP if we're not going to generate any more code as part of the block end.
switch (block->bbJumpKind)
{
case BBJ_ALWAYS:
case BBJ_THROW:
case BBJ_CALLFINALLY:
case BBJ_EHCATCHRET:
// We're going to generate more code below anyway, so no need for the NOP.
case BBJ_RETURN:
case BBJ_EHFINALLYRET:
case BBJ_EHFILTERRET:
// These are the "epilog follows" case, handled in the emitter.
break;
case BBJ_NONE:
if (block->bbNext == nullptr)
{
// Call immediately before the end of the code; we should never get here .
instGen(INS_BREAKPOINT); // This should never get executed
}
else
{
// We need the NOP
instGen(INS_nop);
}
break;
case BBJ_COND:
case BBJ_SWITCH:
// These can't have a call as the last instruction!
default:
noway_assert(!"Unexpected bbJumpKind");
break;
}
}
}
#endif // _TARGET_AMD64_
/* Do we need to generate a jump or return? */
switch (block->bbJumpKind)
{
case BBJ_ALWAYS:
inst_JMP(EJ_jmp, block->bbJumpDest);
break;
case BBJ_RETURN:
genExitCode(block);
break;
case BBJ_THROW:
// If we have a throw at the end of a function or funclet, we need to emit another instruction
// afterwards to help the OS unwinder determine the correct context during unwind.
// We insert an unexecuted breakpoint instruction in several situations
// following a throw instruction:
// 1. If the throw is the last instruction of the function or funclet. This helps
// the OS unwinder determine the correct context during an unwind from the
// thrown exception.
// 2. If this is this is the last block of the hot section.
// 3. If the subsequent block is a special throw block.
// 4. On AMD64, if the next block is in a different EH region.
if ((block->bbNext == NULL)
|| (block->bbNext->bbFlags & BBF_FUNCLET_BEG)
|| !BasicBlock::sameEHRegion(block, block->bbNext)
|| (!isFramePointerUsed() && compiler->fgIsThrowHlpBlk(block->bbNext))
|| block->bbNext == compiler->fgFirstColdBlock
)
{
instGen(INS_BREAKPOINT); // This should never get executed
}
break;
case BBJ_CALLFINALLY:
#if FEATURE_EH_FUNCLETS
// Generate a call to the finally, like this:
// mov rcx,qword ptr [rbp + 20H] // Load rcx with PSPSym
// call finally-funclet
// jmp finally-return // Only for non-retless finally calls
// The jmp can be a NOP if we're going to the next block.
getEmitter()->emitIns_R_S(ins_Load(TYP_I_IMPL), EA_PTRSIZE, REG_ARG_0, compiler->lvaPSPSym, 0);
getEmitter()->emitIns_J(INS_call, block->bbJumpDest);
if (block->bbFlags & BBF_RETLESS_CALL)
{
// We have a retless call, and the last instruction generated was a call.
// If the next block is in a different EH region (or is the end of the code
// block), then we need to generate a breakpoint here (since it will never
// get executed) to get proper unwind behavior.
if ((block->bbNext == nullptr) ||
!BasicBlock::sameEHRegion(block, block->bbNext))
{
instGen(INS_BREAKPOINT); // This should never get executed
}
}
else
{
// Because of the way the flowgraph is connected, the liveness info for this one instruction
// after the call is not (can not be) correct in cases where a variable has a last use in the
// handler. So turn off GC reporting for this single instruction.
getEmitter()->emitDisableGC();
// Now go to where the finally funclet needs to return to.
if (block->bbNext->bbJumpDest == block->bbNext->bbNext)
{
// Fall-through.
// TODO-XArch-CQ: Can we get rid of this instruction, and just have the call return directly
// to the next instruction? This would depend on stack walking from within the finally
// handler working without this instruction being in this special EH region.
instGen(INS_nop);
}
else
{
inst_JMP(EJ_jmp, block->bbNext->bbJumpDest);
}
getEmitter()->emitEnableGC();
}
// The BBJ_ALWAYS is used because the BBJ_CALLFINALLY can't point to the
// jump target using bbJumpDest - that is already used to point
// to the finally block. So just skip past the BBJ_ALWAYS unless the
// block is RETLESS.
if ( !(block->bbFlags & BBF_RETLESS_CALL) )
{
assert(block->isBBCallAlwaysPair());
lblk = block;
block = block->bbNext;
}
#else // !FEATURE_EH_FUNCLETS
NYI_X86("EH for RyuJIT x86");
#endif // !FEATURE_EH_FUNCLETS
break;
case BBJ_EHCATCHRET:
// Set EAX to the address the VM should return to after the catch.
// Generate a RIP-relative
// lea reg, [rip + disp32] ; the RIP is implicit
// which will be position-indepenent.
// TODO-XArch-Bug?: For ngen, we need to generate a reloc for the displacement (maybe EA_PTR_DSP_RELOC).
getEmitter()->emitIns_R_L(INS_lea, EA_PTRSIZE, block->bbJumpDest, REG_INTRET);
__fallthrough;
case BBJ_EHFINALLYRET:
case BBJ_EHFILTERRET:
#if FEATURE_EH_FUNCLETS
genReserveFuncletEpilog(block);
#else // !FEATURE_EH_FUNCLETS
NYI_X86("EH for RyuJIT x86");
#endif // !FEATURE_EH_FUNCLETS
break;
case BBJ_NONE:
case BBJ_COND:
case BBJ_SWITCH:
break;
default:
noway_assert(!"Unexpected bbJumpKind");
break;
}
#ifdef DEBUG
compiler->compCurBB = 0;
#endif
} //------------------ END-FOR each block of the method -------------------
/* Nothing is live at this point */
genUpdateLife(VarSetOps::MakeEmpty(compiler));
/* Finalize the spill tracking logic */
regSet.rsSpillEnd();
/* Finalize the temp tracking logic */
compiler->tmpEnd();
#ifdef DEBUG
if (compiler->verbose)
{
printf("\n# ");
printf("totalCostEx = %6d, totalCostSz = %5d ",