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dt-bindings: display: tegra: Convert to json-schema
Convert the Tegra host1x controller bindings from the free-form text format to json-schema. This also adds the missing display-hub DT bindings that were not previously documented. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt
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Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: NVIDIA Tegra MIPI pad calibration controller | ||
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maintainers: | ||
- Thierry Reding <thierry.reding@gmail.com> | ||
- Jon Hunter <jonathanh@nvidia.com> | ||
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properties: | ||
$nodename: | ||
pattern: "^mipi@[0-9a-f]+$" | ||
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compatible: | ||
enum: | ||
- nvidia,tegra114-mipi | ||
- nvidia,tegra210-mipi | ||
- nvidia,tegra186-mipi | ||
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reg: | ||
maxItems: 1 | ||
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clocks: | ||
items: | ||
- description: module clock | ||
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clock-names: | ||
items: | ||
- const: mipi-cal | ||
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power-domains: | ||
maxItems: 1 | ||
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"#nvidia,mipi-calibrate-cells": | ||
description: The number of cells in a MIPI calibration specifier. | ||
Should be 1. The single cell specifies a bitmask of the pads that | ||
need to be calibrated for a given device. | ||
$ref: "/schemas/types.yaml#/definitions/uint32" | ||
const: 1 | ||
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additionalProperties: false | ||
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required: | ||
- compatible | ||
- reg | ||
- clocks | ||
- "#nvidia,mipi-calibrate-cells" | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/tegra114-car.h> | ||
mipi@700e3000 { | ||
compatible = "nvidia,tegra114-mipi"; | ||
reg = <0x700e3000 0x100>; | ||
clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; | ||
clock-names = "mipi-cal"; | ||
#nvidia,mipi-calibrate-cells = <1>; | ||
}; | ||
dsia: dsi@54300000 { | ||
compatible = "nvidia,tegra114-dsi"; | ||
reg = <0x54300000 0x00040000>; | ||
clocks = <&tegra_car TEGRA114_CLK_DSIA>, | ||
<&tegra_car TEGRA114_CLK_DSIALP>, | ||
<&tegra_car TEGRA114_CLK_PLL_D_OUT0>; | ||
clock-names = "dsi", "lp", "parent"; | ||
resets = <&tegra_car 48>; | ||
reset-names = "dsi"; | ||
nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */ | ||
}; |
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Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: NVIDIA Tegra DisplayPort AUX Interface | ||
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maintainers: | ||
- Thierry Reding <thierry.reding@gmail.com> | ||
- Jon Hunter <jonathanh@nvidia.com> | ||
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description: | | ||
The Tegra Display Port Auxiliary (DPAUX) pad controller manages two | ||
pins which can be assigned to either the DPAUX channel or to an I2C | ||
controller. | ||
When configured for DisplayPort AUX operation, the DPAUX controller | ||
can also be used to communicate with a DisplayPort device using the | ||
AUX channel. | ||
properties: | ||
$nodename: | ||
pattern: "^dpaux@[0-9a-f]+$" | ||
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compatible: | ||
oneOf: | ||
- enum: | ||
- nvidia,tegra124-dpaux | ||
- nvidia,tegra210-dpaux | ||
- nvidia,tegra186-dpaux | ||
- nvidia,tegra194-dpaux | ||
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- items: | ||
- const: nvidia,tegra132-dpaux | ||
- const: nvidia,tegra124-dpaux | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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clocks: | ||
items: | ||
- description: clock input for the DPAUX hardware | ||
- description: reference clock | ||
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clock-names: | ||
items: | ||
- const: dpaux | ||
- const: parent | ||
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resets: | ||
items: | ||
- description: module reset | ||
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reset-names: | ||
items: | ||
- const: dpaux | ||
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power-domains: | ||
maxItems: 1 | ||
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i2c-bus: | ||
description: Subnode where I2C slave devices are listed. This | ||
subnode must be always present. If there are no I2C slave | ||
devices, an empty node should be added. See ../../i2c/i2c.yaml | ||
for more information. | ||
type: object | ||
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vdd-supply: | ||
description: phandle of a supply that powers the DisplayPort | ||
link | ||
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patternProperties: | ||
"^pinmux-[a-z0-9]+$": | ||
description: | ||
Since only three configurations are possible, only three child | ||
nodes are needed to describe the pin mux'ing options for the | ||
DPAUX pads. Furthermore, given that the pad functions are only | ||
applicable to a single set of pads, the child nodes only need | ||
to describe the pad group the functions are being applied to | ||
rather than the individual pads. | ||
type: object | ||
properties: | ||
groups: | ||
const: dpaux-io | ||
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function: | ||
enum: | ||
- aux | ||
- i2c | ||
- off | ||
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additionalProperties: false | ||
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required: | ||
- groups | ||
- function | ||
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additionalProperties: false | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- clocks | ||
- clock-names | ||
- resets | ||
- reset-names | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/tegra210-car.h> | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
dpaux: dpaux@545c0000 { | ||
compatible = "nvidia,tegra210-dpaux"; | ||
reg = <0x545c0000 0x00040000>; | ||
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&tegra_car TEGRA210_CLK_DPAUX>, | ||
<&tegra_car TEGRA210_CLK_PLL_DP>; | ||
clock-names = "dpaux", "parent"; | ||
resets = <&tegra_car 181>; | ||
reset-names = "dpaux"; | ||
power-domains = <&pd_sor>; | ||
status = "disabled"; | ||
state_dpaux_aux: pinmux-aux { | ||
groups = "dpaux-io"; | ||
function = "aux"; | ||
}; | ||
state_dpaux_i2c: pinmux-i2c { | ||
groups = "dpaux-io"; | ||
function = "i2c"; | ||
}; | ||
state_dpaux_off: pinmux-off { | ||
groups = "dpaux-io"; | ||
function = "off"; | ||
}; | ||
i2c-bus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
}; |
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