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dt-bindings: sh_eth convert bindings to json-schema
Convert Renesas Electronics SH EtherMAC bindings documentation to json-schema. Also name bindings documentation file according to the compat string being documented. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Documentation/devicetree/bindings/net/renesas,ether.yaml
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# SPDX-License-Identifier: GPL-2.0 | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/net/renesas,ether.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Renesas Electronics SH EtherMAC | ||
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allOf: | ||
- $ref: ethernet-controller.yaml# | ||
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maintainers: | ||
- Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- items: | ||
- enum: | ||
- renesas,gether-r8a7740 # device is a part of R8A7740 SoC | ||
- renesas,gether-r8a77980 # device is a part of R8A77980 SoC | ||
- renesas,ether-r7s72100 # device is a part of R7S72100 SoC | ||
- renesas,ether-r7s9210 # device is a part of R7S9210 SoC | ||
- items: | ||
- enum: | ||
- renesas,ether-r8a7778 # device is a part of R8A7778 SoC | ||
- renesas,ether-r8a7779 # device is a part of R8A7779 SoC | ||
- enum: | ||
- renesas,rcar-gen1-ether # a generic R-Car Gen1 device | ||
- items: | ||
- enum: | ||
- renesas,ether-r8a7745 # device is a part of R8A7745 SoC | ||
- renesas,ether-r8a7743 # device is a part of R8A7743 SoC | ||
- renesas,ether-r8a7790 # device is a part of R8A7790 SoC | ||
- renesas,ether-r8a7791 # device is a part of R8A7791 SoC | ||
- renesas,ether-r8a7793 # device is a part of R8A7793 SoC | ||
- renesas,ether-r8a7794 # device is a part of R8A7794 SoC | ||
- enum: | ||
- renesas,rcar-gen2-ether # a generic R-Car Gen2 or RZ/G1 device | ||
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reg: | ||
items: | ||
- description: E-DMAC/feLic registers | ||
- description: TSU registers | ||
minItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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'#address-cells': | ||
description: number of address cells for the MDIO bus | ||
const: 1 | ||
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'#size-cells': | ||
description: number of size cells on the MDIO bus | ||
const: 0 | ||
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clocks: | ||
maxItems: 1 | ||
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pinctrl-0: true | ||
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pinctrl-names: true | ||
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renesas,no-ether-link: | ||
type: boolean | ||
description: | ||
specify when a board does not provide a proper Ether LINK signal | ||
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renesas,ether-link-active-low: | ||
type: boolean | ||
description: | ||
specify when the Ether LINK signal is active-low instead of normal | ||
active-high | ||
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required: | ||
- compatible | ||
- reg | ||
- interrupts | ||
- phy-mode | ||
- phy-handle | ||
- '#address-cells' | ||
- '#size-cells' | ||
- clocks | ||
- pinctrl-0 | ||
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examples: | ||
# Lager board | ||
- | | ||
#include <dt-bindings/clock/r8a7790-clock.h> | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
ethernet@ee700000 { | ||
compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether"; | ||
reg = <0 0xee700000 0 0x400>; | ||
interrupt-parent = <&gic>; | ||
interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; | ||
clocks = <&mstp8_clks R8A7790_CLK_ETHER>; | ||
phy-mode = "rmii"; | ||
phy-handle = <&phy1>; | ||
pinctrl-0 = <ðer_pins>; | ||
pinctrl-names = "default"; | ||
renesas,ether-link-active-low; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
phy1: ethernet-phy@1 { | ||
reg = <1>; | ||
interrupt-parent = <&irqc0>; | ||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>; | ||
pinctrl-0 = <&phy1_pins>; | ||
pinctrl-names = "default"; | ||
}; | ||
}; |
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