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rx7000
1 parent 391e8e0 commit b68d775

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14 files changed

+57
-57
lines changed

14 files changed

+57
-57
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -240,7 +240,7 @@ int amdgpu_mes_create_process(struct amdgpu_device *adev, int pasid,
240240
DRM_ERROR("failed to allocate process context bo\n");
241241
goto clean_up_memory;
242242
}
243-
memset(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
243+
memset_io(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
244244

245245
/*
246246
* Avoid taking any other locks under MES lock to avoid circular
@@ -364,7 +364,7 @@ int amdgpu_mes_add_gang(struct amdgpu_device *adev, int pasid,
364364
DRM_ERROR("failed to allocate process context bo\n");
365365
goto clean_up_mem;
366366
}
367-
memset(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
367+
memset_io(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
368368

369369
/*
370370
* Avoid taking any other locks under MES lock to avoid circular
@@ -522,7 +522,7 @@ static int amdgpu_mes_queue_alloc_mqd(struct amdgpu_device *adev,
522522
dev_warn(adev->dev, "failed to create queue mqd bo (%d)", r);
523523
return r;
524524
}
525-
memset(q->mqd_cpu_ptr, 0, mqd_size);
525+
memset_io(q->mqd_cpu_ptr, 0, mqd_size);
526526

527527
r = amdgpu_bo_reserve(q->mqd_obj, false);
528528
if (unlikely(r != 0))
@@ -1129,7 +1129,7 @@ int amdgpu_mes_ctx_alloc_meta_data(struct amdgpu_device *adev,
11291129
if (!ctx_data->meta_data_obj)
11301130
return -ENOMEM;
11311131

1132-
memset(ctx_data->meta_data_ptr, 0,
1132+
memset_io(ctx_data->meta_data_ptr, 0,
11331133
sizeof(struct amdgpu_mes_ctx_meta_data));
11341134

11351135
return 0;

‎drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5314,7 +5314,7 @@ static void gfx_v10_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
53145314
if (fw_size > toc_fw_size)
53155315
fw_size = toc_fw_size;
53165316

5317-
memcpy(ptr + toc_offset, fw_data, fw_size);
5317+
memcpy_toio(ptr + toc_offset, fw_data, fw_size);
53185318

53195319
if (fw_size < toc_fw_size)
53205320
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);

‎drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -747,7 +747,7 @@ static int gfx_v11_0_mec_init(struct amdgpu_device *adev)
747747
return r;
748748
}
749749

750-
memset(hpd, 0, mec_hpd_size);
750+
memset_io(hpd, 0, mec_hpd_size);
751751

752752
amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);
753753
amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
@@ -1048,10 +1048,10 @@ static void gfx_v11_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
10481048
if (fw_size > toc_fw_size)
10491049
fw_size = toc_fw_size;
10501050

1051-
memcpy(ptr + toc_offset, fw_data, fw_size);
1051+
memcpy_toio(ptr + toc_offset, fw_data, fw_size);
10521052

10531053
if (fw_size < toc_fw_size)
1054-
memset(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
1054+
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
10551055

10561056
if ((id != SOC21_FIRMWARE_ID_RS64_PFP) && (id != SOC21_FIRMWARE_ID_RS64_ME))
10571057
*(uint64_t *)fw_autoload_mask |= 1ULL << id;
@@ -3595,7 +3595,7 @@ static void gfx_v11_0_cp_set_doorbell_range(struct amdgpu_device *adev)
35953595
static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
35963596
struct amdgpu_mqd_prop *prop)
35973597
{
3598-
struct v11_gfx_mqd *mqd = m;
3598+
volatile struct v11_gfx_mqd *mqd = m;
35993599
uint64_t hqd_gpu_addr, wb_gpu_addr;
36003600
uint32_t tmp;
36013601
uint32_t rb_bufsz;
@@ -3685,7 +3685,7 @@ static int gfx_v11_0_gfx_init_queue(struct amdgpu_ring *ring)
36853685
int mqd_idx = ring - &adev->gfx.gfx_ring[0];
36863686

36873687
if (!amdgpu_in_reset(adev) && !adev->in_suspend) {
3688-
memset((void *)mqd, 0, sizeof(*mqd));
3688+
memset_io((void *)mqd, 0, sizeof(*mqd));
36893689
mutex_lock(&adev->srbm_mutex);
36903690
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
36913691
amdgpu_ring_init_mqd(ring);
@@ -3739,7 +3739,7 @@ static int gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
37393739
static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
37403740
struct amdgpu_mqd_prop *prop)
37413741
{
3742-
struct v11_compute_mqd *mqd = m;
3742+
volatile struct v11_compute_mqd *mqd = m;
37433743
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
37443744
uint32_t tmp;
37453745

@@ -3997,7 +3997,7 @@ static int gfx_v11_0_kiq_init_queue(struct amdgpu_ring *ring)
39973997
soc21_grbm_select(adev, 0, 0, 0, 0);
39983998
mutex_unlock(&adev->srbm_mutex);
39993999
} else {
4000-
memset((void *)mqd, 0, sizeof(*mqd));
4000+
memset_io((void *)mqd, 0, sizeof(*mqd));
40014001
if (amdgpu_sriov_vf(adev) && adev->in_suspend)
40024002
amdgpu_ring_clear_ring(ring);
40034003
mutex_lock(&adev->srbm_mutex);
@@ -4021,7 +4021,7 @@ static int gfx_v11_0_kcq_init_queue(struct amdgpu_ring *ring)
40214021
int mqd_idx = ring - &adev->gfx.compute_ring[0];
40224022

40234023
if (!amdgpu_in_reset(adev) && !adev->in_suspend) {
4024-
memset((void *)mqd, 0, sizeof(*mqd));
4024+
memset_io((void *)mqd, 0, sizeof(*mqd));
40254025
mutex_lock(&adev->srbm_mutex);
40264026
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
40274027
amdgpu_ring_init_mqd(ring);

‎drivers/gpu/drm/amd/amdgpu/mes_v10_1.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -404,7 +404,7 @@ static int mes_v10_1_allocate_ucode_buffer(struct amdgpu_device *adev,
404404
return r;
405405
}
406406

407-
memcpy(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
407+
memcpy_toio(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
408408

409409
amdgpu_bo_kunmap(adev->mes.ucode_fw_obj[pipe]);
410410
amdgpu_bo_unreserve(adev->mes.ucode_fw_obj[pipe]);
@@ -437,7 +437,7 @@ static int mes_v10_1_allocate_ucode_data_buffer(struct amdgpu_device *adev,
437437
return r;
438438
}
439439

440-
memcpy(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
440+
memcpy_toio(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
441441

442442
amdgpu_bo_kunmap(adev->mes.data_fw_obj[pipe]);
443443
amdgpu_bo_unreserve(adev->mes.data_fw_obj[pipe]);
@@ -618,7 +618,7 @@ static int mes_v10_1_allocate_eop_buf(struct amdgpu_device *adev,
618618
return r;
619619
}
620620

621-
memset(eop, 0, adev->mes.eop_gpu_obj[pipe]->tbo.base.size);
621+
memset_io(eop, 0, adev->mes.eop_gpu_obj[pipe]->tbo.base.size);
622622

623623
amdgpu_bo_kunmap(adev->mes.eop_gpu_obj[pipe]);
624624
amdgpu_bo_unreserve(adev->mes.eop_gpu_obj[pipe]);
@@ -628,11 +628,11 @@ static int mes_v10_1_allocate_eop_buf(struct amdgpu_device *adev,
628628

629629
static int mes_v10_1_mqd_init(struct amdgpu_ring *ring)
630630
{
631-
struct v10_compute_mqd *mqd = ring->mqd_ptr;
631+
volatile struct v10_compute_mqd *mqd = ring->mqd_ptr;
632632
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
633633
uint32_t tmp;
634634

635-
memset(mqd, 0, sizeof(*mqd));
635+
memset_io(mqd, 0, sizeof(*mqd));
636636

637637
mqd->header = 0xC0310800;
638638
mqd->compute_pipelinestat_enable = 0x00000001;
@@ -905,7 +905,7 @@ static int mes_v10_1_mqd_sw_init(struct amdgpu_device *adev,
905905
dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
906906
return r;
907907
}
908-
memset(ring->mqd_ptr, 0, mqd_size);
908+
memset_io(ring->mqd_ptr, 0, mqd_size);
909909

910910
/* prepare MQD backup */
911911
adev->mes.mqd_backup[pipe] = kmalloc(mqd_size, GFP_KERNEL);

‎drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -500,7 +500,7 @@ static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
500500
return r;
501501
}
502502

503-
memcpy(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
503+
memcpy_toio(adev->mes.ucode_fw_ptr[pipe], fw_data, fw_size);
504504

505505
amdgpu_bo_kunmap(adev->mes.ucode_fw_obj[pipe]);
506506
amdgpu_bo_unreserve(adev->mes.ucode_fw_obj[pipe]);
@@ -535,7 +535,7 @@ static int mes_v11_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
535535
return r;
536536
}
537537

538-
memcpy(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
538+
memcpy_toio(adev->mes.data_fw_ptr[pipe], fw_data, fw_size);
539539

540540
amdgpu_bo_kunmap(adev->mes.data_fw_obj[pipe]);
541541
amdgpu_bo_unreserve(adev->mes.data_fw_obj[pipe]);
@@ -697,7 +697,7 @@ static int mes_v11_0_allocate_eop_buf(struct amdgpu_device *adev,
697697
return r;
698698
}
699699

700-
memset(eop, 0,
700+
memset_io(eop, 0,
701701
adev->mes.eop_gpu_obj[pipe]->tbo.base.size);
702702

703703
amdgpu_bo_kunmap(adev->mes.eop_gpu_obj[pipe]);
@@ -708,11 +708,11 @@ static int mes_v11_0_allocate_eop_buf(struct amdgpu_device *adev,
708708

709709
static int mes_v11_0_mqd_init(struct amdgpu_ring *ring)
710710
{
711-
struct v11_compute_mqd *mqd = ring->mqd_ptr;
711+
volatile struct v11_compute_mqd *mqd = ring->mqd_ptr;
712712
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
713713
uint32_t tmp;
714714

715-
memset(mqd, 0, sizeof(*mqd));
715+
memset_io(mqd, 0, sizeof(*mqd));
716716

717717
mqd->header = 0xC0310800;
718718
mqd->compute_pipelinestat_enable = 0x00000001;
@@ -1012,7 +1012,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
10121012
return r;
10131013
}
10141014

1015-
memset(ring->mqd_ptr, 0, mqd_size);
1015+
memset_io(ring->mqd_ptr, 0, mqd_size);
10161016

10171017
/* prepare MQD backup */
10181018
adev->mes.mqd_backup[pipe] = kmalloc(mqd_size, GFP_KERNEL);

‎drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -215,10 +215,10 @@ static int psp_v13_0_bootloader_load_component(struct psp_context *psp,
215215
if (ret)
216216
return ret;
217217

218-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
218+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
219219

220220
/* Copy PSP KDB binary to memory */
221-
memcpy(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
221+
memcpy_toio(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
222222

223223
/* Provide the PSP KDB to bootloader */
224224
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,
@@ -284,10 +284,10 @@ static int psp_v13_0_bootloader_load_sos(struct psp_context *psp)
284284
if (ret)
285285
return ret;
286286

287-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
287+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
288288

289289
/* Copy Secure OS binary to PSP memory */
290-
memcpy(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
290+
memcpy_toio(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
291291

292292
/* Provide the PSP secure OS to bootloader */
293293
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

‎drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -107,10 +107,10 @@ static int psp_v13_0_4_bootloader_load_component(struct psp_context *psp,
107107
if (ret)
108108
return ret;
109109

110-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
110+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
111111

112112
/* Copy PSP KDB binary to memory */
113-
memcpy(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
113+
memcpy_toio(psp->fw_pri_buf, bin_desc->start_addr, bin_desc->size_bytes);
114114

115115
/* Provide the PSP KDB to bootloader */
116116
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,
@@ -170,10 +170,10 @@ static int psp_v13_0_4_bootloader_load_sos(struct psp_context *psp)
170170
if (ret)
171171
return ret;
172172

173-
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
173+
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
174174

175175
/* Copy Secure OS binary to PSP memory */
176-
memcpy(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
176+
memcpy_toio(psp->fw_pri_buf, psp->sos.start_addr, psp->sos.size_bytes);
177177

178178
/* Provide the PSP secure OS to bootloader */
179179
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36,

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ static inline struct v11_sdma_mqd *get_sdma_mqd(void *mqd)
4444
static void update_cu_mask(struct mqd_manager *mm, void *mqd,
4545
struct mqd_update_info *minfo)
4646
{
47-
struct v11_compute_mqd *m;
47+
volatile struct v11_compute_mqd *m;
4848
uint32_t se_mask[KFD_MAX_NUM_SE] = {0};
4949
bool has_wa_flag = minfo && (minfo->update_flag & (UPDATE_FLAG_DBG_WA_ENABLE |
5050
UPDATE_FLAG_DBG_WA_DISABLE));
@@ -125,7 +125,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
125125
struct queue_properties *q)
126126
{
127127
uint64_t addr;
128-
struct v11_compute_mqd *m;
128+
volatile struct v11_compute_mqd *m;
129129
int size;
130130
uint32_t wa_mask = q->is_dbg_wa ? 0xffff : 0xffffffff;
131131

@@ -137,7 +137,7 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
137137
else
138138
size = sizeof(struct v11_compute_mqd);
139139

140-
memset(m, 0, size);
140+
memset_io(m, 0, size);
141141

142142
m->header = 0xC0310800;
143143
m->compute_pipelinestat_enable = 1;
@@ -217,7 +217,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
217217
struct queue_properties *q,
218218
struct mqd_update_info *minfo)
219219
{
220-
struct v11_compute_mqd *m;
220+
volatile struct v11_compute_mqd *m;
221221

222222
m = get_mqd(mqd);
223223

@@ -280,7 +280,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
280280

281281
static uint32_t read_doorbell_id(void *mqd)
282282
{
283-
struct v11_compute_mqd *m = (struct v11_compute_mqd *)mqd;
283+
volatile struct v11_compute_mqd *m = (struct v11_compute_mqd *)mqd;
284284

285285
return m->queue_doorbell_id0;
286286
}
@@ -291,7 +291,7 @@ static int get_wave_state(struct mqd_manager *mm, void *mqd,
291291
u32 *ctl_stack_used_size,
292292
u32 *save_area_used_size)
293293
{
294-
struct v11_compute_mqd *m;
294+
volatile struct v11_compute_mqd *m;
295295
struct kfd_context_save_area_header header;
296296

297297
m = get_mqd(mqd);
@@ -324,11 +324,11 @@ static int get_wave_state(struct mqd_manager *mm, void *mqd,
324324

325325
static void checkpoint_mqd(struct mqd_manager *mm, void *mqd, void *mqd_dst, void *ctl_stack_dst)
326326
{
327-
struct v11_compute_mqd *m;
327+
volatile struct v11_compute_mqd *m;
328328

329329
m = get_mqd(mqd);
330330

331-
memcpy(mqd_dst, m, sizeof(struct v11_compute_mqd));
331+
memcpy_fromio(mqd_dst, m, sizeof(struct v11_compute_mqd));
332332
}
333333

334334
static void restore_mqd(struct mqd_manager *mm, void **mqd,
@@ -338,12 +338,12 @@ static void restore_mqd(struct mqd_manager *mm, void **mqd,
338338
const void *ctl_stack_src, const u32 ctl_stack_size)
339339
{
340340
uint64_t addr;
341-
struct v11_compute_mqd *m;
341+
volatile struct v11_compute_mqd *m;
342342

343343
m = (struct v11_compute_mqd *) mqd_mem_obj->cpu_ptr;
344344
addr = mqd_mem_obj->gpu_addr;
345345

346-
memcpy(m, mqd_src, sizeof(*m));
346+
memcpy_toio(m, mqd_src, sizeof(*m));
347347

348348
*mqd = m;
349349
if (gart_addr)
@@ -363,7 +363,7 @@ static void init_mqd_hiq(struct mqd_manager *mm, void **mqd,
363363
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
364364
struct queue_properties *q)
365365
{
366-
struct v11_compute_mqd *m;
366+
volatile struct v11_compute_mqd *m;
367367

368368
init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
369369

@@ -378,7 +378,7 @@ static int destroy_hiq_mqd(struct mqd_manager *mm, void *mqd,
378378
uint32_t pipe_id, uint32_t queue_id)
379379
{
380380
int err;
381-
struct v11_compute_mqd *m;
381+
volatile struct v11_compute_mqd *m;
382382
u32 doorbell_off;
383383

384384
m = get_mqd(mqd);
@@ -407,7 +407,7 @@ static void init_mqd_sdma(struct mqd_manager *mm, void **mqd,
407407
else
408408
size = sizeof(struct v11_sdma_mqd);
409409

410-
memset(m, 0, size);
410+
memset_io(m, 0, size);
411411
*mqd = m;
412412
if (gart_addr)
413413
*gart_addr = mqd_mem_obj->gpu_addr;

‎drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -451,7 +451,7 @@ static void vg_notify_wm_ranges(struct clk_mgr *clk_mgr_base)
451451
if (!table || clk_mgr_vgh->smu_wm_set.mc_address.quad_part == 0)
452452
return;
453453

454-
memset(table, 0, sizeof(*table));
454+
memset_io(table, 0, sizeof(*table));
455455

456456
vg_build_watermark_ranges(clk_mgr_base->bw_params, table);
457457

@@ -646,7 +646,7 @@ static void vg_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr,
646646
if (!table || smu_dpm_clks->mc_address.quad_part == 0)
647647
return;
648648

649-
memset(table, 0, sizeof(*table));
649+
memset_io(table, 0, sizeof(*table));
650650

651651
dcn301_smu_set_dram_addr_high(clk_mgr,
652652
smu_dpm_clks->mc_address.high_part);

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