need continues design for DAC25

Author: CodingPlatelets

Makefile

@@ -8,7 +8,11 @@ test:
 verilog:
 	mkdir -p $(CHISEL_BUILD_DIR)
 	#mill -i chiselVitisTemplate.runMain --mainClass vitisrtlkernel.VitisRTLKernelVerilog -td $(CHISEL_BUILD_DIR)
-	sbt run
+	# sbt run
+	sbt "runMain vitisrtlkernel.VitisRTLKernelVerilog"
+
+feature:
+	sbt -J-Xmx50G "runMain kernel.NewFeatureTest"
 
 help:
 	mill -i __.runMain --mainClass vitisrtlkernel.VitisRTLKernelVerilog --help

build.sbt

@@ -25,10 +25,12 @@ lazy val root = (project in file("."))
   .dependsOn(fputil)
   .settings(
     name := "transformer_MM",
+    // fork := true,
+    // javaOptions += "-Xmx50G",
     commonChiselSettings
   )
 
 lazy val fputil = (project in file("fputil/src/main/scala")).settings(
   name := "fputil",
   commonChiselSettings
-)
+)

src/main/scala/kernel/alu/Gemm.scala

@@ -5,8 +5,8 @@ import chisel3.util._
 import kernel.utils.DebugLog
 
 trait GEMMAccuracyConfig {
-  val I: Int = 8
-  val F: Int = 24
+  val I: Int = 4
+  val F: Int = 12
 }
 
 class PEFxp extends Module with GEMMAccuracyConfig with DebugLog {
@@ -40,6 +40,10 @@ class GEMM(val n: Int = 4) extends Module with GEMMAccuracyConfig with DebugLog
   val InputB = IO(Flipped(Decoupled(Vec(n, Vec(n, UInt((I + F).W))))))
   val OutputPipe = IO(Decoupled(Vec(n * n, UInt((2 * (I + F)).W))))
 
+  // accumulate mode
+  val accMode = IO(Input(Bool()))
+  val accReg = RegInit(false.B)
+
   val dataValid = InputA.valid && InputB.valid
 
   val busy = RegInit(false.B)

src/main/scala/kernel/alu/Softmax.scala

@@ -8,8 +8,10 @@ import kernel.utils.PipeValue
 import kernel.utils.common
 
 trait SoftmaxAccuracy {
-  val I: Int = 8
-  val F: Int = 16
+  val I: Int = 4
+  val F: Int = 12
+
+  val maxDivNum = 16
 }
 
 class FixedPointExp extends Module with SoftmaxAccuracy with DebugLog {
@@ -43,6 +45,7 @@ class FixedPointExp extends Module with SoftmaxAccuracy with DebugLog {
   io.exp_x.valid := ShiftRegister(io.x.valid, expDelay)
 }
 
+// TODO: the number of divModule should be limited, max is 16
 class Softmax(val arraySize: Int = 4) extends Module with SoftmaxAccuracy with DebugLog {
   val io = IO(new Bundle {
     val x = Input(Valid(Vec(arraySize, UInt((I + F).W))))

src/main/scala/models/llama3/attentionLayer.scala

@@ -0,0 +1,5 @@
+package models.llama3
+
+class attentionLayer {
+  
+}

src/main/scala/models/llama3/common/llamaConfig.scala

@@ -0,0 +1,27 @@
+package models.llama3.common
+
+trait llamaConfig {
+  val dim = 4096
+  val n_layers = 32
+  val n_heads: Int = 32
+
+  // head_dim is the dimension of each head
+  val head_dim: Int = dim / n_heads
+  val maxN:     Int = 8 * 1024
+  val minN:     Int = 65
+
+  // fixed-point accuracy
+  val fx_int = 4
+  val fx_frac = 12
+
+  // UInt width
+  val bits = 16
+
+  // systolic array size
+  val systolicSize = 64
+  val systolicGroupSize = 1
+
+  // DAC for zb, stream for heads
+  val stream_size = 8
+
+}

src/main/scala/models/llama3/metrixController.scala

@@ -0,0 +1,52 @@
+package models.llama3
+
+import common.llamaConfig
+import chisel3._
+import chisel3.util._
+import kernel.alu.GEMM
+import kernel.utils.ForwardingMemory
+class metrixController extends Module with llamaConfig {}
+
+/*
+ * matrix mul matrix
+ * matrixA is [inputN, dim]
+ * matrixB is [dim, head_dim]
+ * matrixC is [inputN, head_dim]
+ */
+class QKVGenerationMul extends Module with llamaConfig {
+  val io = IO(new Bundle {
+    val matrixAPart = Input(Vec(minN, Vec(dim, UInt(bits.W))))
+  })
+}
+
+class SystolicGroup extends Module with llamaConfig {
+  val io = IO(new Bundle {
+    val matrixAVec = Flipped(Decoupled(Vec(systolicGroupSize, Vec(systolicSize, Vec(systolicSize, UInt(bits.W))))))
+    val matrixBVec = Flipped(Decoupled(Vec(systolicGroupSize, Vec(systolicSize, Vec(systolicSize, UInt(bits.W))))))
+    val matrixCVec = Decoupled(Vec(systolicGroupSize, Vec(systolicSize * systolicSize, UInt(bits.W))))
+  })
+
+  val gemmRow = for (i <- 0 until systolicGroupSize) yield Module(new GEMM(64))
+
+  val matrixAValid = io.matrixAVec.valid
+  val matrixBValid = io.matrixBVec.valid
+
+  val matrixCValid = gemmRow.map(_.OutputPipe.valid).reduce(_ && _)
+
+  for (i <- 0 until systolicGroupSize) {
+    gemmRow(i).InputA.bits := io.matrixAVec.bits(i)
+    gemmRow(i).InputA.valid := matrixAValid
+    gemmRow(i).InputB.bits := io.matrixBVec.bits(i)
+    gemmRow(i).InputB.valid := matrixBValid
+    gemmRow(i).accMode := false.B
+    io.matrixCVec.bits(i) := gemmRow(i).OutputPipe.bits
+    gemmRow(i).OutputPipe.ready := io.matrixCVec.ready
+  }
+
+  io.matrixCVec.valid := matrixCValid
+
+}
+
+class GEMMController(val x: Int, val y: Int) extends Module with llamaConfig {
+  assert(x % (systolicGroupSize * systolicSize) == 0 && y % systolicSize == 0)
+}

src/test/scala/kernel/alu/AverageModuleSpec.scala

@@ -158,7 +158,7 @@ class NormalizedModuleSpec extends AnyFlatSpec with ChiselScalatestTester {
   behavior.of("NormalizedModule")
 
   it should "calculate the standard deviation correctly" in {
-    test(new NormalizedModule(WII = 8, WIF = 8, WOI = 8, WOF = 16, ArraySize = 4))
+    test(new NormalizedModule(WII = 4, WIF = 12, WOI = 4, WOF = 12, ArraySize = 4))
       .withAnnotations(Seq(VerilatorBackendAnnotation, WriteVcdAnnotation)) { dut =>
         // 测试数据
         val testData = Seq(

src/test/scala/kernel/alu/SoftmaxTest.scala

@@ -13,8 +13,9 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
 //   val bit = 64
 //   val dimV = 32
 //   val depth = 128
+  val FF = 24
   val annos = Seq(VerilatorBackendAnnotation)
-  val pow2 = scala.math.pow(2, F).toFloat
+  val pow2 = scala.math.pow(2, FF).toFloat
   behavior.of("tester on exp function in chisel")
   it should "exp in fixedpoint" in {
     test(new FixedPointExp)
@@ -24,7 +25,7 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
         dut.reset.poke(false.B)
         dut.clock.step()
         //generate a range number from -10.5 to 0.0 step 0.5
-        val range = BigDecimal(-9.0) to BigDecimal(0.0) by BigDecimal(0.5)
+        val range = BigDecimal(-7.0) to BigDecimal(0.0) by BigDecimal(0.5)
 
         // val writer = new PrintWriter(new File("test_results.csv"))
 
@@ -71,13 +72,13 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
     BigInt((d * (1L << fracBits)).round)
   }
 
-  val arraySize = 4
+  val arraySize = 4096
   it should "pass softmax test" in {
     test(new Softmax(arraySize))
       .withAnnotations(annos) { dut =>
         val rseed = 4
         val rnd = new scala.util.Random(rseed)
-        val testQ = Seq.tabulate(arraySize)(_ => rnd.nextFloat() * 10)
+        val testQ = Seq.tabulate(arraySize)(_ => rnd.nextFloat())
 
         val maxInQ = testQ.max
         val expInQ = testQ.map(x => scala.math.exp(x - maxInQ))
@@ -86,6 +87,7 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
 
         println(s"testQ: ${testQ}")
         println(s"resultSoftmax: ${resultSoftmax}")
+        println(s"maxInResult: ${resultSoftmax.max}")
 
         dut.reset.poke(true.B)
         dut.clock.step()
@@ -101,8 +103,10 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
           dut.clock.step()
           dut.io.x.valid.poke(false.B)
         }.fork {
+          var clk = 0
           while (!dut.io.soft_x.valid.peekBoolean()) {
             dut.clock.step()
+            clk += 1
           }
           for (i <- 0 until arraySize) {
             val computedValue = dut.io.soft_x.bits(i).peekInt().toFloat / pow2
@@ -112,6 +116,7 @@ class SoftmaxTest extends AnyFlatSpec with SoftmaxAccuracy with ChiselScalatestT
             )
             // assert(relativeError < 5)
           }
+          println(s"clk: $clk")
           dut.clock.step()
           dut.io.soft_x.valid.expect(false.B)
         }.join()